1 /**************************************************************************
3 * Copyright 2003 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
31 #include "main/glheader.h"
32 #include "main/context.h"
33 #include "main/framebuffer.h"
34 #include "main/renderbuffer.h"
35 #include "main/texobj.h"
36 #include "main/hash.h"
37 #include "main/fbobject.h"
38 #include "main/version.h"
39 #include "swrast/s_renderbuffer.h"
44 static const __DRIconfigOptionsExtension i915_config_options
= {
45 .base
= { __DRI_CONFIG_OPTIONS
, 1 },
49 DRI_CONF_SECTION_PERFORMANCE
50 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
51 * DRI_CONF_BO_REUSE_ALL
53 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
54 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
55 DRI_CONF_ENUM(0, "Disable buffer object reuse")
56 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
60 DRI_CONF_OPT_BEGIN_B(early_z
, "false")
61 DRI_CONF_DESC(en
, "Enable early Z in classic mode (unstable, 945-only).")
64 DRI_CONF_OPT_BEGIN_B(fragment_shader
, "true")
65 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
69 DRI_CONF_SECTION_QUALITY
70 DRI_CONF_FORCE_S3TC_ENABLE("false")
72 DRI_CONF_SECTION_DEBUG
73 DRI_CONF_NO_RAST("false")
74 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
75 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
76 DRI_CONF_DISABLE_THROTTLING("false")
77 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
78 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
79 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
81 DRI_CONF_OPT_BEGIN_B(stub_occlusion_query
, "false")
82 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
85 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
86 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
92 #include "intel_batchbuffer.h"
93 #include "intel_buffers.h"
94 #include "intel_bufmgr.h"
95 #include "intel_chipset.h"
96 #include "intel_fbo.h"
97 #include "intel_mipmap_tree.h"
98 #include "intel_screen.h"
99 #include "intel_tex.h"
100 #include "intel_regions.h"
102 #include "i915_drm.h"
105 * For debugging purposes, this returns a time in seconds.
112 clock_gettime(CLOCK_MONOTONIC
, &tp
);
114 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
118 aub_dump_bmp(struct gl_context
*ctx
)
120 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
122 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
123 struct intel_renderbuffer
*irb
=
124 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
126 if (irb
&& irb
->mt
) {
127 enum aub_dump_bmp_format format
;
129 switch (irb
->Base
.Base
.Format
) {
130 case MESA_FORMAT_B8G8R8A8_UNORM
:
131 case MESA_FORMAT_B8G8R8X8_UNORM
:
132 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
138 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
139 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
142 irb
->Base
.Base
.Width
,
143 irb
->Base
.Base
.Height
,
145 irb
->mt
->region
->pitch
,
151 static const __DRItexBufferExtension intelTexBufferExtension
= {
152 .base
= { __DRI_TEX_BUFFER
, 3 },
154 .setTexBuffer
= intelSetTexBuffer
,
155 .setTexBuffer2
= intelSetTexBuffer2
,
156 .releaseTexBuffer
= NULL
,
160 intelDRI2Flush(__DRIdrawable
*drawable
)
162 GET_CURRENT_CONTEXT(ctx
);
163 struct intel_context
*intel
= intel_context(ctx
);
167 INTEL_FIREVERTICES(intel
);
169 intel
->need_throttle
= true;
171 if (intel
->batch
.used
)
172 intel_batchbuffer_flush(intel
);
174 if (INTEL_DEBUG
& DEBUG_AUB
) {
179 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
180 .base
= { __DRI2_FLUSH
, 3 },
182 .flush
= intelDRI2Flush
,
183 .invalidate
= dri2InvalidateDrawable
,
186 static struct intel_image_format intel_image_formats
[] = {
187 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
188 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
190 { __DRI_IMAGE_FOURCC_SARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
191 { { 0, 0, 0, __DRI_IMAGE_FORMAT_SARGB8
, 4 } } },
193 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
194 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
196 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
197 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
198 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
199 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
201 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
202 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
203 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
204 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
206 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
207 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
208 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
209 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
211 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
212 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
213 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
214 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
216 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
217 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
218 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
219 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
221 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
222 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
223 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
225 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
226 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
227 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
229 /* For YUYV and UYVY buffers, we set up two overlapping DRI images
230 * and treat them as planar buffers in the compositors.
231 * Plane 0 is GR88 and samples YU or YV pairs and places Y into
232 * the R component, while plane 1 is ARGB/ABGR and samples YUYV/UYVY
233 * clusters and places pairs and places U into the G component and
234 * V into A. This lets the texture sampler interpolate the Y
235 * components correctly when sampling from plane 0, and interpolate
236 * U and V correctly when sampling from plane 1. */
237 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
238 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
239 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
240 { __DRI_IMAGE_FOURCC_UYVY
, __DRI_IMAGE_COMPONENTS_Y_UXVX
, 2,
241 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
242 { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888
, 4 } } }
246 intel_allocate_image(int dri_format
, void *loaderPrivate
)
250 image
= calloc(1, sizeof *image
);
254 image
->dri_format
= dri_format
;
257 image
->format
= driImageFormatToGLFormat(dri_format
);
258 if (dri_format
!= __DRI_IMAGE_FORMAT_NONE
&&
259 image
->format
== MESA_FORMAT_NONE
) {
264 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
265 image
->data
= loaderPrivate
;
271 * Sets up a DRIImage structure to point to our shared image in a region
274 intel_setup_image_from_mipmap_tree(struct intel_context
*intel
, __DRIimage
*image
,
275 struct intel_mipmap_tree
*mt
, GLuint level
,
278 unsigned int draw_x
, draw_y
;
279 uint32_t mask_x
, mask_y
;
281 intel_miptree_check_level_layer(mt
, level
, zoffset
);
283 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
);
284 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
286 image
->width
= mt
->level
[level
].width
;
287 image
->height
= mt
->level
[level
].height
;
288 image
->tile_x
= draw_x
& mask_x
;
289 image
->tile_y
= draw_y
& mask_y
;
291 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
295 intel_region_reference(&image
->region
, mt
->region
);
299 intel_setup_image_from_dimensions(__DRIimage
*image
)
301 image
->width
= image
->region
->width
;
302 image
->height
= image
->region
->height
;
308 intel_create_image_from_name(__DRIscreen
*screen
,
309 int width
, int height
, int format
,
310 int name
, int pitch
, void *loaderPrivate
)
312 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
316 image
= intel_allocate_image(format
, loaderPrivate
);
320 if (image
->format
== MESA_FORMAT_NONE
)
323 cpp
= _mesa_get_format_bytes(image
->format
);
324 image
->region
= intel_region_alloc_for_handle(intelScreen
,
326 pitch
* cpp
, name
, "image");
327 if (image
->region
== NULL
) {
332 intel_setup_image_from_dimensions(image
);
338 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
339 int renderbuffer
, void *loaderPrivate
)
342 struct intel_context
*intel
= context
->driverPrivate
;
343 struct gl_renderbuffer
*rb
;
344 struct intel_renderbuffer
*irb
;
346 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
348 _mesa_error(&intel
->ctx
,
349 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
353 irb
= intel_renderbuffer(rb
);
354 image
= calloc(1, sizeof *image
);
358 image
->internal_format
= rb
->InternalFormat
;
359 image
->format
= rb
->Format
;
361 image
->data
= loaderPrivate
;
362 intel_region_reference(&image
->region
, irb
->mt
->region
);
363 intel_setup_image_from_dimensions(image
);
364 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
366 rb
->NeedsFinishRenderTexture
= true;
371 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
372 unsigned texture
, int zoffset
,
378 struct intel_context
*intel
= context
->driverPrivate
;
379 struct gl_texture_object
*obj
;
380 struct intel_texture_object
*iobj
;
383 obj
= _mesa_lookup_texture(&intel
->ctx
, texture
);
384 if (!obj
|| obj
->Target
!= target
) {
385 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
389 if (target
== GL_TEXTURE_CUBE_MAP
)
392 _mesa_test_texobj_completeness(&intel
->ctx
, obj
);
393 iobj
= intel_texture_object(obj
);
394 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
395 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
399 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
400 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
404 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
405 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
408 image
= calloc(1, sizeof *image
);
410 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
414 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
415 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
416 image
->data
= loaderPrivate
;
417 intel_setup_image_from_mipmap_tree(intel
, image
, iobj
->mt
, level
, zoffset
);
418 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
419 if (image
->dri_format
== MESA_FORMAT_NONE
) {
420 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
425 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
430 intel_destroy_image(__DRIimage
*image
)
432 intel_region_release(&image
->region
);
437 intel_create_image(__DRIscreen
*screen
,
438 int width
, int height
, int format
,
443 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
447 tiling
= I915_TILING_X
;
448 if (use
& __DRI_IMAGE_USE_CURSOR
) {
449 if (width
!= 64 || height
!= 64)
451 tiling
= I915_TILING_NONE
;
454 if (use
& __DRI_IMAGE_USE_LINEAR
)
455 tiling
= I915_TILING_NONE
;
457 image
= intel_allocate_image(format
, loaderPrivate
);
461 cpp
= _mesa_get_format_bytes(image
->format
);
463 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
464 if (image
->region
== NULL
) {
469 intel_setup_image_from_dimensions(image
);
475 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
478 case __DRI_IMAGE_ATTRIB_STRIDE
:
479 *value
= image
->region
->pitch
;
481 case __DRI_IMAGE_ATTRIB_HANDLE
:
482 *value
= image
->region
->bo
->handle
;
484 case __DRI_IMAGE_ATTRIB_NAME
:
485 return intel_region_flink(image
->region
, (uint32_t *) value
);
486 case __DRI_IMAGE_ATTRIB_FORMAT
:
487 *value
= image
->dri_format
;
489 case __DRI_IMAGE_ATTRIB_WIDTH
:
490 *value
= image
->region
->width
;
492 case __DRI_IMAGE_ATTRIB_HEIGHT
:
493 *value
= image
->region
->height
;
495 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
496 if (image
->planar_format
== NULL
)
498 *value
= image
->planar_format
->components
;
500 case __DRI_IMAGE_ATTRIB_FD
:
501 return !drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
);
508 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
512 image
= calloc(1, sizeof *image
);
516 intel_region_reference(&image
->region
, orig_image
->region
);
517 if (image
->region
== NULL
) {
522 image
->internal_format
= orig_image
->internal_format
;
523 image
->planar_format
= orig_image
->planar_format
;
524 image
->dri_format
= orig_image
->dri_format
;
525 image
->format
= orig_image
->format
;
526 image
->offset
= orig_image
->offset
;
527 image
->width
= orig_image
->width
;
528 image
->height
= orig_image
->height
;
529 image
->tile_x
= orig_image
->tile_x
;
530 image
->tile_y
= orig_image
->tile_y
;
531 image
->data
= loaderPrivate
;
533 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
534 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
540 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
542 if (use
& __DRI_IMAGE_USE_CURSOR
) {
543 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
551 intel_create_image_from_names(__DRIscreen
*screen
,
552 int width
, int height
, int fourcc
,
553 int *names
, int num_names
,
554 int *strides
, int *offsets
,
557 struct intel_image_format
*f
= NULL
;
561 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
564 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
565 if (intel_image_formats
[i
].fourcc
== fourcc
) {
566 f
= &intel_image_formats
[i
];
573 image
= intel_create_image_from_name(screen
, width
, height
,
574 __DRI_IMAGE_FORMAT_NONE
,
575 names
[0], strides
[0],
581 image
->planar_format
= f
;
582 for (i
= 0; i
< f
->nplanes
; i
++) {
583 index
= f
->planes
[i
].buffer_index
;
584 image
->offsets
[index
] = offsets
[index
];
585 image
->strides
[index
] = strides
[index
];
592 intel_create_image_from_fds(__DRIscreen
*screen
,
593 int width
, int height
, int fourcc
,
594 int *fds
, int num_fds
, int *strides
, int *offsets
,
597 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
598 struct intel_image_format
*f
= NULL
;
602 if (fds
== NULL
|| num_fds
!= 1)
605 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
606 if (intel_image_formats
[i
].fourcc
== fourcc
) {
607 f
= &intel_image_formats
[i
];
614 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
618 image
->region
= intel_region_alloc_for_fd(intelScreen
,
619 f
->planes
[0].cpp
, width
, height
, strides
[0],
620 height
* strides
[0], fds
[0], "image");
621 if (image
->region
== NULL
) {
626 intel_setup_image_from_dimensions(image
);
628 image
->planar_format
= f
;
629 for (i
= 0; i
< f
->nplanes
; i
++) {
630 index
= f
->planes
[i
].buffer_index
;
631 image
->offsets
[index
] = offsets
[index
];
632 image
->strides
[index
] = strides
[index
];
640 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
642 int width
, height
, offset
, stride
, dri_format
, index
;
643 struct intel_image_format
*f
;
644 uint32_t mask_x
, mask_y
;
647 if (parent
== NULL
|| parent
->planar_format
== NULL
)
650 f
= parent
->planar_format
;
652 if (plane
>= f
->nplanes
)
655 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
656 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
657 dri_format
= f
->planes
[plane
].dri_format
;
658 index
= f
->planes
[plane
].buffer_index
;
659 offset
= parent
->offsets
[index
];
660 stride
= parent
->strides
[index
];
662 image
= intel_allocate_image(dri_format
, loaderPrivate
);
666 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
667 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
672 image
->region
= calloc(sizeof(*image
->region
), 1);
673 if (image
->region
== NULL
) {
678 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
679 image
->region
->width
= width
;
680 image
->region
->height
= height
;
681 image
->region
->pitch
= stride
;
682 image
->region
->refcount
= 1;
683 image
->region
->bo
= parent
->region
->bo
;
684 drm_intel_bo_reference(image
->region
->bo
);
685 image
->region
->tiling
= parent
->region
->tiling
;
686 image
->offset
= offset
;
687 intel_setup_image_from_dimensions(image
);
689 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
);
692 "intel_create_sub_image: offset not on tile boundary");
697 static const __DRIimageExtension intelImageExtension
= {
698 .base
= { __DRI_IMAGE
, 7 },
700 .createImageFromName
= intel_create_image_from_name
,
701 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
702 .destroyImage
= intel_destroy_image
,
703 .createImage
= intel_create_image
,
704 .queryImage
= intel_query_image
,
705 .dupImage
= intel_dup_image
,
706 .validateUsage
= intel_validate_usage
,
707 .createImageFromNames
= intel_create_image_from_names
,
708 .fromPlanar
= intel_from_planar
,
709 .createImageFromTexture
= intel_create_image_from_texture
,
710 .createImageFromFds
= intel_create_image_from_fds
714 i915_query_renderer_integer(__DRIscreen
*psp
, int param
, unsigned int *value
)
716 const struct intel_screen
*const intelScreen
=
717 (struct intel_screen
*) psp
->driverPrivate
;
720 case __DRI2_RENDERER_VENDOR_ID
:
723 case __DRI2_RENDERER_DEVICE_ID
:
724 value
[0] = intelScreen
->deviceID
;
726 case __DRI2_RENDERER_ACCELERATED
:
729 case __DRI2_RENDERER_VIDEO_MEMORY
: {
730 /* Once a batch uses more than 75% of the maximum mappable size, we
731 * assume that there's some fragmentation, and we start doing extra
732 * flushing, etc. That's the big cliff apps will care about.
735 size_t mappable_size
;
737 drm_intel_get_aperture_sizes(psp
->fd
, &mappable_size
, &aper_size
);
739 const unsigned gpu_mappable_megabytes
=
740 (aper_size
/ (1024 * 1024)) * 3 / 4;
742 const long system_memory_pages
= sysconf(_SC_PHYS_PAGES
);
743 const long system_page_size
= sysconf(_SC_PAGE_SIZE
);
745 if (system_memory_pages
<= 0 || system_page_size
<= 0)
748 const uint64_t system_memory_bytes
= (uint64_t) system_memory_pages
749 * (uint64_t) system_page_size
;
751 const unsigned system_memory_megabytes
=
752 (unsigned) (system_memory_bytes
/ (1024 * 1024));
754 value
[0] = MIN2(system_memory_megabytes
, gpu_mappable_megabytes
);
757 case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE
:
760 case __DRI2_RENDERER_HAS_TEXTURE_3D
:
764 return driQueryRendererIntegerCommon(psp
, param
, value
);
771 i915_query_renderer_string(__DRIscreen
*psp
, int param
, const char **value
)
773 const struct intel_screen
*intelScreen
=
774 (struct intel_screen
*) psp
->driverPrivate
;
777 case __DRI2_RENDERER_VENDOR_ID
:
778 value
[0] = i915_vendor_string
;
780 case __DRI2_RENDERER_DEVICE_ID
:
781 value
[0] = i915_get_renderer_string(intelScreen
->deviceID
);
790 static const __DRI2rendererQueryExtension intelRendererQueryExtension
= {
791 .base
= { __DRI2_RENDERER_QUERY
, 1 },
793 .queryInteger
= i915_query_renderer_integer
,
794 .queryString
= i915_query_renderer_string
797 static const __DRIextension
*intelScreenExtensions
[] = {
798 &intelTexBufferExtension
.base
,
799 &intelFenceExtension
.base
,
800 &intelFlushExtension
.base
,
801 &intelImageExtension
.base
,
802 &intelRendererQueryExtension
.base
,
803 &dri2ConfigQueryExtension
.base
,
804 &dri2NoErrorExtension
.base
,
809 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
812 struct drm_i915_getparam gp
;
814 memset(&gp
, 0, sizeof(gp
));
818 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
821 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
829 intel_get_boolean(__DRIscreen
*psp
, int param
)
832 return intel_get_param(psp
, param
, &value
) && value
;
836 intelDestroyScreen(__DRIscreen
* sPriv
)
838 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
840 dri_bufmgr_destroy(intelScreen
->bufmgr
);
841 driDestroyOptionInfo(&intelScreen
->optionCache
);
844 sPriv
->driverPrivate
= NULL
;
849 * This is called when we need to set up GL rendering to a new X window.
852 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
853 __DRIdrawable
* driDrawPriv
,
854 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
856 struct intel_renderbuffer
*rb
;
857 mesa_format rgbFormat
;
858 struct gl_framebuffer
*fb
;
863 fb
= CALLOC_STRUCT(gl_framebuffer
);
867 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
869 if (mesaVis
->redBits
== 5)
870 rgbFormat
= MESA_FORMAT_B5G6R5_UNORM
;
871 else if (mesaVis
->sRGBCapable
)
872 rgbFormat
= MESA_FORMAT_B8G8R8A8_SRGB
;
873 else if (mesaVis
->alphaBits
== 0)
874 rgbFormat
= MESA_FORMAT_B8G8R8X8_UNORM
;
876 rgbFormat
= MESA_FORMAT_B8G8R8A8_UNORM
;
878 /* setup the hardware-based renderbuffers */
879 rb
= intel_create_renderbuffer(rgbFormat
);
880 _mesa_attach_and_own_rb(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
882 if (mesaVis
->doubleBufferMode
) {
883 rb
= intel_create_renderbuffer(rgbFormat
);
884 _mesa_attach_and_own_rb(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
888 * Assert here that the gl_config has an expected depth/stencil bit
889 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
890 * which constructs the advertised configs.)
892 if (mesaVis
->depthBits
== 24) {
893 assert(mesaVis
->stencilBits
== 8);
896 * Use combined depth/stencil. Note that the renderbuffer is
897 * attached to two attachment points.
899 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT
);
900 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
901 _mesa_attach_and_reference_rb(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
903 else if (mesaVis
->depthBits
== 16) {
904 assert(mesaVis
->stencilBits
== 0);
905 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16
);
906 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
909 assert(mesaVis
->depthBits
== 0);
910 assert(mesaVis
->stencilBits
== 0);
913 /* now add any/all software-based renderbuffers we may need */
914 _swrast_add_soft_renderbuffers(fb
,
915 false, /* never sw color */
916 false, /* never sw depth */
917 false, /* never sw stencil */
918 mesaVis
->accumRedBits
> 0,
919 false, /* never sw alpha */
920 false /* never sw aux */ );
921 driDrawPriv
->driverPrivate
= fb
;
927 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
929 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
931 _mesa_reference_framebuffer(&fb
, NULL
);
934 /* There are probably better ways to do this, such as an
935 * init-designated function to register chipids and createcontext
939 i830CreateContext(int api
,
940 const struct gl_config
*mesaVis
,
941 __DRIcontext
*driContextPriv
,
942 unsigned major_version
,
943 unsigned minor_version
,
946 void *sharedContextPrivate
);
949 i915CreateContext(int api
,
950 const struct gl_config
*mesaVis
,
951 __DRIcontext
*driContextPriv
,
952 unsigned major_version
,
953 unsigned minor_version
,
956 void *sharedContextPrivate
);
959 intelCreateContext(gl_api api
,
960 const struct gl_config
* mesaVis
,
961 __DRIcontext
* driContextPriv
,
962 unsigned major_version
,
963 unsigned minor_version
,
967 void *sharedContextPrivate
)
969 bool success
= false;
971 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
972 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
974 if (flags
& ~(__DRI_CTX_FLAG_DEBUG
| __DRI_CTX_FLAG_NO_ERROR
)) {
975 *error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
980 *error
= __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE
;
984 if (IS_GEN3(intelScreen
->deviceID
)) {
985 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
986 major_version
, minor_version
, flags
,
987 error
, sharedContextPrivate
);
989 intelScreen
->no_vbo
= true;
990 success
= i830CreateContext(api
, mesaVis
, driContextPriv
,
991 major_version
, minor_version
, flags
,
992 error
, sharedContextPrivate
);
998 if (driContextPriv
->driverPrivate
!= NULL
)
999 intelDestroyContext(driContextPriv
);
1005 intel_init_bufmgr(struct intel_screen
*intelScreen
)
1007 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
1009 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
1011 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
1012 if (intelScreen
->bufmgr
== NULL
) {
1013 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
1014 __func__
, __LINE__
);
1018 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
1020 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
1021 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1029 intel_detect_swizzling(struct intel_screen
*screen
)
1031 drm_intel_bo
*buffer
;
1032 unsigned long flags
= 0;
1033 unsigned long aligned_pitch
;
1034 uint32_t tiling
= I915_TILING_X
;
1035 uint32_t swizzle_mode
= 0;
1037 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
1039 &tiling
, &aligned_pitch
, flags
);
1043 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
1044 drm_intel_bo_unreference(buffer
);
1046 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
1052 static __DRIconfig
**
1053 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1055 static const mesa_format formats
[] = {
1056 MESA_FORMAT_B5G6R5_UNORM
,
1057 MESA_FORMAT_B8G8R8A8_UNORM
,
1058 MESA_FORMAT_B8G8R8X8_UNORM
1061 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1062 static const GLenum back_buffer_modes
[] = {
1063 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
1066 static const uint8_t singlesample_samples
[1] = {0};
1068 uint8_t depth_bits
[4], stencil_bits
[4];
1069 __DRIconfig
**configs
= NULL
;
1071 /* Generate singlesample configs without accumulation buffer. */
1072 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1073 __DRIconfig
**new_configs
;
1074 int num_depth_stencil_bits
= 2;
1076 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1077 * buffer that has a different number of bits per pixel than the color
1081 stencil_bits
[0] = 0;
1083 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1085 stencil_bits
[1] = 0;
1088 stencil_bits
[1] = 8;
1091 new_configs
= driCreateConfigs(formats
[i
],
1094 num_depth_stencil_bits
,
1095 back_buffer_modes
, 2,
1096 singlesample_samples
, 1,
1098 configs
= driConcatConfigs(configs
, new_configs
);
1101 /* Generate the minimum possible set of configs that include an
1102 * accumulation buffer.
1104 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1105 __DRIconfig
**new_configs
;
1107 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1109 stencil_bits
[0] = 0;
1112 stencil_bits
[0] = 8;
1115 new_configs
= driCreateConfigs(formats
[i
],
1116 depth_bits
, stencil_bits
, 1,
1117 back_buffer_modes
, 1,
1118 singlesample_samples
, 1,
1120 configs
= driConcatConfigs(configs
, new_configs
);
1123 if (configs
== NULL
) {
1124 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1133 set_max_gl_versions(struct intel_screen
*screen
)
1135 __DRIscreen
*psp
= screen
->driScrnPriv
;
1137 switch (screen
->gen
) {
1139 bool has_fragment_shader
= driQueryOptionb(&screen
->optionCache
, "fragment_shader");
1140 bool has_occlusion_query
= driQueryOptionb(&screen
->optionCache
, "stub_occlusion_query");
1142 psp
->max_gl_core_version
= 0;
1143 psp
->max_gl_es1_version
= 11;
1144 psp
->max_gl_es2_version
= 20;
1146 if (has_fragment_shader
&& has_occlusion_query
) {
1147 psp
->max_gl_compat_version
= 21;
1149 psp
->max_gl_compat_version
= 14;
1154 psp
->max_gl_core_version
= 0;
1155 psp
->max_gl_compat_version
= 13;
1156 psp
->max_gl_es1_version
= 11;
1157 psp
->max_gl_es2_version
= 0;
1160 assert(!"unrecognized intel_screen::gen");
1166 * This is the driver specific part of the createNewScreen entry point.
1167 * Called when using DRI2.
1169 * \return the struct gl_config supported by this driver
1172 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1174 struct intel_screen
*intelScreen
;
1176 if (psp
->image
.loader
) {
1177 } else if (psp
->dri2
.loader
->base
.version
<= 2 ||
1178 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1180 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1181 "support required\n");
1185 /* Allocate the private area */
1186 intelScreen
= calloc(1, sizeof *intelScreen
);
1188 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1191 /* parse information in __driConfigOptions */
1192 driParseOptionInfo(&intelScreen
->optionCache
, i915_config_options
.xml
);
1194 intelScreen
->driScrnPriv
= psp
;
1195 psp
->driverPrivate
= (void *) intelScreen
;
1197 if (!intel_init_bufmgr(intelScreen
))
1200 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1202 if (IS_GEN3(intelScreen
->deviceID
)) {
1203 intelScreen
->gen
= 3;
1205 intelScreen
->gen
= 2;
1208 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1210 set_max_gl_versions(intelScreen
);
1212 psp
->extensions
= intelScreenExtensions
;
1214 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1217 struct intel_buffer
{
1219 struct intel_region
*region
;
1222 static __DRIbuffer
*
1223 intelAllocateBuffer(__DRIscreen
*screen
,
1224 unsigned attachment
, unsigned format
,
1225 int width
, int height
)
1227 struct intel_buffer
*intelBuffer
;
1228 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1230 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1231 attachment
== __DRI_BUFFER_BACK_LEFT
);
1233 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1234 if (intelBuffer
== NULL
)
1237 /* The front and back buffers are color buffers, which are X tiled. */
1238 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1245 if (intelBuffer
->region
== NULL
) {
1250 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1252 intelBuffer
->base
.attachment
= attachment
;
1253 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1254 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1256 return &intelBuffer
->base
;
1260 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1262 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1264 intel_region_release(&intelBuffer
->region
);
1269 static const struct __DriverAPIRec i915_driver_api
= {
1270 .InitScreen
= intelInitScreen2
,
1271 .DestroyScreen
= intelDestroyScreen
,
1272 .CreateContext
= intelCreateContext
,
1273 .DestroyContext
= intelDestroyContext
,
1274 .CreateBuffer
= intelCreateBuffer
,
1275 .DestroyBuffer
= intelDestroyBuffer
,
1276 .MakeCurrent
= intelMakeCurrent
,
1277 .UnbindContext
= intelUnbindContext
,
1278 .AllocateBuffer
= intelAllocateBuffer
,
1279 .ReleaseBuffer
= intelReleaseBuffer
1282 static const struct __DRIDriverVtableExtensionRec i915_vtable
= {
1283 .base
= { __DRI_DRIVER_VTABLE
, 1 },
1284 .vtable
= &i915_driver_api
,
1287 /* This is the table of extensions that the loader will dlsym() for. */
1288 static const __DRIextension
*i915_driver_extensions
[] = {
1289 &driCoreExtension
.base
,
1290 &driImageDriverExtension
.base
,
1291 &driDRI2Extension
.base
,
1293 &i915_config_options
.base
,
1297 PUBLIC
const __DRIextension
**__driDriverGetExtensions_i915(void)
1299 globalDriverAPI
= &i915_driver_api
;
1301 return i915_driver_extensions
;