1 /**************************************************************************
3 * Copyright 2003 VMware, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
31 #include "main/glheader.h"
32 #include "main/context.h"
33 #include "main/framebuffer.h"
34 #include "main/renderbuffer.h"
35 #include "main/texobj.h"
36 #include "main/hash.h"
37 #include "main/fbobject.h"
38 #include "main/version.h"
39 #include "swrast/s_renderbuffer.h"
44 static const __DRIconfigOptionsExtension i915_config_options
= {
45 .base
= { __DRI_CONFIG_OPTIONS
, 1 },
49 DRI_CONF_SECTION_PERFORMANCE
50 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC
)
51 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
52 * DRI_CONF_BO_REUSE_ALL
54 DRI_CONF_OPT_BEGIN_V(bo_reuse
, enum, 1, "0:1")
55 DRI_CONF_DESC_BEGIN(en
, "Buffer object reuse")
56 DRI_CONF_ENUM(0, "Disable buffer object reuse")
57 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
61 DRI_CONF_OPT_BEGIN_B(early_z
, "false")
62 DRI_CONF_DESC(en
, "Enable early Z in classic mode (unstable, 945-only).")
65 DRI_CONF_OPT_BEGIN_B(fragment_shader
, "true")
66 DRI_CONF_DESC(en
, "Enable limited ARB_fragment_shader support on 915/945.")
70 DRI_CONF_SECTION_QUALITY
71 DRI_CONF_FORCE_S3TC_ENABLE("false")
73 DRI_CONF_SECTION_DEBUG
74 DRI_CONF_NO_RAST("false")
75 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
76 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
77 DRI_CONF_DISABLE_THROTTLING("false")
78 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
79 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
80 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
82 DRI_CONF_OPT_BEGIN_B(stub_occlusion_query
, "false")
83 DRI_CONF_DESC(en
, "Enable stub ARB_occlusion_query support on 915/945.")
86 DRI_CONF_OPT_BEGIN_B(shader_precompile
, "true")
87 DRI_CONF_DESC(en
, "Perform code generation at shader link time.")
93 #include "intel_batchbuffer.h"
94 #include "intel_buffers.h"
95 #include "intel_bufmgr.h"
96 #include "intel_chipset.h"
97 #include "intel_fbo.h"
98 #include "intel_mipmap_tree.h"
99 #include "intel_screen.h"
100 #include "intel_tex.h"
101 #include "intel_regions.h"
103 #include "i915_drm.h"
106 * For debugging purposes, this returns a time in seconds.
113 clock_gettime(CLOCK_MONOTONIC
, &tp
);
115 return tp
.tv_sec
+ tp
.tv_nsec
/ 1000000000.0;
119 aub_dump_bmp(struct gl_context
*ctx
)
121 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
123 for (int i
= 0; i
< fb
->_NumColorDrawBuffers
; i
++) {
124 struct intel_renderbuffer
*irb
=
125 intel_renderbuffer(fb
->_ColorDrawBuffers
[i
]);
127 if (irb
&& irb
->mt
) {
128 enum aub_dump_bmp_format format
;
130 switch (irb
->Base
.Base
.Format
) {
131 case MESA_FORMAT_B8G8R8A8_UNORM
:
132 case MESA_FORMAT_B8G8R8X8_UNORM
:
133 format
= AUB_DUMP_BMP_FORMAT_ARGB_8888
;
139 assert(irb
->mt
->region
->pitch
% irb
->mt
->region
->cpp
== 0);
140 drm_intel_gem_bo_aub_dump_bmp(irb
->mt
->region
->bo
,
143 irb
->Base
.Base
.Width
,
144 irb
->Base
.Base
.Height
,
146 irb
->mt
->region
->pitch
,
152 static const __DRItexBufferExtension intelTexBufferExtension
= {
153 .base
= { __DRI_TEX_BUFFER
, 3 },
155 .setTexBuffer
= intelSetTexBuffer
,
156 .setTexBuffer2
= intelSetTexBuffer2
,
157 .releaseTexBuffer
= NULL
,
161 intelDRI2Flush(__DRIdrawable
*drawable
)
163 GET_CURRENT_CONTEXT(ctx
);
164 struct intel_context
*intel
= intel_context(ctx
);
168 INTEL_FIREVERTICES(intel
);
170 intel
->need_throttle
= true;
172 if (intel
->batch
.used
)
173 intel_batchbuffer_flush(intel
);
175 if (INTEL_DEBUG
& DEBUG_AUB
) {
180 static const struct __DRI2flushExtensionRec intelFlushExtension
= {
181 .base
= { __DRI2_FLUSH
, 3 },
183 .flush
= intelDRI2Flush
,
184 .invalidate
= dri2InvalidateDrawable
,
187 static struct intel_image_format intel_image_formats
[] = {
188 { __DRI_IMAGE_FOURCC_ARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
189 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
191 { __DRI_IMAGE_FOURCC_SARGB8888
, __DRI_IMAGE_COMPONENTS_RGBA
, 1,
192 { { 0, 0, 0, __DRI_IMAGE_FORMAT_SARGB8
, 4 } } },
194 { __DRI_IMAGE_FOURCC_XRGB8888
, __DRI_IMAGE_COMPONENTS_RGB
, 1,
195 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888
, 4 }, } },
197 { __DRI_IMAGE_FOURCC_YUV410
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
198 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
199 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 },
200 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8
, 1 } } },
202 { __DRI_IMAGE_FOURCC_YUV411
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
203 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
204 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
205 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
207 { __DRI_IMAGE_FOURCC_YUV420
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
208 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
209 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 },
210 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8
, 1 } } },
212 { __DRI_IMAGE_FOURCC_YUV422
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
213 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
214 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
215 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
217 { __DRI_IMAGE_FOURCC_YUV444
, __DRI_IMAGE_COMPONENTS_Y_U_V
, 3,
218 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
219 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
220 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 } } },
222 { __DRI_IMAGE_FOURCC_NV12
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
223 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
224 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
226 { __DRI_IMAGE_FOURCC_NV16
, __DRI_IMAGE_COMPONENTS_Y_UV
, 2,
227 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8
, 1 },
228 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88
, 2 } } },
230 /* For YUYV and UYVY buffers, we set up two overlapping DRI images
231 * and treat them as planar buffers in the compositors.
232 * Plane 0 is GR88 and samples YU or YV pairs and places Y into
233 * the R component, while plane 1 is ARGB/ABGR and samples YUYV/UYVY
234 * clusters and places pairs and places U into the G component and
235 * V into A. This lets the texture sampler interpolate the Y
236 * components correctly when sampling from plane 0, and interpolate
237 * U and V correctly when sampling from plane 1. */
238 { __DRI_IMAGE_FOURCC_YUYV
, __DRI_IMAGE_COMPONENTS_Y_XUXV
, 2,
239 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
240 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888
, 4 } } },
241 { __DRI_IMAGE_FOURCC_UYVY
, __DRI_IMAGE_COMPONENTS_Y_UXVX
, 2,
242 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88
, 2 },
243 { 0, 1, 0, __DRI_IMAGE_FORMAT_ABGR8888
, 4 } } }
247 intel_allocate_image(int dri_format
, void *loaderPrivate
)
251 image
= calloc(1, sizeof *image
);
255 image
->dri_format
= dri_format
;
258 image
->format
= driImageFormatToGLFormat(dri_format
);
259 if (dri_format
!= __DRI_IMAGE_FORMAT_NONE
&&
260 image
->format
== MESA_FORMAT_NONE
) {
265 image
->internal_format
= _mesa_get_format_base_format(image
->format
);
266 image
->data
= loaderPrivate
;
272 * Sets up a DRIImage structure to point to our shared image in a region
275 intel_setup_image_from_mipmap_tree(struct intel_context
*intel
, __DRIimage
*image
,
276 struct intel_mipmap_tree
*mt
, GLuint level
,
279 unsigned int draw_x
, draw_y
;
280 uint32_t mask_x
, mask_y
;
282 intel_miptree_check_level_layer(mt
, level
, zoffset
);
284 intel_region_get_tile_masks(mt
->region
, &mask_x
, &mask_y
);
285 intel_miptree_get_image_offset(mt
, level
, zoffset
, &draw_x
, &draw_y
);
287 image
->width
= mt
->level
[level
].width
;
288 image
->height
= mt
->level
[level
].height
;
289 image
->tile_x
= draw_x
& mask_x
;
290 image
->tile_y
= draw_y
& mask_y
;
292 image
->offset
= intel_region_get_aligned_offset(mt
->region
,
296 intel_region_reference(&image
->region
, mt
->region
);
300 intel_setup_image_from_dimensions(__DRIimage
*image
)
302 image
->width
= image
->region
->width
;
303 image
->height
= image
->region
->height
;
309 intel_create_image_from_name(__DRIscreen
*screen
,
310 int width
, int height
, int format
,
311 int name
, int pitch
, void *loaderPrivate
)
313 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
317 image
= intel_allocate_image(format
, loaderPrivate
);
321 if (image
->format
== MESA_FORMAT_NONE
)
324 cpp
= _mesa_get_format_bytes(image
->format
);
325 image
->region
= intel_region_alloc_for_handle(intelScreen
,
327 pitch
* cpp
, name
, "image");
328 if (image
->region
== NULL
) {
333 intel_setup_image_from_dimensions(image
);
339 intel_create_image_from_renderbuffer(__DRIcontext
*context
,
340 int renderbuffer
, void *loaderPrivate
)
343 struct intel_context
*intel
= context
->driverPrivate
;
344 struct gl_renderbuffer
*rb
;
345 struct intel_renderbuffer
*irb
;
347 rb
= _mesa_lookup_renderbuffer(&intel
->ctx
, renderbuffer
);
349 _mesa_error(&intel
->ctx
,
350 GL_INVALID_OPERATION
, "glRenderbufferExternalMESA");
354 irb
= intel_renderbuffer(rb
);
355 image
= calloc(1, sizeof *image
);
359 image
->internal_format
= rb
->InternalFormat
;
360 image
->format
= rb
->Format
;
362 image
->data
= loaderPrivate
;
363 intel_region_reference(&image
->region
, irb
->mt
->region
);
364 intel_setup_image_from_dimensions(image
);
365 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
367 rb
->NeedsFinishRenderTexture
= true;
372 intel_create_image_from_texture(__DRIcontext
*context
, int target
,
373 unsigned texture
, int zoffset
,
379 struct intel_context
*intel
= context
->driverPrivate
;
380 struct gl_texture_object
*obj
;
381 struct intel_texture_object
*iobj
;
384 obj
= _mesa_lookup_texture(&intel
->ctx
, texture
);
385 if (!obj
|| obj
->Target
!= target
) {
386 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
390 if (target
== GL_TEXTURE_CUBE_MAP
)
393 _mesa_test_texobj_completeness(&intel
->ctx
, obj
);
394 iobj
= intel_texture_object(obj
);
395 if (!obj
->_BaseComplete
|| (level
> 0 && !obj
->_MipmapComplete
)) {
396 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
400 if (level
< obj
->BaseLevel
|| level
> obj
->_MaxLevel
) {
401 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
405 if (target
== GL_TEXTURE_3D
&& obj
->Image
[face
][level
]->Depth
< zoffset
) {
406 *error
= __DRI_IMAGE_ERROR_BAD_MATCH
;
409 image
= calloc(1, sizeof *image
);
411 *error
= __DRI_IMAGE_ERROR_BAD_ALLOC
;
415 image
->internal_format
= obj
->Image
[face
][level
]->InternalFormat
;
416 image
->format
= obj
->Image
[face
][level
]->TexFormat
;
417 image
->data
= loaderPrivate
;
418 intel_setup_image_from_mipmap_tree(intel
, image
, iobj
->mt
, level
, zoffset
);
419 image
->dri_format
= driGLFormatToImageFormat(image
->format
);
420 if (image
->dri_format
== MESA_FORMAT_NONE
) {
421 *error
= __DRI_IMAGE_ERROR_BAD_PARAMETER
;
426 *error
= __DRI_IMAGE_ERROR_SUCCESS
;
431 intel_destroy_image(__DRIimage
*image
)
433 intel_region_release(&image
->region
);
438 intel_create_image(__DRIscreen
*screen
,
439 int width
, int height
, int format
,
444 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
448 tiling
= I915_TILING_X
;
449 if (use
& __DRI_IMAGE_USE_CURSOR
) {
450 if (width
!= 64 || height
!= 64)
452 tiling
= I915_TILING_NONE
;
455 if (use
& __DRI_IMAGE_USE_LINEAR
)
456 tiling
= I915_TILING_NONE
;
458 image
= intel_allocate_image(format
, loaderPrivate
);
462 cpp
= _mesa_get_format_bytes(image
->format
);
464 intel_region_alloc(intelScreen
, tiling
, cpp
, width
, height
, true);
465 if (image
->region
== NULL
) {
470 intel_setup_image_from_dimensions(image
);
476 intel_query_image(__DRIimage
*image
, int attrib
, int *value
)
479 case __DRI_IMAGE_ATTRIB_STRIDE
:
480 *value
= image
->region
->pitch
;
482 case __DRI_IMAGE_ATTRIB_HANDLE
:
483 *value
= image
->region
->bo
->handle
;
485 case __DRI_IMAGE_ATTRIB_NAME
:
486 return intel_region_flink(image
->region
, (uint32_t *) value
);
487 case __DRI_IMAGE_ATTRIB_FORMAT
:
488 *value
= image
->dri_format
;
490 case __DRI_IMAGE_ATTRIB_WIDTH
:
491 *value
= image
->region
->width
;
493 case __DRI_IMAGE_ATTRIB_HEIGHT
:
494 *value
= image
->region
->height
;
496 case __DRI_IMAGE_ATTRIB_COMPONENTS
:
497 if (image
->planar_format
== NULL
)
499 *value
= image
->planar_format
->components
;
501 case __DRI_IMAGE_ATTRIB_FD
:
502 return !drm_intel_bo_gem_export_to_prime(image
->region
->bo
, value
);
509 intel_dup_image(__DRIimage
*orig_image
, void *loaderPrivate
)
513 image
= calloc(1, sizeof *image
);
517 intel_region_reference(&image
->region
, orig_image
->region
);
518 if (image
->region
== NULL
) {
523 image
->internal_format
= orig_image
->internal_format
;
524 image
->planar_format
= orig_image
->planar_format
;
525 image
->dri_format
= orig_image
->dri_format
;
526 image
->format
= orig_image
->format
;
527 image
->offset
= orig_image
->offset
;
528 image
->width
= orig_image
->width
;
529 image
->height
= orig_image
->height
;
530 image
->tile_x
= orig_image
->tile_x
;
531 image
->tile_y
= orig_image
->tile_y
;
532 image
->data
= loaderPrivate
;
534 memcpy(image
->strides
, orig_image
->strides
, sizeof(image
->strides
));
535 memcpy(image
->offsets
, orig_image
->offsets
, sizeof(image
->offsets
));
541 intel_validate_usage(__DRIimage
*image
, unsigned int use
)
543 if (use
& __DRI_IMAGE_USE_CURSOR
) {
544 if (image
->region
->width
!= 64 || image
->region
->height
!= 64)
552 intel_create_image_from_names(__DRIscreen
*screen
,
553 int width
, int height
, int fourcc
,
554 int *names
, int num_names
,
555 int *strides
, int *offsets
,
558 struct intel_image_format
*f
= NULL
;
562 if (screen
== NULL
|| names
== NULL
|| num_names
!= 1)
565 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
566 if (intel_image_formats
[i
].fourcc
== fourcc
) {
567 f
= &intel_image_formats
[i
];
574 image
= intel_create_image_from_name(screen
, width
, height
,
575 __DRI_IMAGE_FORMAT_NONE
,
576 names
[0], strides
[0],
582 image
->planar_format
= f
;
583 for (i
= 0; i
< f
->nplanes
; i
++) {
584 index
= f
->planes
[i
].buffer_index
;
585 image
->offsets
[index
] = offsets
[index
];
586 image
->strides
[index
] = strides
[index
];
593 intel_create_image_from_fds(__DRIscreen
*screen
,
594 int width
, int height
, int fourcc
,
595 int *fds
, int num_fds
, int *strides
, int *offsets
,
598 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
599 struct intel_image_format
*f
= NULL
;
603 if (fds
== NULL
|| num_fds
!= 1)
606 for (i
= 0; i
< ARRAY_SIZE(intel_image_formats
); i
++) {
607 if (intel_image_formats
[i
].fourcc
== fourcc
) {
608 f
= &intel_image_formats
[i
];
615 image
= intel_allocate_image(__DRI_IMAGE_FORMAT_NONE
, loaderPrivate
);
619 image
->region
= intel_region_alloc_for_fd(intelScreen
,
620 f
->planes
[0].cpp
, width
, height
, strides
[0],
621 height
* strides
[0], fds
[0], "image");
622 if (image
->region
== NULL
) {
627 intel_setup_image_from_dimensions(image
);
629 image
->planar_format
= f
;
630 for (i
= 0; i
< f
->nplanes
; i
++) {
631 index
= f
->planes
[i
].buffer_index
;
632 image
->offsets
[index
] = offsets
[index
];
633 image
->strides
[index
] = strides
[index
];
641 intel_from_planar(__DRIimage
*parent
, int plane
, void *loaderPrivate
)
643 int width
, height
, offset
, stride
, dri_format
, index
;
644 struct intel_image_format
*f
;
645 uint32_t mask_x
, mask_y
;
648 if (parent
== NULL
|| parent
->planar_format
== NULL
)
651 f
= parent
->planar_format
;
653 if (plane
>= f
->nplanes
)
656 width
= parent
->region
->width
>> f
->planes
[plane
].width_shift
;
657 height
= parent
->region
->height
>> f
->planes
[plane
].height_shift
;
658 dri_format
= f
->planes
[plane
].dri_format
;
659 index
= f
->planes
[plane
].buffer_index
;
660 offset
= parent
->offsets
[index
];
661 stride
= parent
->strides
[index
];
663 image
= intel_allocate_image(dri_format
, loaderPrivate
);
667 if (offset
+ height
* stride
> parent
->region
->bo
->size
) {
668 _mesa_warning(NULL
, "intel_create_sub_image: subimage out of bounds");
673 image
->region
= calloc(sizeof(*image
->region
), 1);
674 if (image
->region
== NULL
) {
679 image
->region
->cpp
= _mesa_get_format_bytes(image
->format
);
680 image
->region
->width
= width
;
681 image
->region
->height
= height
;
682 image
->region
->pitch
= stride
;
683 image
->region
->refcount
= 1;
684 image
->region
->bo
= parent
->region
->bo
;
685 drm_intel_bo_reference(image
->region
->bo
);
686 image
->region
->tiling
= parent
->region
->tiling
;
687 image
->offset
= offset
;
688 intel_setup_image_from_dimensions(image
);
690 intel_region_get_tile_masks(image
->region
, &mask_x
, &mask_y
);
693 "intel_create_sub_image: offset not on tile boundary");
698 static const __DRIimageExtension intelImageExtension
= {
699 .base
= { __DRI_IMAGE
, 7 },
701 .createImageFromName
= intel_create_image_from_name
,
702 .createImageFromRenderbuffer
= intel_create_image_from_renderbuffer
,
703 .destroyImage
= intel_destroy_image
,
704 .createImage
= intel_create_image
,
705 .queryImage
= intel_query_image
,
706 .dupImage
= intel_dup_image
,
707 .validateUsage
= intel_validate_usage
,
708 .createImageFromNames
= intel_create_image_from_names
,
709 .fromPlanar
= intel_from_planar
,
710 .createImageFromTexture
= intel_create_image_from_texture
,
711 .createImageFromFds
= intel_create_image_from_fds
715 i915_query_renderer_integer(__DRIscreen
*psp
, int param
, unsigned int *value
)
717 const struct intel_screen
*const intelScreen
=
718 (struct intel_screen
*) psp
->driverPrivate
;
721 case __DRI2_RENDERER_VENDOR_ID
:
724 case __DRI2_RENDERER_DEVICE_ID
:
725 value
[0] = intelScreen
->deviceID
;
727 case __DRI2_RENDERER_ACCELERATED
:
730 case __DRI2_RENDERER_VIDEO_MEMORY
: {
731 /* Once a batch uses more than 75% of the maximum mappable size, we
732 * assume that there's some fragmentation, and we start doing extra
733 * flushing, etc. That's the big cliff apps will care about.
736 size_t mappable_size
;
738 drm_intel_get_aperture_sizes(psp
->fd
, &mappable_size
, &aper_size
);
740 const unsigned gpu_mappable_megabytes
=
741 (aper_size
/ (1024 * 1024)) * 3 / 4;
743 const long system_memory_pages
= sysconf(_SC_PHYS_PAGES
);
744 const long system_page_size
= sysconf(_SC_PAGE_SIZE
);
746 if (system_memory_pages
<= 0 || system_page_size
<= 0)
749 const uint64_t system_memory_bytes
= (uint64_t) system_memory_pages
750 * (uint64_t) system_page_size
;
752 const unsigned system_memory_megabytes
=
753 (unsigned) (system_memory_bytes
/ (1024 * 1024));
755 value
[0] = MIN2(system_memory_megabytes
, gpu_mappable_megabytes
);
758 case __DRI2_RENDERER_UNIFIED_MEMORY_ARCHITECTURE
:
761 case __DRI2_RENDERER_HAS_TEXTURE_3D
:
765 return driQueryRendererIntegerCommon(psp
, param
, value
);
772 i915_query_renderer_string(__DRIscreen
*psp
, int param
, const char **value
)
774 const struct intel_screen
*intelScreen
=
775 (struct intel_screen
*) psp
->driverPrivate
;
778 case __DRI2_RENDERER_VENDOR_ID
:
779 value
[0] = i915_vendor_string
;
781 case __DRI2_RENDERER_DEVICE_ID
:
782 value
[0] = i915_get_renderer_string(intelScreen
->deviceID
);
791 static const __DRI2rendererQueryExtension intelRendererQueryExtension
= {
792 .base
= { __DRI2_RENDERER_QUERY
, 1 },
794 .queryInteger
= i915_query_renderer_integer
,
795 .queryString
= i915_query_renderer_string
798 static const __DRIextension
*intelScreenExtensions
[] = {
799 &intelTexBufferExtension
.base
,
800 &intelFenceExtension
.base
,
801 &intelFlushExtension
.base
,
802 &intelImageExtension
.base
,
803 &intelRendererQueryExtension
.base
,
804 &dri2ConfigQueryExtension
.base
,
805 &dri2NoErrorExtension
.base
,
810 intel_get_param(__DRIscreen
*psp
, int param
, int *value
)
813 struct drm_i915_getparam gp
;
815 memset(&gp
, 0, sizeof(gp
));
819 ret
= drmCommandWriteRead(psp
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
822 _mesa_warning(NULL
, "drm_i915_getparam: %d", ret
);
830 intel_get_boolean(__DRIscreen
*psp
, int param
)
833 return intel_get_param(psp
, param
, &value
) && value
;
837 intelDestroyScreen(__DRIscreen
* sPriv
)
839 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
841 dri_bufmgr_destroy(intelScreen
->bufmgr
);
842 driDestroyOptionInfo(&intelScreen
->optionCache
);
845 sPriv
->driverPrivate
= NULL
;
850 * This is called when we need to set up GL rendering to a new X window.
853 intelCreateBuffer(__DRIscreen
* driScrnPriv
,
854 __DRIdrawable
* driDrawPriv
,
855 const struct gl_config
* mesaVis
, GLboolean isPixmap
)
857 struct intel_renderbuffer
*rb
;
858 mesa_format rgbFormat
;
859 struct gl_framebuffer
*fb
;
864 fb
= CALLOC_STRUCT(gl_framebuffer
);
868 _mesa_initialize_window_framebuffer(fb
, mesaVis
);
870 if (mesaVis
->redBits
== 5)
871 rgbFormat
= MESA_FORMAT_B5G6R5_UNORM
;
872 else if (mesaVis
->sRGBCapable
)
873 rgbFormat
= MESA_FORMAT_B8G8R8A8_SRGB
;
874 else if (mesaVis
->alphaBits
== 0)
875 rgbFormat
= MESA_FORMAT_B8G8R8X8_UNORM
;
877 rgbFormat
= MESA_FORMAT_B8G8R8A8_UNORM
;
879 /* setup the hardware-based renderbuffers */
880 rb
= intel_create_renderbuffer(rgbFormat
);
881 _mesa_attach_and_own_rb(fb
, BUFFER_FRONT_LEFT
, &rb
->Base
.Base
);
883 if (mesaVis
->doubleBufferMode
) {
884 rb
= intel_create_renderbuffer(rgbFormat
);
885 _mesa_attach_and_own_rb(fb
, BUFFER_BACK_LEFT
, &rb
->Base
.Base
);
889 * Assert here that the gl_config has an expected depth/stencil bit
890 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
891 * which constructs the advertised configs.)
893 if (mesaVis
->depthBits
== 24) {
894 assert(mesaVis
->stencilBits
== 8);
897 * Use combined depth/stencil. Note that the renderbuffer is
898 * attached to two attachment points.
900 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT
);
901 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
902 _mesa_attach_and_reference_rb(fb
, BUFFER_STENCIL
, &rb
->Base
.Base
);
904 else if (mesaVis
->depthBits
== 16) {
905 assert(mesaVis
->stencilBits
== 0);
906 rb
= intel_create_private_renderbuffer(MESA_FORMAT_Z_UNORM16
);
907 _mesa_attach_and_own_rb(fb
, BUFFER_DEPTH
, &rb
->Base
.Base
);
910 assert(mesaVis
->depthBits
== 0);
911 assert(mesaVis
->stencilBits
== 0);
914 /* now add any/all software-based renderbuffers we may need */
915 _swrast_add_soft_renderbuffers(fb
,
916 false, /* never sw color */
917 false, /* never sw depth */
918 false, /* never sw stencil */
919 mesaVis
->accumRedBits
> 0,
920 false, /* never sw alpha */
921 false /* never sw aux */ );
922 driDrawPriv
->driverPrivate
= fb
;
928 intelDestroyBuffer(__DRIdrawable
* driDrawPriv
)
930 struct gl_framebuffer
*fb
= driDrawPriv
->driverPrivate
;
932 _mesa_reference_framebuffer(&fb
, NULL
);
935 /* There are probably better ways to do this, such as an
936 * init-designated function to register chipids and createcontext
940 i830CreateContext(int api
,
941 const struct gl_config
*mesaVis
,
942 __DRIcontext
*driContextPriv
,
943 unsigned major_version
,
944 unsigned minor_version
,
947 void *sharedContextPrivate
);
950 i915CreateContext(int api
,
951 const struct gl_config
*mesaVis
,
952 __DRIcontext
*driContextPriv
,
953 unsigned major_version
,
954 unsigned minor_version
,
957 void *sharedContextPrivate
);
960 intelCreateContext(gl_api api
,
961 const struct gl_config
* mesaVis
,
962 __DRIcontext
* driContextPriv
,
963 unsigned major_version
,
964 unsigned minor_version
,
968 void *sharedContextPrivate
)
970 bool success
= false;
972 __DRIscreen
*sPriv
= driContextPriv
->driScreenPriv
;
973 struct intel_screen
*intelScreen
= sPriv
->driverPrivate
;
975 if (flags
& ~__DRI_CTX_FLAG_DEBUG
) {
976 *error
= __DRI_CTX_ERROR_UNKNOWN_FLAG
;
981 *error
= __DRI_CTX_ERROR_UNKNOWN_ATTRIBUTE
;
985 if (IS_GEN3(intelScreen
->deviceID
)) {
986 success
= i915CreateContext(api
, mesaVis
, driContextPriv
,
987 major_version
, minor_version
, flags
,
988 error
, sharedContextPrivate
);
990 intelScreen
->no_vbo
= true;
991 success
= i830CreateContext(api
, mesaVis
, driContextPriv
,
992 major_version
, minor_version
, flags
,
993 error
, sharedContextPrivate
);
999 if (driContextPriv
->driverPrivate
!= NULL
)
1000 intelDestroyContext(driContextPriv
);
1006 intel_init_bufmgr(struct intel_screen
*intelScreen
)
1008 __DRIscreen
*spriv
= intelScreen
->driScrnPriv
;
1010 intelScreen
->no_hw
= getenv("INTEL_NO_HW") != NULL
;
1012 intelScreen
->bufmgr
= intel_bufmgr_gem_init(spriv
->fd
, BATCH_SZ
);
1013 if (intelScreen
->bufmgr
== NULL
) {
1014 fprintf(stderr
, "[%s:%u] Error initializing buffer manager.\n",
1015 __func__
, __LINE__
);
1019 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen
->bufmgr
);
1021 if (!intel_get_boolean(spriv
, I915_PARAM_HAS_RELAXED_DELTA
)) {
1022 fprintf(stderr
, "[%s: %u] Kernel 2.6.39 required.\n", __func__
, __LINE__
);
1030 intel_detect_swizzling(struct intel_screen
*screen
)
1032 drm_intel_bo
*buffer
;
1033 unsigned long flags
= 0;
1034 unsigned long aligned_pitch
;
1035 uint32_t tiling
= I915_TILING_X
;
1036 uint32_t swizzle_mode
= 0;
1038 buffer
= drm_intel_bo_alloc_tiled(screen
->bufmgr
, "swizzle test",
1040 &tiling
, &aligned_pitch
, flags
);
1044 drm_intel_bo_get_tiling(buffer
, &tiling
, &swizzle_mode
);
1045 drm_intel_bo_unreference(buffer
);
1047 if (swizzle_mode
== I915_BIT_6_SWIZZLE_NONE
)
1053 static __DRIconfig
**
1054 intel_screen_make_configs(__DRIscreen
*dri_screen
)
1056 static const mesa_format formats
[] = {
1057 MESA_FORMAT_B5G6R5_UNORM
,
1058 MESA_FORMAT_B8G8R8A8_UNORM
,
1059 MESA_FORMAT_B8G8R8X8_UNORM
1062 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1063 static const GLenum back_buffer_modes
[] = {
1064 GLX_SWAP_UNDEFINED_OML
, GLX_NONE
,
1067 static const uint8_t singlesample_samples
[1] = {0};
1069 uint8_t depth_bits
[4], stencil_bits
[4];
1070 __DRIconfig
**configs
= NULL
;
1072 /* Generate singlesample configs without accumulation buffer. */
1073 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1074 __DRIconfig
**new_configs
;
1075 int num_depth_stencil_bits
= 2;
1077 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1078 * buffer that has a different number of bits per pixel than the color
1082 stencil_bits
[0] = 0;
1084 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1086 stencil_bits
[1] = 0;
1089 stencil_bits
[1] = 8;
1092 new_configs
= driCreateConfigs(formats
[i
],
1095 num_depth_stencil_bits
,
1096 back_buffer_modes
, 2,
1097 singlesample_samples
, 1,
1099 configs
= driConcatConfigs(configs
, new_configs
);
1102 /* Generate the minimum possible set of configs that include an
1103 * accumulation buffer.
1105 for (int i
= 0; i
< ARRAY_SIZE(formats
); i
++) {
1106 __DRIconfig
**new_configs
;
1108 if (formats
[i
] == MESA_FORMAT_B5G6R5_UNORM
) {
1110 stencil_bits
[0] = 0;
1113 stencil_bits
[0] = 8;
1116 new_configs
= driCreateConfigs(formats
[i
],
1117 depth_bits
, stencil_bits
, 1,
1118 back_buffer_modes
, 1,
1119 singlesample_samples
, 1,
1121 configs
= driConcatConfigs(configs
, new_configs
);
1124 if (configs
== NULL
) {
1125 fprintf(stderr
, "[%s:%u] Error creating FBConfig!\n", __func__
,
1134 set_max_gl_versions(struct intel_screen
*screen
)
1136 __DRIscreen
*psp
= screen
->driScrnPriv
;
1138 switch (screen
->gen
) {
1140 bool has_fragment_shader
= driQueryOptionb(&screen
->optionCache
, "fragment_shader");
1141 bool has_occlusion_query
= driQueryOptionb(&screen
->optionCache
, "stub_occlusion_query");
1143 psp
->max_gl_core_version
= 0;
1144 psp
->max_gl_es1_version
= 11;
1145 psp
->max_gl_es2_version
= 20;
1147 if (has_fragment_shader
&& has_occlusion_query
) {
1148 psp
->max_gl_compat_version
= 21;
1150 psp
->max_gl_compat_version
= 14;
1155 psp
->max_gl_core_version
= 0;
1156 psp
->max_gl_compat_version
= 13;
1157 psp
->max_gl_es1_version
= 11;
1158 psp
->max_gl_es2_version
= 0;
1161 assert(!"unrecognized intel_screen::gen");
1167 * This is the driver specific part of the createNewScreen entry point.
1168 * Called when using DRI2.
1170 * \return the struct gl_config supported by this driver
1173 __DRIconfig
**intelInitScreen2(__DRIscreen
*psp
)
1175 struct intel_screen
*intelScreen
;
1177 if (psp
->image
.loader
) {
1178 } else if (psp
->dri2
.loader
->base
.version
<= 2 ||
1179 psp
->dri2
.loader
->getBuffersWithFormat
== NULL
) {
1181 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1182 "support required\n");
1186 /* Allocate the private area */
1187 intelScreen
= calloc(1, sizeof *intelScreen
);
1189 fprintf(stderr
, "\nERROR! Allocating private area failed\n");
1192 /* parse information in __driConfigOptions */
1193 driParseOptionInfo(&intelScreen
->optionCache
, i915_config_options
.xml
);
1195 intelScreen
->driScrnPriv
= psp
;
1196 psp
->driverPrivate
= (void *) intelScreen
;
1198 if (!intel_init_bufmgr(intelScreen
))
1201 intelScreen
->deviceID
= drm_intel_bufmgr_gem_get_devid(intelScreen
->bufmgr
);
1203 if (IS_GEN3(intelScreen
->deviceID
)) {
1204 intelScreen
->gen
= 3;
1206 intelScreen
->gen
= 2;
1209 intelScreen
->hw_has_swizzling
= intel_detect_swizzling(intelScreen
);
1211 set_max_gl_versions(intelScreen
);
1213 psp
->extensions
= intelScreenExtensions
;
1215 return (const __DRIconfig
**) intel_screen_make_configs(psp
);
1218 struct intel_buffer
{
1220 struct intel_region
*region
;
1223 static __DRIbuffer
*
1224 intelAllocateBuffer(__DRIscreen
*screen
,
1225 unsigned attachment
, unsigned format
,
1226 int width
, int height
)
1228 struct intel_buffer
*intelBuffer
;
1229 struct intel_screen
*intelScreen
= screen
->driverPrivate
;
1231 assert(attachment
== __DRI_BUFFER_FRONT_LEFT
||
1232 attachment
== __DRI_BUFFER_BACK_LEFT
);
1234 intelBuffer
= calloc(1, sizeof *intelBuffer
);
1235 if (intelBuffer
== NULL
)
1238 /* The front and back buffers are color buffers, which are X tiled. */
1239 intelBuffer
->region
= intel_region_alloc(intelScreen
,
1246 if (intelBuffer
->region
== NULL
) {
1251 intel_region_flink(intelBuffer
->region
, &intelBuffer
->base
.name
);
1253 intelBuffer
->base
.attachment
= attachment
;
1254 intelBuffer
->base
.cpp
= intelBuffer
->region
->cpp
;
1255 intelBuffer
->base
.pitch
= intelBuffer
->region
->pitch
;
1257 return &intelBuffer
->base
;
1261 intelReleaseBuffer(__DRIscreen
*screen
, __DRIbuffer
*buffer
)
1263 struct intel_buffer
*intelBuffer
= (struct intel_buffer
*) buffer
;
1265 intel_region_release(&intelBuffer
->region
);
1270 static const struct __DriverAPIRec i915_driver_api
= {
1271 .InitScreen
= intelInitScreen2
,
1272 .DestroyScreen
= intelDestroyScreen
,
1273 .CreateContext
= intelCreateContext
,
1274 .DestroyContext
= intelDestroyContext
,
1275 .CreateBuffer
= intelCreateBuffer
,
1276 .DestroyBuffer
= intelDestroyBuffer
,
1277 .MakeCurrent
= intelMakeCurrent
,
1278 .UnbindContext
= intelUnbindContext
,
1279 .AllocateBuffer
= intelAllocateBuffer
,
1280 .ReleaseBuffer
= intelReleaseBuffer
1283 static const struct __DRIDriverVtableExtensionRec i915_vtable
= {
1284 .base
= { __DRI_DRIVER_VTABLE
, 1 },
1285 .vtable
= &i915_driver_api
,
1288 /* This is the table of extensions that the loader will dlsym() for. */
1289 static const __DRIextension
*i915_driver_extensions
[] = {
1290 &driCoreExtension
.base
,
1291 &driImageDriverExtension
.base
,
1292 &driDRI2Extension
.base
,
1294 &i915_config_options
.base
,
1298 PUBLIC
const __DRIextension
**__driDriverGetExtensions_i915(void)
1300 globalDriverAPI
= &i915_driver_api
;
1302 return i915_driver_extensions
;