i915: Remove the I915 macro from the formerly shared code.
[mesa.git] / src / mesa / drivers / dri / i915 / intel_screen.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include <errno.h>
29 #include <time.h>
30 #include "main/glheader.h"
31 #include "main/context.h"
32 #include "main/framebuffer.h"
33 #include "main/renderbuffer.h"
34 #include "main/texobj.h"
35 #include "main/hash.h"
36 #include "main/fbobject.h"
37 #include "main/version.h"
38 #include "swrast/s_renderbuffer.h"
39
40 #include "utils.h"
41 #include "xmlpool.h"
42
43 PUBLIC const char __driConfigOptions[] =
44 DRI_CONF_BEGIN
45 DRI_CONF_SECTION_PERFORMANCE
46 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_ALWAYS_SYNC)
47 /* Options correspond to DRI_CONF_BO_REUSE_DISABLED,
48 * DRI_CONF_BO_REUSE_ALL
49 */
50 DRI_CONF_OPT_BEGIN_V(bo_reuse, enum, 1, "0:1")
51 DRI_CONF_DESC_BEGIN(en, "Buffer object reuse")
52 DRI_CONF_ENUM(0, "Disable buffer object reuse")
53 DRI_CONF_ENUM(1, "Enable reuse of all sizes of buffer objects")
54 DRI_CONF_DESC_END
55 DRI_CONF_OPT_END
56
57 DRI_CONF_OPT_BEGIN_B(early_z, "false")
58 DRI_CONF_DESC(en, "Enable early Z in classic mode (unstable, 945-only).")
59 DRI_CONF_OPT_END
60
61 DRI_CONF_SECTION_END
62 DRI_CONF_SECTION_QUALITY
63 DRI_CONF_FORCE_S3TC_ENABLE("false")
64 DRI_CONF_ALLOW_LARGE_TEXTURES(2)
65 DRI_CONF_SECTION_END
66 DRI_CONF_SECTION_DEBUG
67 DRI_CONF_NO_RAST("false")
68 DRI_CONF_ALWAYS_FLUSH_BATCH("false")
69 DRI_CONF_ALWAYS_FLUSH_CACHE("false")
70 DRI_CONF_DISABLE_THROTTLING("false")
71 DRI_CONF_FORCE_GLSL_EXTENSIONS_WARN("false")
72 DRI_CONF_DISABLE_GLSL_LINE_CONTINUATIONS("false")
73 DRI_CONF_DISABLE_BLEND_FUNC_EXTENDED("false")
74
75 DRI_CONF_OPT_BEGIN_B(shader_precompile, "true")
76 DRI_CONF_DESC(en, "Perform code generation at shader link time.")
77 DRI_CONF_OPT_END
78 DRI_CONF_SECTION_END
79 DRI_CONF_END;
80
81 const GLuint __driNConfigOptions = 13;
82
83 #include "intel_batchbuffer.h"
84 #include "intel_buffers.h"
85 #include "intel_bufmgr.h"
86 #include "intel_chipset.h"
87 #include "intel_fbo.h"
88 #include "intel_mipmap_tree.h"
89 #include "intel_screen.h"
90 #include "intel_tex.h"
91 #include "intel_regions.h"
92
93 #include "i915_drm.h"
94
95 #ifdef USE_NEW_INTERFACE
96 static PFNGLXCREATECONTEXTMODES create_context_modes = NULL;
97 #endif /*USE_NEW_INTERFACE */
98
99 /**
100 * For debugging purposes, this returns a time in seconds.
101 */
102 double
103 get_time(void)
104 {
105 struct timespec tp;
106
107 clock_gettime(CLOCK_MONOTONIC, &tp);
108
109 return tp.tv_sec + tp.tv_nsec / 1000000000.0;
110 }
111
112 void
113 aub_dump_bmp(struct gl_context *ctx)
114 {
115 struct gl_framebuffer *fb = ctx->DrawBuffer;
116
117 for (int i = 0; i < fb->_NumColorDrawBuffers; i++) {
118 struct intel_renderbuffer *irb =
119 intel_renderbuffer(fb->_ColorDrawBuffers[i]);
120
121 if (irb && irb->mt) {
122 enum aub_dump_bmp_format format;
123
124 switch (irb->Base.Base.Format) {
125 case MESA_FORMAT_ARGB8888:
126 case MESA_FORMAT_XRGB8888:
127 format = AUB_DUMP_BMP_FORMAT_ARGB_8888;
128 break;
129 default:
130 continue;
131 }
132
133 assert(irb->mt->region->pitch % irb->mt->region->cpp == 0);
134 drm_intel_gem_bo_aub_dump_bmp(irb->mt->region->bo,
135 irb->draw_x,
136 irb->draw_y,
137 irb->Base.Base.Width,
138 irb->Base.Base.Height,
139 format,
140 irb->mt->region->pitch,
141 0);
142 }
143 }
144 }
145
146 static const __DRItexBufferExtension intelTexBufferExtension = {
147 .base = { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
148
149 .setTexBuffer = intelSetTexBuffer,
150 .setTexBuffer2 = intelSetTexBuffer2,
151 .releaseTexBuffer = NULL,
152 };
153
154 static void
155 intelDRI2Flush(__DRIdrawable *drawable)
156 {
157 GET_CURRENT_CONTEXT(ctx);
158 struct intel_context *intel = intel_context(ctx);
159 if (intel == NULL)
160 return;
161
162 if (intel->gen < 4)
163 INTEL_FIREVERTICES(intel);
164
165 intel->need_throttle = true;
166
167 if (intel->batch.used)
168 intel_batchbuffer_flush(intel);
169
170 if (INTEL_DEBUG & DEBUG_AUB) {
171 aub_dump_bmp(ctx);
172 }
173 }
174
175 static const struct __DRI2flushExtensionRec intelFlushExtension = {
176 .base = { __DRI2_FLUSH, 3 },
177
178 .flush = intelDRI2Flush,
179 .invalidate = dri2InvalidateDrawable,
180 };
181
182 static struct intel_image_format intel_image_formats[] = {
183 { __DRI_IMAGE_FOURCC_ARGB8888, __DRI_IMAGE_COMPONENTS_RGBA, 1,
184 { { 0, 0, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } },
185
186 { __DRI_IMAGE_FOURCC_XRGB8888, __DRI_IMAGE_COMPONENTS_RGB, 1,
187 { { 0, 0, 0, __DRI_IMAGE_FORMAT_XRGB8888, 4 }, } },
188
189 { __DRI_IMAGE_FOURCC_YUV410, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
190 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
191 { 1, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 },
192 { 2, 2, 2, __DRI_IMAGE_FORMAT_R8, 1 } } },
193
194 { __DRI_IMAGE_FOURCC_YUV411, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
195 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
196 { 1, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 },
197 { 2, 2, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
198
199 { __DRI_IMAGE_FOURCC_YUV420, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
200 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
201 { 1, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 },
202 { 2, 1, 1, __DRI_IMAGE_FORMAT_R8, 1 } } },
203
204 { __DRI_IMAGE_FOURCC_YUV422, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
205 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
206 { 1, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 },
207 { 2, 1, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
208
209 { __DRI_IMAGE_FOURCC_YUV444, __DRI_IMAGE_COMPONENTS_Y_U_V, 3,
210 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
211 { 1, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
212 { 2, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 } } },
213
214 { __DRI_IMAGE_FOURCC_NV12, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
215 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
216 { 1, 1, 1, __DRI_IMAGE_FORMAT_GR88, 2 } } },
217
218 { __DRI_IMAGE_FOURCC_NV16, __DRI_IMAGE_COMPONENTS_Y_UV, 2,
219 { { 0, 0, 0, __DRI_IMAGE_FORMAT_R8, 1 },
220 { 1, 1, 0, __DRI_IMAGE_FORMAT_GR88, 2 } } },
221
222 /* For YUYV buffers, we set up two overlapping DRI images and treat
223 * them as planar buffers in the compositors. Plane 0 is GR88 and
224 * samples YU or YV pairs and places Y into the R component, while
225 * plane 1 is ARGB and samples YUYV clusters and places pairs and
226 * places U into the G component and V into A. This lets the
227 * texture sampler interpolate the Y components correctly when
228 * sampling from plane 0, and interpolate U and V correctly when
229 * sampling from plane 1. */
230 { __DRI_IMAGE_FOURCC_YUYV, __DRI_IMAGE_COMPONENTS_Y_XUXV, 2,
231 { { 0, 0, 0, __DRI_IMAGE_FORMAT_GR88, 2 },
232 { 0, 1, 0, __DRI_IMAGE_FORMAT_ARGB8888, 4 } } }
233 };
234
235 static __DRIimage *
236 intel_allocate_image(int dri_format, void *loaderPrivate)
237 {
238 __DRIimage *image;
239
240 image = calloc(1, sizeof *image);
241 if (image == NULL)
242 return NULL;
243
244 image->dri_format = dri_format;
245 image->offset = 0;
246
247 switch (dri_format) {
248 case __DRI_IMAGE_FORMAT_RGB565:
249 image->format = MESA_FORMAT_RGB565;
250 break;
251 case __DRI_IMAGE_FORMAT_XRGB8888:
252 image->format = MESA_FORMAT_XRGB8888;
253 break;
254 case __DRI_IMAGE_FORMAT_ARGB8888:
255 image->format = MESA_FORMAT_ARGB8888;
256 break;
257 case __DRI_IMAGE_FORMAT_ABGR8888:
258 image->format = MESA_FORMAT_RGBA8888_REV;
259 break;
260 case __DRI_IMAGE_FORMAT_XBGR8888:
261 image->format = MESA_FORMAT_RGBX8888_REV;
262 break;
263 case __DRI_IMAGE_FORMAT_R8:
264 image->format = MESA_FORMAT_R8;
265 break;
266 case __DRI_IMAGE_FORMAT_GR88:
267 image->format = MESA_FORMAT_GR88;
268 break;
269 case __DRI_IMAGE_FORMAT_NONE:
270 image->format = MESA_FORMAT_NONE;
271 break;
272 default:
273 free(image);
274 return NULL;
275 }
276
277 image->internal_format = _mesa_get_format_base_format(image->format);
278 image->data = loaderPrivate;
279
280 return image;
281 }
282
283 /**
284 * Sets up a DRIImage structure to point to our shared image in a region
285 */
286 static void
287 intel_setup_image_from_mipmap_tree(struct intel_context *intel, __DRIimage *image,
288 struct intel_mipmap_tree *mt, GLuint level,
289 GLuint zoffset)
290 {
291 unsigned int draw_x, draw_y;
292 uint32_t mask_x, mask_y;
293
294 intel_miptree_check_level_layer(mt, level, zoffset);
295
296 intel_region_get_tile_masks(mt->region, &mask_x, &mask_y, false);
297 intel_miptree_get_image_offset(mt, level, zoffset, &draw_x, &draw_y);
298
299 image->width = mt->level[level].width;
300 image->height = mt->level[level].height;
301 image->tile_x = draw_x & mask_x;
302 image->tile_y = draw_y & mask_y;
303
304 image->offset = intel_region_get_aligned_offset(mt->region,
305 draw_x & ~mask_x,
306 draw_y & ~mask_y,
307 false);
308
309 intel_region_reference(&image->region, mt->region);
310 }
311
312 static void
313 intel_setup_image_from_dimensions(__DRIimage *image)
314 {
315 image->width = image->region->width;
316 image->height = image->region->height;
317 image->tile_x = 0;
318 image->tile_y = 0;
319 image->has_depthstencil = false;
320 }
321
322 static inline uint32_t
323 intel_dri_format(GLuint format)
324 {
325 switch (format) {
326 case MESA_FORMAT_RGB565:
327 return __DRI_IMAGE_FORMAT_RGB565;
328 case MESA_FORMAT_XRGB8888:
329 return __DRI_IMAGE_FORMAT_XRGB8888;
330 case MESA_FORMAT_ARGB8888:
331 return __DRI_IMAGE_FORMAT_ARGB8888;
332 case MESA_FORMAT_RGBA8888_REV:
333 return __DRI_IMAGE_FORMAT_ABGR8888;
334 case MESA_FORMAT_R8:
335 return __DRI_IMAGE_FORMAT_R8;
336 case MESA_FORMAT_RG88:
337 return __DRI_IMAGE_FORMAT_GR88;
338 }
339
340 return MESA_FORMAT_NONE;
341 }
342
343 static __DRIimage *
344 intel_create_image_from_name(__DRIscreen *screen,
345 int width, int height, int format,
346 int name, int pitch, void *loaderPrivate)
347 {
348 struct intel_screen *intelScreen = screen->driverPrivate;
349 __DRIimage *image;
350 int cpp;
351
352 image = intel_allocate_image(format, loaderPrivate);
353 if (image == NULL)
354 return NULL;
355
356 if (image->format == MESA_FORMAT_NONE)
357 cpp = 1;
358 else
359 cpp = _mesa_get_format_bytes(image->format);
360 image->region = intel_region_alloc_for_handle(intelScreen,
361 cpp, width, height,
362 pitch * cpp, name, "image");
363 if (image->region == NULL) {
364 free(image);
365 return NULL;
366 }
367
368 intel_setup_image_from_dimensions(image);
369
370 return image;
371 }
372
373 static __DRIimage *
374 intel_create_image_from_renderbuffer(__DRIcontext *context,
375 int renderbuffer, void *loaderPrivate)
376 {
377 __DRIimage *image;
378 struct intel_context *intel = context->driverPrivate;
379 struct gl_renderbuffer *rb;
380 struct intel_renderbuffer *irb;
381
382 rb = _mesa_lookup_renderbuffer(&intel->ctx, renderbuffer);
383 if (!rb) {
384 _mesa_error(&intel->ctx,
385 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
386 return NULL;
387 }
388
389 irb = intel_renderbuffer(rb);
390 image = calloc(1, sizeof *image);
391 if (image == NULL)
392 return NULL;
393
394 image->internal_format = rb->InternalFormat;
395 image->format = rb->Format;
396 image->offset = 0;
397 image->data = loaderPrivate;
398 intel_region_reference(&image->region, irb->mt->region);
399 intel_setup_image_from_dimensions(image);
400 image->dri_format = intel_dri_format(image->format);
401 image->has_depthstencil = irb->mt->stencil_mt? true : false;
402
403 rb->NeedsFinishRenderTexture = true;
404 return image;
405 }
406
407 static __DRIimage *
408 intel_create_image_from_texture(__DRIcontext *context, int target,
409 unsigned texture, int zoffset,
410 int level,
411 unsigned *error,
412 void *loaderPrivate)
413 {
414 __DRIimage *image;
415 struct intel_context *intel = context->driverPrivate;
416 struct gl_texture_object *obj;
417 struct intel_texture_object *iobj;
418 GLuint face = 0;
419
420 obj = _mesa_lookup_texture(&intel->ctx, texture);
421 if (!obj || obj->Target != target) {
422 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
423 return NULL;
424 }
425
426 if (target == GL_TEXTURE_CUBE_MAP)
427 face = zoffset;
428
429 _mesa_test_texobj_completeness(&intel->ctx, obj);
430 iobj = intel_texture_object(obj);
431 if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) {
432 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
433 return NULL;
434 }
435
436 if (level < obj->BaseLevel || level > obj->_MaxLevel) {
437 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
438 return NULL;
439 }
440
441 if (target == GL_TEXTURE_3D && obj->Image[face][level]->Depth < zoffset) {
442 *error = __DRI_IMAGE_ERROR_BAD_MATCH;
443 return NULL;
444 }
445 image = calloc(1, sizeof *image);
446 if (image == NULL) {
447 *error = __DRI_IMAGE_ERROR_BAD_ALLOC;
448 return NULL;
449 }
450
451 image->internal_format = obj->Image[face][level]->InternalFormat;
452 image->format = obj->Image[face][level]->TexFormat;
453 image->data = loaderPrivate;
454 intel_setup_image_from_mipmap_tree(intel, image, iobj->mt, level, zoffset);
455 image->dri_format = intel_dri_format(image->format);
456 image->has_depthstencil = iobj->mt->stencil_mt? true : false;
457 if (image->dri_format == MESA_FORMAT_NONE) {
458 *error = __DRI_IMAGE_ERROR_BAD_PARAMETER;
459 free(image);
460 return NULL;
461 }
462
463 *error = __DRI_IMAGE_ERROR_SUCCESS;
464 return image;
465 }
466
467 static void
468 intel_destroy_image(__DRIimage *image)
469 {
470 intel_region_release(&image->region);
471 free(image);
472 }
473
474 static __DRIimage *
475 intel_create_image(__DRIscreen *screen,
476 int width, int height, int format,
477 unsigned int use,
478 void *loaderPrivate)
479 {
480 __DRIimage *image;
481 struct intel_screen *intelScreen = screen->driverPrivate;
482 uint32_t tiling;
483 int cpp;
484
485 tiling = I915_TILING_X;
486 if (use & __DRI_IMAGE_USE_CURSOR) {
487 if (width != 64 || height != 64)
488 return NULL;
489 tiling = I915_TILING_NONE;
490 }
491
492 image = intel_allocate_image(format, loaderPrivate);
493 if (image == NULL)
494 return NULL;
495
496 cpp = _mesa_get_format_bytes(image->format);
497 image->region =
498 intel_region_alloc(intelScreen, tiling, cpp, width, height, true);
499 if (image->region == NULL) {
500 free(image);
501 return NULL;
502 }
503
504 intel_setup_image_from_dimensions(image);
505
506 return image;
507 }
508
509 static GLboolean
510 intel_query_image(__DRIimage *image, int attrib, int *value)
511 {
512 switch (attrib) {
513 case __DRI_IMAGE_ATTRIB_STRIDE:
514 *value = image->region->pitch;
515 return true;
516 case __DRI_IMAGE_ATTRIB_HANDLE:
517 *value = image->region->bo->handle;
518 return true;
519 case __DRI_IMAGE_ATTRIB_NAME:
520 return intel_region_flink(image->region, (uint32_t *) value);
521 case __DRI_IMAGE_ATTRIB_FORMAT:
522 *value = image->dri_format;
523 return true;
524 case __DRI_IMAGE_ATTRIB_WIDTH:
525 *value = image->region->width;
526 return true;
527 case __DRI_IMAGE_ATTRIB_HEIGHT:
528 *value = image->region->height;
529 return true;
530 case __DRI_IMAGE_ATTRIB_COMPONENTS:
531 if (image->planar_format == NULL)
532 return false;
533 *value = image->planar_format->components;
534 return true;
535 case __DRI_IMAGE_ATTRIB_FD:
536 if (drm_intel_bo_gem_export_to_prime(image->region->bo, value) == 0)
537 return true;
538 return false;
539 default:
540 return false;
541 }
542 }
543
544 static __DRIimage *
545 intel_dup_image(__DRIimage *orig_image, void *loaderPrivate)
546 {
547 __DRIimage *image;
548
549 image = calloc(1, sizeof *image);
550 if (image == NULL)
551 return NULL;
552
553 intel_region_reference(&image->region, orig_image->region);
554 if (image->region == NULL) {
555 free(image);
556 return NULL;
557 }
558
559 image->internal_format = orig_image->internal_format;
560 image->planar_format = orig_image->planar_format;
561 image->dri_format = orig_image->dri_format;
562 image->format = orig_image->format;
563 image->offset = orig_image->offset;
564 image->width = orig_image->width;
565 image->height = orig_image->height;
566 image->tile_x = orig_image->tile_x;
567 image->tile_y = orig_image->tile_y;
568 image->has_depthstencil = orig_image->has_depthstencil;
569 image->data = loaderPrivate;
570
571 memcpy(image->strides, orig_image->strides, sizeof(image->strides));
572 memcpy(image->offsets, orig_image->offsets, sizeof(image->offsets));
573
574 return image;
575 }
576
577 static GLboolean
578 intel_validate_usage(__DRIimage *image, unsigned int use)
579 {
580 if (use & __DRI_IMAGE_USE_CURSOR) {
581 if (image->region->width != 64 || image->region->height != 64)
582 return GL_FALSE;
583 }
584
585 return GL_TRUE;
586 }
587
588 static __DRIimage *
589 intel_create_image_from_names(__DRIscreen *screen,
590 int width, int height, int fourcc,
591 int *names, int num_names,
592 int *strides, int *offsets,
593 void *loaderPrivate)
594 {
595 struct intel_image_format *f = NULL;
596 __DRIimage *image;
597 int i, index;
598
599 if (screen == NULL || names == NULL || num_names != 1)
600 return NULL;
601
602 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
603 if (intel_image_formats[i].fourcc == fourcc) {
604 f = &intel_image_formats[i];
605 }
606 }
607
608 if (f == NULL)
609 return NULL;
610
611 image = intel_create_image_from_name(screen, width, height,
612 __DRI_IMAGE_FORMAT_NONE,
613 names[0], strides[0],
614 loaderPrivate);
615
616 if (image == NULL)
617 return NULL;
618
619 image->planar_format = f;
620 for (i = 0; i < f->nplanes; i++) {
621 index = f->planes[i].buffer_index;
622 image->offsets[index] = offsets[index];
623 image->strides[index] = strides[index];
624 }
625
626 return image;
627 }
628
629 static __DRIimage *
630 intel_create_image_from_fds(__DRIscreen *screen,
631 int width, int height, int fourcc,
632 int *fds, int num_fds, int *strides, int *offsets,
633 void *loaderPrivate)
634 {
635 struct intel_screen *intelScreen = screen->driverPrivate;
636 struct intel_image_format *f = NULL;
637 __DRIimage *image;
638 int i, index;
639
640 if (fds == NULL || num_fds != 1)
641 return NULL;
642
643 for (i = 0; i < ARRAY_SIZE(intel_image_formats); i++) {
644 if (intel_image_formats[i].fourcc == fourcc) {
645 f = &intel_image_formats[i];
646 }
647 }
648
649 if (f == NULL)
650 return NULL;
651
652 image = intel_allocate_image(__DRI_IMAGE_FORMAT_NONE, loaderPrivate);
653 if (image == NULL)
654 return NULL;
655
656 image->region = intel_region_alloc_for_fd(intelScreen,
657 1, width, height,
658 strides[0], fds[0], "image");
659 if (image->region == NULL) {
660 free(image);
661 return NULL;
662 }
663
664 image->planar_format = f;
665 for (i = 0; i < f->nplanes; i++) {
666 index = f->planes[i].buffer_index;
667 image->offsets[index] = offsets[index];
668 image->strides[index] = strides[index];
669 }
670
671 return image;
672 }
673
674
675 static __DRIimage *
676 intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate)
677 {
678 int width, height, offset, stride, dri_format, index;
679 struct intel_image_format *f;
680 uint32_t mask_x, mask_y;
681 __DRIimage *image;
682
683 if (parent == NULL || parent->planar_format == NULL)
684 return NULL;
685
686 f = parent->planar_format;
687
688 if (plane >= f->nplanes)
689 return NULL;
690
691 width = parent->region->width >> f->planes[plane].width_shift;
692 height = parent->region->height >> f->planes[plane].height_shift;
693 dri_format = f->planes[plane].dri_format;
694 index = f->planes[plane].buffer_index;
695 offset = parent->offsets[index];
696 stride = parent->strides[index];
697
698 image = intel_allocate_image(dri_format, loaderPrivate);
699 if (image == NULL)
700 return NULL;
701
702 if (offset + height * stride > parent->region->bo->size) {
703 _mesa_warning(NULL, "intel_create_sub_image: subimage out of bounds");
704 free(image);
705 return NULL;
706 }
707
708 image->region = calloc(sizeof(*image->region), 1);
709 if (image->region == NULL) {
710 free(image);
711 return NULL;
712 }
713
714 image->region->cpp = _mesa_get_format_bytes(image->format);
715 image->region->width = width;
716 image->region->height = height;
717 image->region->pitch = stride;
718 image->region->refcount = 1;
719 image->region->bo = parent->region->bo;
720 drm_intel_bo_reference(image->region->bo);
721 image->region->tiling = parent->region->tiling;
722 image->offset = offset;
723 intel_setup_image_from_dimensions(image);
724
725 intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false);
726 if (offset & mask_x)
727 _mesa_warning(NULL,
728 "intel_create_sub_image: offset not on tile boundary");
729
730 return image;
731 }
732
733 static struct __DRIimageExtensionRec intelImageExtension = {
734 .base = { __DRI_IMAGE, 7 },
735
736 .createImageFromName = intel_create_image_from_name,
737 .createImageFromRenderbuffer = intel_create_image_from_renderbuffer,
738 .destroyImage = intel_destroy_image,
739 .createImage = intel_create_image,
740 .queryImage = intel_query_image,
741 .dupImage = intel_dup_image,
742 .validateUsage = intel_validate_usage,
743 .createImageFromNames = intel_create_image_from_names,
744 .fromPlanar = intel_from_planar,
745 .createImageFromTexture = intel_create_image_from_texture,
746 .createImageFromFds = intel_create_image_from_fds
747 };
748
749 static const __DRIextension *intelScreenExtensions[] = {
750 &intelTexBufferExtension.base,
751 &intelFlushExtension.base,
752 &intelImageExtension.base,
753 &dri2ConfigQueryExtension.base,
754 NULL
755 };
756
757 static bool
758 intel_get_param(__DRIscreen *psp, int param, int *value)
759 {
760 int ret;
761 struct drm_i915_getparam gp;
762
763 memset(&gp, 0, sizeof(gp));
764 gp.param = param;
765 gp.value = value;
766
767 ret = drmCommandWriteRead(psp->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
768 if (ret) {
769 if (ret != -EINVAL)
770 _mesa_warning(NULL, "drm_i915_getparam: %d", ret);
771 return false;
772 }
773
774 return true;
775 }
776
777 static bool
778 intel_get_boolean(__DRIscreen *psp, int param)
779 {
780 int value = 0;
781 return intel_get_param(psp, param, &value) && value;
782 }
783
784 static void
785 intelDestroyScreen(__DRIscreen * sPriv)
786 {
787 struct intel_screen *intelScreen = sPriv->driverPrivate;
788
789 dri_bufmgr_destroy(intelScreen->bufmgr);
790 driDestroyOptionInfo(&intelScreen->optionCache);
791
792 free(intelScreen);
793 sPriv->driverPrivate = NULL;
794 }
795
796
797 /**
798 * This is called when we need to set up GL rendering to a new X window.
799 */
800 static GLboolean
801 intelCreateBuffer(__DRIscreen * driScrnPriv,
802 __DRIdrawable * driDrawPriv,
803 const struct gl_config * mesaVis, GLboolean isPixmap)
804 {
805 struct intel_renderbuffer *rb;
806 struct intel_screen *screen = (struct intel_screen*) driScrnPriv->driverPrivate;
807 gl_format rgbFormat;
808 struct gl_framebuffer *fb;
809
810 if (isPixmap)
811 return false;
812
813 fb = CALLOC_STRUCT(gl_framebuffer);
814 if (!fb)
815 return false;
816
817 _mesa_initialize_window_framebuffer(fb, mesaVis);
818
819 if (mesaVis->redBits == 5)
820 rgbFormat = MESA_FORMAT_RGB565;
821 else if (mesaVis->sRGBCapable)
822 rgbFormat = MESA_FORMAT_SARGB8;
823 else if (mesaVis->alphaBits == 0)
824 rgbFormat = MESA_FORMAT_XRGB8888;
825 else {
826 if (screen->gen >= 4) {
827 rgbFormat = MESA_FORMAT_SARGB8;
828 fb->Visual.sRGBCapable = true;
829 } else {
830 rgbFormat = MESA_FORMAT_ARGB8888;
831 }
832
833 }
834
835 /* setup the hardware-based renderbuffers */
836 rb = intel_create_renderbuffer(rgbFormat);
837 _mesa_add_renderbuffer(fb, BUFFER_FRONT_LEFT, &rb->Base.Base);
838
839 if (mesaVis->doubleBufferMode) {
840 rb = intel_create_renderbuffer(rgbFormat);
841 _mesa_add_renderbuffer(fb, BUFFER_BACK_LEFT, &rb->Base.Base);
842 }
843
844 /*
845 * Assert here that the gl_config has an expected depth/stencil bit
846 * combination: one of d24/s8, d16/s0, d0/s0. (See intelInitScreen2(),
847 * which constructs the advertised configs.)
848 */
849 if (mesaVis->depthBits == 24) {
850 assert(mesaVis->stencilBits == 8);
851
852 if (screen->hw_has_separate_stencil) {
853 rb = intel_create_private_renderbuffer(MESA_FORMAT_X8_Z24);
854 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
855 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8);
856 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
857 } else {
858 /*
859 * Use combined depth/stencil. Note that the renderbuffer is
860 * attached to two attachment points.
861 */
862 rb = intel_create_private_renderbuffer(MESA_FORMAT_S8_Z24);
863 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
864 _mesa_add_renderbuffer(fb, BUFFER_STENCIL, &rb->Base.Base);
865 }
866 }
867 else if (mesaVis->depthBits == 16) {
868 assert(mesaVis->stencilBits == 0);
869 rb = intel_create_private_renderbuffer(MESA_FORMAT_Z16);
870 _mesa_add_renderbuffer(fb, BUFFER_DEPTH, &rb->Base.Base);
871 }
872 else {
873 assert(mesaVis->depthBits == 0);
874 assert(mesaVis->stencilBits == 0);
875 }
876
877 /* now add any/all software-based renderbuffers we may need */
878 _swrast_add_soft_renderbuffers(fb,
879 false, /* never sw color */
880 false, /* never sw depth */
881 false, /* never sw stencil */
882 mesaVis->accumRedBits > 0,
883 false, /* never sw alpha */
884 false /* never sw aux */ );
885 driDrawPriv->driverPrivate = fb;
886
887 return true;
888 }
889
890 static void
891 intelDestroyBuffer(__DRIdrawable * driDrawPriv)
892 {
893 struct gl_framebuffer *fb = driDrawPriv->driverPrivate;
894
895 _mesa_reference_framebuffer(&fb, NULL);
896 }
897
898 /* There are probably better ways to do this, such as an
899 * init-designated function to register chipids and createcontext
900 * functions.
901 */
902 extern bool
903 i830CreateContext(int api,
904 const struct gl_config *mesaVis,
905 __DRIcontext *driContextPriv,
906 unsigned major_version,
907 unsigned minor_version,
908 unsigned *error,
909 void *sharedContextPrivate);
910
911 extern bool
912 i915CreateContext(int api,
913 const struct gl_config *mesaVis,
914 __DRIcontext *driContextPriv,
915 unsigned major_version,
916 unsigned minor_version,
917 unsigned *error,
918 void *sharedContextPrivate);
919
920 static GLboolean
921 intelCreateContext(gl_api api,
922 const struct gl_config * mesaVis,
923 __DRIcontext * driContextPriv,
924 unsigned major_version,
925 unsigned minor_version,
926 uint32_t flags,
927 unsigned *error,
928 void *sharedContextPrivate)
929 {
930 bool success = false;
931
932 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
933 struct intel_screen *intelScreen = sPriv->driverPrivate;
934
935 if (IS_9XX(intelScreen->deviceID)) {
936 success = i915CreateContext(api, mesaVis, driContextPriv,
937 major_version, minor_version, error,
938 sharedContextPrivate);
939 } else {
940 intelScreen->no_vbo = true;
941 success = i830CreateContext(api, mesaVis, driContextPriv,
942 major_version, minor_version, error,
943 sharedContextPrivate);
944 }
945
946 if (success)
947 return true;
948
949 if (driContextPriv->driverPrivate != NULL)
950 intelDestroyContext(driContextPriv);
951
952 return false;
953 }
954
955 static bool
956 intel_init_bufmgr(struct intel_screen *intelScreen)
957 {
958 __DRIscreen *spriv = intelScreen->driScrnPriv;
959
960 intelScreen->no_hw = getenv("INTEL_NO_HW") != NULL;
961
962 intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);
963 if (intelScreen->bufmgr == NULL) {
964 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n",
965 __func__, __LINE__);
966 return false;
967 }
968
969 drm_intel_bufmgr_gem_enable_fenced_relocs(intelScreen->bufmgr);
970
971 if (!intel_get_boolean(spriv, I915_PARAM_HAS_RELAXED_DELTA)) {
972 fprintf(stderr, "[%s: %u] Kernel 2.6.39 required.\n", __func__, __LINE__);
973 return false;
974 }
975
976 return true;
977 }
978
979 /**
980 * Override intel_screen.hw_has_separate_stencil with environment variable
981 * INTEL_SEPARATE_STENCIL.
982 *
983 * Valid values for INTEL_SEPARATE_STENCIL are "0" and "1". If an invalid
984 * valid value is encountered, a warning is emitted and INTEL_SEPARATE_STENCIL
985 * is ignored.
986 */
987 static void
988 intel_override_separate_stencil(struct intel_screen *screen)
989 {
990 const char *s = getenv("INTEL_SEPARATE_STENCIL");
991 if (!s) {
992 return;
993 } else if (!strncmp("0", s, 2)) {
994 screen->hw_has_separate_stencil = false;
995 } else if (!strncmp("1", s, 2)) {
996 screen->hw_has_separate_stencil = true;
997 } else {
998 fprintf(stderr,
999 "warning: env variable INTEL_SEPARATE_STENCIL=\"%s\" has "
1000 "invalid value and is ignored", s);
1001 }
1002 }
1003
1004 static bool
1005 intel_detect_swizzling(struct intel_screen *screen)
1006 {
1007 drm_intel_bo *buffer;
1008 unsigned long flags = 0;
1009 unsigned long aligned_pitch;
1010 uint32_t tiling = I915_TILING_X;
1011 uint32_t swizzle_mode = 0;
1012
1013 buffer = drm_intel_bo_alloc_tiled(screen->bufmgr, "swizzle test",
1014 64, 64, 4,
1015 &tiling, &aligned_pitch, flags);
1016 if (buffer == NULL)
1017 return false;
1018
1019 drm_intel_bo_get_tiling(buffer, &tiling, &swizzle_mode);
1020 drm_intel_bo_unreference(buffer);
1021
1022 if (swizzle_mode == I915_BIT_6_SWIZZLE_NONE)
1023 return false;
1024 else
1025 return true;
1026 }
1027
1028 static __DRIconfig**
1029 intel_screen_make_configs(__DRIscreen *dri_screen)
1030 {
1031 static const gl_format formats[] = {
1032 MESA_FORMAT_RGB565,
1033 MESA_FORMAT_ARGB8888
1034 };
1035
1036 /* GLX_SWAP_COPY_OML is not supported due to page flipping. */
1037 static const GLenum back_buffer_modes[] = {
1038 GLX_SWAP_UNDEFINED_OML, GLX_NONE,
1039 };
1040
1041 static const uint8_t singlesample_samples[1] = {0};
1042
1043 struct intel_screen *screen = dri_screen->driverPrivate;
1044 uint8_t depth_bits[4], stencil_bits[4];
1045 __DRIconfig **configs = NULL;
1046
1047 /* Generate singlesample configs without accumulation buffer. */
1048 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1049 __DRIconfig **new_configs;
1050 int num_depth_stencil_bits = 2;
1051
1052 /* Starting with DRI2 protocol version 1.1 we can request a depth/stencil
1053 * buffer that has a different number of bits per pixel than the color
1054 * buffer, gen >= 6 supports this.
1055 */
1056 depth_bits[0] = 0;
1057 stencil_bits[0] = 0;
1058
1059 if (formats[i] == MESA_FORMAT_RGB565) {
1060 depth_bits[1] = 16;
1061 stencil_bits[1] = 0;
1062 if (screen->gen >= 6) {
1063 depth_bits[2] = 24;
1064 stencil_bits[2] = 8;
1065 num_depth_stencil_bits = 3;
1066 }
1067 } else {
1068 depth_bits[1] = 24;
1069 stencil_bits[1] = 8;
1070 }
1071
1072 new_configs = driCreateConfigs(formats[i],
1073 depth_bits,
1074 stencil_bits,
1075 num_depth_stencil_bits,
1076 back_buffer_modes, 2,
1077 singlesample_samples, 1,
1078 false);
1079 configs = driConcatConfigs(configs, new_configs);
1080 }
1081
1082 /* Generate the minimum possible set of configs that include an
1083 * accumulation buffer.
1084 */
1085 for (int i = 0; i < ARRAY_SIZE(formats); i++) {
1086 __DRIconfig **new_configs;
1087
1088 if (formats[i] == MESA_FORMAT_RGB565) {
1089 depth_bits[0] = 16;
1090 stencil_bits[0] = 0;
1091 } else {
1092 depth_bits[0] = 24;
1093 stencil_bits[0] = 8;
1094 }
1095
1096 new_configs = driCreateConfigs(formats[i],
1097 depth_bits, stencil_bits, 1,
1098 back_buffer_modes, 1,
1099 singlesample_samples, 1,
1100 true);
1101 configs = driConcatConfigs(configs, new_configs);
1102 }
1103
1104 if (configs == NULL) {
1105 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
1106 __LINE__);
1107 return NULL;
1108 }
1109
1110 return configs;
1111 }
1112
1113 static void
1114 set_max_gl_versions(struct intel_screen *screen)
1115 {
1116 int gl_version_override = _mesa_get_gl_version_override();
1117
1118 switch (screen->gen) {
1119 case 7:
1120 screen->max_gl_core_version = 31;
1121 screen->max_gl_compat_version = 30;
1122 screen->max_gl_es1_version = 11;
1123 screen->max_gl_es2_version = 30;
1124 break;
1125 case 6:
1126 screen->max_gl_core_version = 31;
1127 screen->max_gl_compat_version = 30;
1128 screen->max_gl_es1_version = 11;
1129 screen->max_gl_es2_version = 30;
1130 break;
1131 case 5:
1132 case 4:
1133 screen->max_gl_core_version = 0;
1134 screen->max_gl_compat_version = 21;
1135 screen->max_gl_es1_version = 11;
1136 screen->max_gl_es2_version = 20;
1137 break;
1138 case 3: {
1139 screen->max_gl_core_version = 0;
1140 screen->max_gl_es1_version = 11;
1141 screen->max_gl_compat_version = 21;
1142 screen->max_gl_es2_version = 20;
1143
1144 break;
1145 }
1146 case 2:
1147 screen->max_gl_core_version = 0;
1148 screen->max_gl_compat_version = 13;
1149 screen->max_gl_es1_version = 11;
1150 screen->max_gl_es2_version = 0;
1151 break;
1152 default:
1153 assert(!"unrecognized intel_screen::gen");
1154 break;
1155 }
1156
1157 if (gl_version_override >= 31) {
1158 screen->max_gl_core_version = MAX2(screen->max_gl_core_version,
1159 gl_version_override);
1160 } else {
1161 screen->max_gl_compat_version = MAX2(screen->max_gl_compat_version,
1162 gl_version_override);
1163 }
1164
1165 #ifndef FEATURE_ES1
1166 screen->max_gl_es1_version = 0;
1167 #endif
1168
1169 #ifndef FEATURE_ES2
1170 screen->max_gl_es2_version = 0;
1171 #endif
1172 }
1173
1174 /**
1175 * This is the driver specific part of the createNewScreen entry point.
1176 * Called when using DRI2.
1177 *
1178 * \return the struct gl_config supported by this driver
1179 */
1180 static const
1181 __DRIconfig **intelInitScreen2(__DRIscreen *psp)
1182 {
1183 struct intel_screen *intelScreen;
1184
1185 if (psp->dri2.loader->base.version <= 2 ||
1186 psp->dri2.loader->getBuffersWithFormat == NULL) {
1187 fprintf(stderr,
1188 "\nERROR! DRI2 loader with getBuffersWithFormat() "
1189 "support required\n");
1190 return false;
1191 }
1192
1193 /* Allocate the private area */
1194 intelScreen = calloc(1, sizeof *intelScreen);
1195 if (!intelScreen) {
1196 fprintf(stderr, "\nERROR! Allocating private area failed\n");
1197 return false;
1198 }
1199 /* parse information in __driConfigOptions */
1200 driParseOptionInfo(&intelScreen->optionCache,
1201 __driConfigOptions, __driNConfigOptions);
1202
1203 intelScreen->driScrnPriv = psp;
1204 psp->driverPrivate = (void *) intelScreen;
1205
1206 if (!intel_init_bufmgr(intelScreen))
1207 return false;
1208
1209 intelScreen->deviceID = drm_intel_bufmgr_gem_get_devid(intelScreen->bufmgr);
1210
1211 if (IS_GEN7(intelScreen->deviceID)) {
1212 intelScreen->gen = 7;
1213 } else if (IS_GEN6(intelScreen->deviceID)) {
1214 intelScreen->gen = 6;
1215 } else if (IS_GEN5(intelScreen->deviceID)) {
1216 intelScreen->gen = 5;
1217 } else if (IS_965(intelScreen->deviceID)) {
1218 intelScreen->gen = 4;
1219 } else if (IS_9XX(intelScreen->deviceID)) {
1220 intelScreen->gen = 3;
1221 } else {
1222 intelScreen->gen = 2;
1223 }
1224
1225 intelScreen->hw_has_separate_stencil = intelScreen->gen >= 6;
1226 intelScreen->hw_must_use_separate_stencil = intelScreen->gen >= 7;
1227
1228 int has_llc = 0;
1229 bool success = intel_get_param(intelScreen->driScrnPriv, I915_PARAM_HAS_LLC,
1230 &has_llc);
1231 if (success && has_llc)
1232 intelScreen->hw_has_llc = true;
1233 else if (!success && intelScreen->gen >= 6)
1234 intelScreen->hw_has_llc = true;
1235
1236 intel_override_separate_stencil(intelScreen);
1237
1238 intelScreen->hw_has_swizzling = intel_detect_swizzling(intelScreen);
1239
1240 set_max_gl_versions(intelScreen);
1241
1242 psp->api_mask = (1 << __DRI_API_OPENGL);
1243 if (intelScreen->max_gl_core_version > 0)
1244 psp->api_mask |= (1 << __DRI_API_OPENGL_CORE);
1245 if (intelScreen->max_gl_es1_version > 0)
1246 psp->api_mask |= (1 << __DRI_API_GLES);
1247 if (intelScreen->max_gl_es2_version > 0)
1248 psp->api_mask |= (1 << __DRI_API_GLES2);
1249 if (intelScreen->max_gl_es2_version >= 30)
1250 psp->api_mask |= (1 << __DRI_API_GLES3);
1251
1252 psp->extensions = intelScreenExtensions;
1253
1254 return (const __DRIconfig**) intel_screen_make_configs(psp);
1255 }
1256
1257 struct intel_buffer {
1258 __DRIbuffer base;
1259 struct intel_region *region;
1260 };
1261
1262 static __DRIbuffer *
1263 intelAllocateBuffer(__DRIscreen *screen,
1264 unsigned attachment, unsigned format,
1265 int width, int height)
1266 {
1267 struct intel_buffer *intelBuffer;
1268 struct intel_screen *intelScreen = screen->driverPrivate;
1269
1270 assert(attachment == __DRI_BUFFER_FRONT_LEFT ||
1271 attachment == __DRI_BUFFER_BACK_LEFT);
1272
1273 intelBuffer = calloc(1, sizeof *intelBuffer);
1274 if (intelBuffer == NULL)
1275 return NULL;
1276
1277 /* The front and back buffers are color buffers, which are X tiled. */
1278 intelBuffer->region = intel_region_alloc(intelScreen,
1279 I915_TILING_X,
1280 format / 8,
1281 width,
1282 height,
1283 true);
1284
1285 if (intelBuffer->region == NULL) {
1286 free(intelBuffer);
1287 return NULL;
1288 }
1289
1290 intel_region_flink(intelBuffer->region, &intelBuffer->base.name);
1291
1292 intelBuffer->base.attachment = attachment;
1293 intelBuffer->base.cpp = intelBuffer->region->cpp;
1294 intelBuffer->base.pitch = intelBuffer->region->pitch;
1295
1296 return &intelBuffer->base;
1297 }
1298
1299 static void
1300 intelReleaseBuffer(__DRIscreen *screen, __DRIbuffer *buffer)
1301 {
1302 struct intel_buffer *intelBuffer = (struct intel_buffer *) buffer;
1303
1304 intel_region_release(&intelBuffer->region);
1305 free(intelBuffer);
1306 }
1307
1308
1309 const struct __DriverAPIRec driDriverAPI = {
1310 .InitScreen = intelInitScreen2,
1311 .DestroyScreen = intelDestroyScreen,
1312 .CreateContext = intelCreateContext,
1313 .DestroyContext = intelDestroyContext,
1314 .CreateBuffer = intelCreateBuffer,
1315 .DestroyBuffer = intelDestroyBuffer,
1316 .MakeCurrent = intelMakeCurrent,
1317 .UnbindContext = intelUnbindContext,
1318 .AllocateBuffer = intelAllocateBuffer,
1319 .ReleaseBuffer = intelReleaseBuffer
1320 };
1321
1322 /* This is the table of extensions that the loader will dlsym() for. */
1323 PUBLIC const __DRIextension *__driDriverExtensions[] = {
1324 &driCoreExtension.base,
1325 &driDRI2Extension.base,
1326 NULL
1327 };