src/mesa/drivers/dri/i915/server/i830_common.h

   1 /**************************************************************************
   2
   3 Copyright 2001 VA Linux Systems Inc., Fremont, California.
   4 Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining a
   9 copy of this software and associated documentation files (the "Software"),
  10 to deal in the Software without restriction, including without limitation
  11 on the rights to use, copy, modify, merge, publish, distribute, sub
  12 license, and/or sell copies of the Software, and to permit persons to whom
  13 the Software is furnished to do so, subject to the following conditions:
  14
  15 The above copyright notice and this permission notice (including the next
  16 paragraph) shall be included in all copies or substantial portions of the
  17 Software.
  18
  19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21 FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  22 ATI, VA LINUX SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  23 DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  24 OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  25 USE OR OTHER DEALINGS IN THE SOFTWARE.
  26
  27 **************************************************************************/
  28
  29 /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h,v 1.1 2002/09/11 00:29:32 dawes Exp $ */
  30
  31 #ifndef _I830_COMMON_H_
  32 #define _I830_COMMON_H_
  33
  34
  35 #define I830_NR_TEX_REGIONS 255 /* maximum due to use of chars for next/prev */
  36 #define I830_LOG_MIN_TEX_REGION_SIZE 14
  37
  38
  39 /* Driver specific DRM command indices
  40  * NOTE: these are not OS specific, but they are driver specific
  41  */
  42 #define DRM_I830_INIT                     0x00
  43 #define DRM_I830_FLUSH                    0x01
  44 #define DRM_I830_FLIP                     0x02
  45 #define DRM_I830_BATCHBUFFER              0x03
  46 #define DRM_I830_IRQ_EMIT                 0x04
  47 #define DRM_I830_IRQ_WAIT                 0x05
  48 #define DRM_I830_GETPARAM                 0x06
  49 #define DRM_I830_SETPARAM                 0x07
  50 #define DRM_I830_ALLOC                    0x08
  51 #define DRM_I830_FREE                     0x09
  52 #define DRM_I830_INIT_HEAP                0x0a
  53 #define DRM_I830_CMDBUFFER                0x0b
  54
  55 typedef struct {
  56    enum {
  57       I830_INIT_DMA = 0x01,
  58       I830_CLEANUP_DMA = 0x02,
  59       I830_RESUME_DMA = 0x03
  60    } func;
  61    unsigned int mmio_offset;
  62    int sarea_priv_offset;
  63    unsigned int ring_start;
  64    unsigned int ring_end;
  65    unsigned int ring_size;
  66    unsigned int front_offset;
  67    unsigned int back_offset;
  68    unsigned int depth_offset;
  69    unsigned int w;
  70    unsigned int h;
  71    unsigned int pitch;
  72    unsigned int pitch_bits;
  73    unsigned int back_pitch;
  74    unsigned int depth_pitch;
  75    unsigned int cpp;
  76    unsigned int chipset;
  77 } drmI830Init;
  78
  79 typedef struct {
  80         drmTextureRegion texList[I830_NR_TEX_REGIONS+1];
  81         int last_upload;        /* last time texture was uploaded */
  82         int last_enqueue;       /* last time a buffer was enqueued */
  83         int last_dispatch;      /* age of the most recently dispatched buffer */
  84         int ctxOwner;           /* last context to upload state */
  85         int texAge;
  86         int pf_enabled;         /* is pageflipping allowed? */
  87         int pf_active;
  88         int pf_current_page;    /* which buffer is being displayed? */
  89         int perf_boxes;         /* performance boxes to be displayed */
  90 } drmI830Sarea;
  91
  92 /* Flags for perf_boxes
  93  */
  94 #define I830_BOX_RING_EMPTY    0x1 /* populated by kernel */
  95 #define I830_BOX_FLIP          0x2 /* populated by kernel */
  96 #define I830_BOX_WAIT          0x4 /* populated by kernel & client */
  97 #define I830_BOX_TEXTURE_LOAD  0x8 /* populated by kernel */
  98 #define I830_BOX_LOST_CONTEXT  0x10 /* populated by client */
  99
 100
 101 typedef struct {
 102         int start;              /* agp offset */
 103         int used;               /* nr bytes in use */
 104         int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
 105         int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO*/
 106         int num_cliprects;      /* mulitpass with multiple cliprects? */
 107         drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
 108 } drmI830BatchBuffer;
 109
 110 typedef struct {
 111         char *buf;              /* agp offset */
 112         int sz;                 /* nr bytes in use */
 113         int DR1;                /* hw flags for GFX_OP_DRAWRECT_INFO */
 114         int DR4;                /* window origin for GFX_OP_DRAWRECT_INFO*/
 115         int num_cliprects;      /* mulitpass with multiple cliprects? */
 116         drm_clip_rect_t *cliprects; /* pointer to userspace cliprects */
 117 } drmI830CmdBuffer;
 118
 119
 120 typedef struct {
 121         int *irq_seq;
 122 } drmI830IrqEmit;
 123
 124 typedef struct {
 125         int irq_seq;
 126 } drmI830IrqWait;
 127
 128 typedef struct {
 129         int param;
 130         int *value;
 131 } drmI830GetParam;
 132
 133 #define I830_PARAM_IRQ_ACTIVE     1
 134 #define I830_PARAM_ALLOW_BATCHBUFFER   2
 135
 136 typedef struct {
 137         int param;
 138         int value;
 139 } drmI830SetParam;
 140
 141 #define I830_SETPARAM_USE_MI_BATCHBUFFER_START  1
 142 #define I830_SETPARAM_TEX_LRU_LOG_GRANULARITY   2
 143 #define I830_SETPARAM_ALLOW_BATCHBUFFER         3
 144
 145
 146 /* A memory manager for regions of shared memory:
 147  */
 148 #define I830_MEM_REGION_AGP 1
 149
 150 typedef struct {
 151         int region;
 152         int alignment;
 153         int size;
 154         int *region_offset;     /* offset from start of fb or agp */
 155 } drmI830MemAlloc;
 156
 157 typedef struct {
 158         int region;
 159         int region_offset;
 160 } drmI830MemFree;
 161
 162 typedef struct {
 163         int region;
 164         int size;
 165         int start;
 166 } drmI830MemInitHeap;
 167
 168
 169 #endif /* _I830_DRM_H_ */