src/mesa/drivers/dri/i915tex/i830_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "glheader.h"
  30 #include "context.h"
  31 #include "macros.h"
  32 #include "enums.h"
  33 #include "dd.h"
  34
  35 #include "texmem.h"
  36
  37 #include "intel_screen.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_fbo.h"
  40
  41 #include "i830_context.h"
  42 #include "i830_reg.h"
  43
  44 #define FILE_DEBUG_FLAG DEBUG_STATE
  45
  46 static void
  47 i830StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  48                         GLuint mask)
  49 {
  50    struct i830_context *i830 = i830_context(ctx);
  51    int test = intel_translate_compare_func(func);
  52
  53    mask = mask & 0xff;
  54
  55    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  56        _mesa_lookup_enum_by_nr(func), ref, mask);
  57
  58
  59    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  60    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  61    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  62                                            STENCIL_TEST_MASK(mask));
  63    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
  64                                                 ENABLE_STENCIL_TEST_FUNC_MASK);
  65    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
  66                                                ENABLE_STENCIL_TEST_FUNC |
  67                                                STENCIL_REF_VALUE(ref) |
  68                                                STENCIL_TEST_FUNC(test));
  69 }
  70
  71 static void
  72 i830StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  73 {
  74    struct i830_context *i830 = i830_context(ctx);
  75
  76    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  77
  78    mask = mask & 0xff;
  79
  80    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
  81    i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  82    i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  83                                            STENCIL_WRITE_MASK(mask));
  84 }
  85
  86 static void
  87 i830StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  88                       GLenum zpass)
  89 {
  90    struct i830_context *i830 = i830_context(ctx);
  91    int fop, dfop, dpop;
  92
  93    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
  94        _mesa_lookup_enum_by_nr(fail),
  95        _mesa_lookup_enum_by_nr(zfail),
  96        _mesa_lookup_enum_by_nr(zpass));
  97
  98    fop = 0;
  99    dfop = 0;
 100    dpop = 0;
 101
 102    switch (fail) {
 103    case GL_KEEP:
 104       fop = STENCILOP_KEEP;
 105       break;
 106    case GL_ZERO:
 107       fop = STENCILOP_ZERO;
 108       break;
 109    case GL_REPLACE:
 110       fop = STENCILOP_REPLACE;
 111       break;
 112    case GL_INCR:
 113       fop = STENCILOP_INCRSAT;
 114       break;
 115    case GL_DECR:
 116       fop = STENCILOP_DECRSAT;
 117       break;
 118    case GL_INCR_WRAP:
 119       fop = STENCILOP_INCR;
 120       break;
 121    case GL_DECR_WRAP:
 122       fop = STENCILOP_DECR;
 123       break;
 124    case GL_INVERT:
 125       fop = STENCILOP_INVERT;
 126       break;
 127    default:
 128       break;
 129    }
 130    switch (zfail) {
 131    case GL_KEEP:
 132       dfop = STENCILOP_KEEP;
 133       break;
 134    case GL_ZERO:
 135       dfop = STENCILOP_ZERO;
 136       break;
 137    case GL_REPLACE:
 138       dfop = STENCILOP_REPLACE;
 139       break;
 140    case GL_INCR:
 141       dfop = STENCILOP_INCRSAT;
 142       break;
 143    case GL_DECR:
 144       dfop = STENCILOP_DECRSAT;
 145       break;
 146    case GL_INCR_WRAP:
 147       dfop = STENCILOP_INCR;
 148       break;
 149    case GL_DECR_WRAP:
 150       dfop = STENCILOP_DECR;
 151       break;
 152    case GL_INVERT:
 153       dfop = STENCILOP_INVERT;
 154       break;
 155    default:
 156       break;
 157    }
 158    switch (zpass) {
 159    case GL_KEEP:
 160       dpop = STENCILOP_KEEP;
 161       break;
 162    case GL_ZERO:
 163       dpop = STENCILOP_ZERO;
 164       break;
 165    case GL_REPLACE:
 166       dpop = STENCILOP_REPLACE;
 167       break;
 168    case GL_INCR:
 169       dpop = STENCILOP_INCRSAT;
 170       break;
 171    case GL_DECR:
 172       dpop = STENCILOP_DECRSAT;
 173       break;
 174    case GL_INCR_WRAP:
 175       dpop = STENCILOP_INCR;
 176       break;
 177    case GL_DECR_WRAP:
 178       dpop = STENCILOP_DECR;
 179       break;
 180    case GL_INVERT:
 181       dpop = STENCILOP_INVERT;
 182       break;
 183    default:
 184       break;
 185    }
 186
 187
 188    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 189    i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
 190    i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
 191                                                STENCIL_FAIL_OP(fop) |
 192                                                STENCIL_PASS_DEPTH_FAIL_OP
 193                                                (dfop) |
 194                                                STENCIL_PASS_DEPTH_PASS_OP
 195                                                (dpop));
 196 }
 197
 198 static void
 199 i830AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 200 {
 201    struct i830_context *i830 = i830_context(ctx);
 202    int test = intel_translate_compare_func(func);
 203    GLubyte refByte;
 204    GLuint refInt;
 205
 206    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 207    refInt = (GLuint) refByte;
 208
 209    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 210    i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
 211    i830->state.Ctx[I830_CTXREG_STATE2] |= (ENABLE_ALPHA_TEST_FUNC |
 212                                            ENABLE_ALPHA_REF_VALUE |
 213                                            ALPHA_TEST_FUNC(test) |
 214                                            ALPHA_REF_VALUE(refInt));
 215 }
 216
 217 /**
 218  * Makes sure that the proper enables are set for LogicOp, Independant Alpha
 219  * Blend, and Blending.  It needs to be called from numerous places where we
 220  * could change the LogicOp or Independant Alpha Blend without subsequent
 221  * calls to glEnable.
 222  *
 223  * \todo
 224  * This function is substantially different from the old i830-specific driver.
 225  * I'm not sure which is correct.
 226  */
 227 static void
 228 i830EvalLogicOpBlendState(GLcontext * ctx)
 229 {
 230    struct i830_context *i830 = i830_context(ctx);
 231
 232    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 233
 234    if (ctx->Color._LogicOpEnabled) {
 235       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 236                                                   ENABLE_LOGIC_OP_MASK);
 237       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 238                                                  ENABLE_LOGIC_OP);
 239    }
 240    else if (ctx->Color.BlendEnabled) {
 241       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 242                                                   ENABLE_LOGIC_OP_MASK);
 243       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (ENABLE_COLOR_BLEND |
 244                                                  DISABLE_LOGIC_OP);
 245    }
 246    else {
 247       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~(ENABLE_COLOR_BLEND |
 248                                                   ENABLE_LOGIC_OP_MASK);
 249       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= (DISABLE_COLOR_BLEND |
 250                                                  DISABLE_LOGIC_OP);
 251    }
 252 }
 253
 254 static void
 255 i830BlendColor(GLcontext * ctx, const GLfloat color[4])
 256 {
 257    struct i830_context *i830 = i830_context(ctx);
 258    GLubyte r, g, b, a;
 259
 260    DBG("%s\n", __FUNCTION__);
 261
 262    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 263    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 264    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 265    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 266
 267    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 268    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] =
 269       (a << 24) | (r << 16) | (g << 8) | b;
 270 }
 271
 272 /**
 273  * Sets both the blend equation (called "function" in i830 docs) and the
 274  * blend function (called "factor" in i830 docs).  This is done in a single
 275  * function because some blend equations (i.e., \c GL_MIN and \c GL_MAX)
 276  * change the interpretation of the blend function.
 277  */
 278 static void
 279 i830_set_blend_state(GLcontext * ctx)
 280 {
 281    struct i830_context *i830 = i830_context(ctx);
 282    int funcA;
 283    int funcRGB;
 284    int eqnA;
 285    int eqnRGB;
 286    int iab;
 287    int s1;
 288
 289
 290    funcRGB =
 291       SRC_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcRGB))
 292       | DST_BLND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstRGB));
 293
 294    switch (ctx->Color.BlendEquationRGB) {
 295    case GL_FUNC_ADD:
 296       eqnRGB = BLENDFUNC_ADD;
 297       break;
 298    case GL_MIN:
 299       eqnRGB = BLENDFUNC_MIN;
 300       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 301       break;
 302    case GL_MAX:
 303       eqnRGB = BLENDFUNC_MAX;
 304       funcRGB = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 305       break;
 306    case GL_FUNC_SUBTRACT:
 307       eqnRGB = BLENDFUNC_SUB;
 308       break;
 309    case GL_FUNC_REVERSE_SUBTRACT:
 310       eqnRGB = BLENDFUNC_RVRSE_SUB;
 311       break;
 312    default:
 313       fprintf(stderr, "[%s:%u] Invalid RGB blend equation (0x%04x).\n",
 314               __FUNCTION__, __LINE__, ctx->Color.BlendEquationRGB);
 315       return;
 316    }
 317
 318
 319    funcA = SRC_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendSrcA))
 320       | DST_ABLEND_FACT(intel_translate_blend_factor(ctx->Color.BlendDstA));
 321
 322    switch (ctx->Color.BlendEquationA) {
 323    case GL_FUNC_ADD:
 324       eqnA = BLENDFUNC_ADD;
 325       break;
 326    case GL_MIN:
 327       eqnA = BLENDFUNC_MIN;
 328       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 329       break;
 330    case GL_MAX:
 331       eqnA = BLENDFUNC_MAX;
 332       funcA = SRC_BLND_FACT(BLENDFACT_ONE) | DST_BLND_FACT(BLENDFACT_ONE);
 333       break;
 334    case GL_FUNC_SUBTRACT:
 335       eqnA = BLENDFUNC_SUB;
 336       break;
 337    case GL_FUNC_REVERSE_SUBTRACT:
 338       eqnA = BLENDFUNC_RVRSE_SUB;
 339       break;
 340    default:
 341       fprintf(stderr, "[%s:%u] Invalid alpha blend equation (0x%04x).\n",
 342               __FUNCTION__, __LINE__, ctx->Color.BlendEquationA);
 343       return;
 344    }
 345
 346    iab = eqnA | funcA
 347       | _3DSTATE_INDPT_ALPHA_BLEND_CMD
 348       | ENABLE_SRC_ABLEND_FACTOR | ENABLE_DST_ABLEND_FACTOR
 349       | ENABLE_ALPHA_BLENDFUNC;
 350    s1 = eqnRGB | funcRGB
 351       | _3DSTATE_MODES_1_CMD
 352       | ENABLE_SRC_BLND_FACTOR | ENABLE_DST_BLND_FACTOR
 353       | ENABLE_COLR_BLND_FUNC;
 354
 355    if ((eqnA | funcA) != (eqnRGB | funcRGB))
 356       iab |= ENABLE_INDPT_ALPHA_BLEND;
 357    else
 358       iab |= DISABLE_INDPT_ALPHA_BLEND;
 359
 360    if (iab != i830->state.Ctx[I830_CTXREG_IALPHAB] ||
 361        s1 != i830->state.Ctx[I830_CTXREG_STATE1]) {
 362       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 363       i830->state.Ctx[I830_CTXREG_IALPHAB] = iab;
 364       i830->state.Ctx[I830_CTXREG_STATE1] = s1;
 365    }
 366
 367    /* This will catch a logicop blend equation.  It will also ensure
 368     * independant alpha blend is really in the correct state (either enabled
 369     * or disabled) if blending is already enabled.
 370     */
 371
 372    i830EvalLogicOpBlendState(ctx);
 373
 374    if (0) {
 375       fprintf(stderr,
 376               "[%s:%u] STATE1: 0x%08x IALPHAB: 0x%08x blend is %sabled\n",
 377               __FUNCTION__, __LINE__, i830->state.Ctx[I830_CTXREG_STATE1],
 378               i830->state.Ctx[I830_CTXREG_IALPHAB],
 379               (ctx->Color.BlendEnabled) ? "en" : "dis");
 380    }
 381 }
 382
 383
 384 static void
 385 i830BlendEquationSeparate(GLcontext * ctx, GLenum modeRGB, GLenum modeA)
 386 {
 387    DBG("%s -> %s, %s\n", __FUNCTION__,
 388        _mesa_lookup_enum_by_nr(modeRGB),
 389        _mesa_lookup_enum_by_nr(modeA));
 390
 391    (void) modeRGB;
 392    (void) modeA;
 393    i830_set_blend_state(ctx);
 394 }
 395
 396
 397 static void
 398 i830BlendFuncSeparate(GLcontext * ctx, GLenum sfactorRGB,
 399                       GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA)
 400 {
 401    DBG("%s -> RGB(%s, %s) A(%s, %s)\n", __FUNCTION__,
 402        _mesa_lookup_enum_by_nr(sfactorRGB),
 403        _mesa_lookup_enum_by_nr(dfactorRGB),
 404        _mesa_lookup_enum_by_nr(sfactorA),
 405        _mesa_lookup_enum_by_nr(dfactorA));
 406
 407    (void) sfactorRGB;
 408    (void) dfactorRGB;
 409    (void) sfactorA;
 410    (void) dfactorA;
 411    i830_set_blend_state(ctx);
 412 }
 413
 414
 415
 416 static void
 417 i830DepthFunc(GLcontext * ctx, GLenum func)
 418 {
 419    struct i830_context *i830 = i830_context(ctx);
 420    int test = intel_translate_compare_func(func);
 421
 422    DBG("%s\n", __FUNCTION__);
 423
 424    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 425    i830->state.Ctx[I830_CTXREG_STATE3] &= ~DEPTH_TEST_FUNC_MASK;
 426    i830->state.Ctx[I830_CTXREG_STATE3] |= (ENABLE_DEPTH_TEST_FUNC |
 427                                            DEPTH_TEST_FUNC(test));
 428 }
 429
 430 static void
 431 i830DepthMask(GLcontext * ctx, GLboolean flag)
 432 {
 433    struct i830_context *i830 = i830_context(ctx);
 434
 435    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 436
 437    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 438
 439    i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DIS_DEPTH_WRITE_MASK;
 440
 441    if (flag && ctx->Depth.Test)
 442       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DEPTH_WRITE;
 443    else
 444       i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DEPTH_WRITE;
 445 }
 446
 447 /* =============================================================
 448  * Polygon stipple
 449  *
 450  * The i830 supports a 4x4 stipple natively, GL wants 32x32.
 451  * Fortunately stipple is usually a repeating pattern.
 452  */
 453 static void
 454 i830PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 455 {
 456    struct i830_context *i830 = i830_context(ctx);
 457    const GLubyte *m = mask;
 458    GLubyte p[4];
 459    int i, j, k;
 460    int active = (ctx->Polygon.StippleFlag &&
 461                  i830->intel.reduced_primitive == GL_TRIANGLES);
 462    GLuint newMask;
 463
 464    if (active) {
 465       I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 466       i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 467    }
 468
 469    p[0] = mask[12] & 0xf;
 470    p[0] |= p[0] << 4;
 471    p[1] = mask[8] & 0xf;
 472    p[1] |= p[1] << 4;
 473    p[2] = mask[4] & 0xf;
 474    p[2] |= p[2] << 4;
 475    p[3] = mask[0] & 0xf;
 476    p[3] |= p[3] << 4;
 477
 478    for (k = 0; k < 8; k++)
 479       for (j = 3; j >= 0; j--)
 480          for (i = 0; i < 4; i++, m++)
 481             if (*m != p[j]) {
 482                i830->intel.hw_stipple = 0;
 483                return;
 484             }
 485
 486    newMask = (((p[0] & 0xf) << 0) |
 487               ((p[1] & 0xf) << 4) |
 488               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 489
 490
 491    if (newMask == 0xffff || newMask == 0x0) {
 492       /* this is needed to make conform pass */
 493       i830->intel.hw_stipple = 0;
 494       return;
 495    }
 496
 497    i830->state.Stipple[I830_STPREG_ST1] &= ~0xffff;
 498    i830->state.Stipple[I830_STPREG_ST1] |= newMask;
 499    i830->intel.hw_stipple = 1;
 500
 501    if (active)
 502       i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 503 }
 504
 505
 506 /* =============================================================
 507  * Hardware clipping
 508  */
 509 static void
 510 i830Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 511 {
 512    struct i830_context *i830 = i830_context(ctx);
 513    int x1, y1, x2, y2;
 514
 515    if (!ctx->DrawBuffer)
 516       return;
 517
 518    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 519
 520    if (ctx->DrawBuffer->Name == 0) {
 521       x1 = x;
 522       y1 = ctx->DrawBuffer->Height - (y + h);
 523       x2 = x + w - 1;
 524       y2 = y1 + h - 1;
 525       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 526    }
 527    else {
 528       /* FBO - not inverted
 529        */
 530       x1 = x;
 531       y1 = y;
 532       x2 = x + w - 1;
 533       y2 = y + h - 1;
 534       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 535    }
 536
 537    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 538    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 539    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 540    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 541
 542    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 543
 544    I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 545    i830->state.Buffer[I830_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 546    i830->state.Buffer[I830_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 547 }
 548
 549 static void
 550 i830LogicOp(GLcontext * ctx, GLenum opcode)
 551 {
 552    struct i830_context *i830 = i830_context(ctx);
 553    int tmp = intel_translate_logic_op(opcode);
 554
 555    DBG("%s\n", __FUNCTION__);
 556
 557    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 558    i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
 559    i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 560 }
 561
 562
 563
 564 static void
 565 i830CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 566 {
 567    struct i830_context *i830 = i830_context(ctx);
 568    GLuint mode;
 569
 570    DBG("%s\n", __FUNCTION__);
 571
 572    if (!ctx->Polygon.CullFlag) {
 573       mode = CULLMODE_NONE;
 574    }
 575    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 576       mode = CULLMODE_CW;
 577
 578       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 579          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 580       if (ctx->Polygon.FrontFace != GL_CCW)
 581          mode ^= (CULLMODE_CW ^ CULLMODE_CCW);
 582    }
 583    else {
 584       mode = CULLMODE_BOTH;
 585    }
 586
 587    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 588    i830->state.Ctx[I830_CTXREG_STATE3] &= ~CULLMODE_MASK;
 589    i830->state.Ctx[I830_CTXREG_STATE3] |= ENABLE_CULL_MODE | mode;
 590 }
 591
 592 static void
 593 i830LineWidth(GLcontext * ctx, GLfloat widthf)
 594 {
 595    struct i830_context *i830 = i830_context(ctx);
 596    int width;
 597    int state5;
 598
 599    DBG("%s\n", __FUNCTION__);
 600
 601    width = (int) (widthf * 2);
 602    CLAMP_SELF(width, 1, 15);
 603
 604    state5 = i830->state.Ctx[I830_CTXREG_STATE5] & ~FIXED_LINE_WIDTH_MASK;
 605    state5 |= (ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(width));
 606
 607    if (state5 != i830->state.Ctx[I830_CTXREG_STATE5]) {
 608       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 609       i830->state.Ctx[I830_CTXREG_STATE5] = state5;
 610    }
 611 }
 612
 613 static void
 614 i830PointSize(GLcontext * ctx, GLfloat size)
 615 {
 616    struct i830_context *i830 = i830_context(ctx);
 617    GLint point_size = (int) size;
 618
 619    DBG("%s\n", __FUNCTION__);
 620
 621    CLAMP_SELF(point_size, 1, 256);
 622    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 623    i830->state.Ctx[I830_CTXREG_STATE5] &= ~FIXED_POINT_WIDTH_MASK;
 624    i830->state.Ctx[I830_CTXREG_STATE5] |= (ENABLE_FIXED_POINT_WIDTH |
 625                                            FIXED_POINT_WIDTH(point_size));
 626 }
 627
 628
 629 /* =============================================================
 630  * Color masks
 631  */
 632
 633 static void
 634 i830ColorMask(GLcontext * ctx,
 635               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 636 {
 637    struct i830_context *i830 = i830_context(ctx);
 638    GLuint tmp = 0;
 639
 640    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b, a);
 641
 642    tmp = ((i830->state.Ctx[I830_CTXREG_ENABLES_2] & ~WRITEMASK_MASK) |
 643           ENABLE_COLOR_MASK |
 644           ENABLE_COLOR_WRITE |
 645           ((!r) << WRITEMASK_RED_SHIFT) |
 646           ((!g) << WRITEMASK_GREEN_SHIFT) |
 647           ((!b) << WRITEMASK_BLUE_SHIFT) | ((!a) << WRITEMASK_ALPHA_SHIFT));
 648
 649    if (tmp != i830->state.Ctx[I830_CTXREG_ENABLES_2]) {
 650       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 651       i830->state.Ctx[I830_CTXREG_ENABLES_2] = tmp;
 652    }
 653 }
 654
 655 static void
 656 update_specular(GLcontext * ctx)
 657 {
 658    struct i830_context *i830 = i830_context(ctx);
 659
 660    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 661    i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_SPEC_ADD_MASK;
 662
 663    if (NEED_SECONDARY_COLOR(ctx))
 664       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_SPEC_ADD;
 665    else
 666       i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_SPEC_ADD;
 667 }
 668
 669 static void
 670 i830LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 671 {
 672    DBG("%s\n", __FUNCTION__);
 673
 674    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 675       update_specular(ctx);
 676    }
 677 }
 678
 679 /* In Mesa 3.5 we can reliably do native flatshading.
 680  */
 681 static void
 682 i830ShadeModel(GLcontext * ctx, GLenum mode)
 683 {
 684    struct i830_context *i830 = i830_context(ctx);
 685    I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 686
 687
 688 #define SHADE_MODE_MASK ((1<<10)|(1<<8)|(1<<6)|(1<<4))
 689
 690    i830->state.Ctx[I830_CTXREG_STATE3] &= ~SHADE_MODE_MASK;
 691
 692    if (mode == GL_FLAT) {
 693       i830->state.Ctx[I830_CTXREG_STATE3] |=
 694          (ALPHA_SHADE_MODE(SHADE_MODE_FLAT) | FOG_SHADE_MODE(SHADE_MODE_FLAT)
 695           | SPEC_SHADE_MODE(SHADE_MODE_FLAT) |
 696           COLOR_SHADE_MODE(SHADE_MODE_FLAT));
 697    }
 698    else {
 699       i830->state.Ctx[I830_CTXREG_STATE3] |=
 700          (ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) |
 701           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 702           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
 703           COLOR_SHADE_MODE(SHADE_MODE_LINEAR));
 704    }
 705 }
 706
 707 /* =============================================================
 708  * Fog
 709  */
 710 static void
 711 i830Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 712 {
 713    struct i830_context *i830 = i830_context(ctx);
 714
 715    DBG("%s\n", __FUNCTION__);
 716
 717    if (pname == GL_FOG_COLOR) {
 718       GLuint color = (((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 719                       ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 720                       ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 721
 722       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 723       i830->state.Ctx[I830_CTXREG_FOGCOLOR] =
 724          (_3DSTATE_FOG_COLOR_CMD | color);
 725    }
 726 }
 727
 728 /* =============================================================
 729  */
 730
 731 static void
 732 i830Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 733 {
 734    struct i830_context *i830 = i830_context(ctx);
 735
 736    switch (cap) {
 737    case GL_LIGHTING:
 738    case GL_COLOR_SUM:
 739       update_specular(ctx);
 740       break;
 741
 742    case GL_ALPHA_TEST:
 743       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 744       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_ALPHA_TEST_MASK;
 745       if (state)
 746          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_ALPHA_TEST;
 747       else
 748          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_ALPHA_TEST;
 749
 750       break;
 751
 752    case GL_BLEND:
 753       i830EvalLogicOpBlendState(ctx);
 754       break;
 755
 756    case GL_COLOR_LOGIC_OP:
 757       i830EvalLogicOpBlendState(ctx);
 758
 759       /* Logicop doesn't seem to work at 16bpp:
 760        */
 761       if (i830->intel.intelScreen->cpp == 2)
 762          FALLBACK(&i830->intel, I830_FALLBACK_LOGICOP, state);
 763       break;
 764
 765    case GL_DITHER:
 766       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 767       i830->state.Ctx[I830_CTXREG_ENABLES_2] &= ~ENABLE_DITHER;
 768
 769       if (state)
 770          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_DITHER;
 771       else
 772          i830->state.Ctx[I830_CTXREG_ENABLES_2] |= DISABLE_DITHER;
 773       break;
 774
 775    case GL_DEPTH_TEST:
 776       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 777       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_DEPTH_TEST_MASK;
 778
 779       if (state)
 780          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_DEPTH_TEST;
 781       else
 782          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_DEPTH_TEST;
 783
 784       /* Also turn off depth writes when GL_DEPTH_TEST is disabled:
 785        */
 786       i830DepthMask(ctx, ctx->Depth.Mask);
 787       break;
 788
 789    case GL_SCISSOR_TEST:
 790       I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS);
 791
 792       if (state)
 793          i830->state.Buffer[I830_DESTREG_SENABLE] =
 794             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 795       else
 796          i830->state.Buffer[I830_DESTREG_SENABLE] =
 797             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 798
 799       break;
 800
 801    case GL_LINE_SMOOTH:
 802       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 803
 804       i830->state.Ctx[I830_CTXREG_AA] &= ~AA_LINE_ENABLE;
 805       if (state)
 806          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_ENABLE;
 807       else
 808          i830->state.Ctx[I830_CTXREG_AA] |= AA_LINE_DISABLE;
 809       break;
 810
 811    case GL_FOG:
 812       I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 813       i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_DIS_FOG_MASK;
 814       if (state)
 815          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_FOG;
 816       else
 817          i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_FOG;
 818       break;
 819
 820    case GL_CULL_FACE:
 821       i830CullFaceFrontFace(ctx, 0);
 822       break;
 823
 824    case GL_TEXTURE_2D:
 825       break;
 826
 827    case GL_STENCIL_TEST:
 828       {
 829          GLboolean hw_stencil = GL_FALSE;
 830          if (ctx->DrawBuffer) {
 831             struct intel_renderbuffer *irbStencil
 832                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 833             hw_stencil = (irbStencil && irbStencil->region);
 834          }
 835          if (hw_stencil) {
 836             I830_STATECHANGE(i830, I830_UPLOAD_CTX);
 837
 838             if (state) {
 839                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= ENABLE_STENCIL_TEST;
 840                i830->state.Ctx[I830_CTXREG_ENABLES_2] |= ENABLE_STENCIL_WRITE;
 841             }
 842             else {
 843                i830->state.Ctx[I830_CTXREG_ENABLES_1] &= ~ENABLE_STENCIL_TEST;
 844                i830->state.Ctx[I830_CTXREG_ENABLES_2] &=
 845                   ~ENABLE_STENCIL_WRITE;
 846                i830->state.Ctx[I830_CTXREG_ENABLES_1] |= DISABLE_STENCIL_TEST;
 847                i830->state.Ctx[I830_CTXREG_ENABLES_2] |=
 848                   DISABLE_STENCIL_WRITE;
 849             }
 850          }
 851          else {
 852             FALLBACK(&i830->intel, I830_FALLBACK_STENCIL, state);
 853          }
 854       }
 855       break;
 856
 857    case GL_POLYGON_STIPPLE:
 858       /* The stipple command worked on my 855GM box, but not my 845G.
 859        * I'll do more testing later to find out exactly which hardware
 860        * supports it.  Disabled for now.
 861        */
 862       if (i830->intel.hw_stipple &&
 863           i830->intel.reduced_primitive == GL_TRIANGLES) {
 864          I830_STATECHANGE(i830, I830_UPLOAD_STIPPLE);
 865          i830->state.Stipple[I830_STPREG_ST1] &= ~ST1_ENABLE;
 866          if (state)
 867             i830->state.Stipple[I830_STPREG_ST1] |= ST1_ENABLE;
 868       }
 869       break;
 870
 871    default:
 872       ;
 873    }
 874 }
 875
 876
 877 static void
 878 i830_init_packets(struct i830_context *i830)
 879 {
 880    intelScreenPrivate *screen = i830->intel.intelScreen;
 881
 882    /* Zero all state */
 883    memset(&i830->state, 0, sizeof(i830->state));
 884
 885    /* Set default blend state */
 886    i830->state.TexBlend[0][0] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 887                                  TEXPIPE_COLOR |
 888                                  ENABLE_TEXOUTPUT_WRT_SEL |
 889                                  TEXOP_OUTPUT_CURRENT |
 890                                  DISABLE_TEX_CNTRL_STAGE |
 891                                  TEXOP_SCALE_1X |
 892                                  TEXOP_MODIFY_PARMS |
 893                                  TEXOP_LAST_STAGE | TEXBLENDOP_ARG1);
 894    i830->state.TexBlend[0][1] = (_3DSTATE_MAP_BLEND_OP_CMD(0) |
 895                                  TEXPIPE_ALPHA |
 896                                  ENABLE_TEXOUTPUT_WRT_SEL |
 897                                  TEXOP_OUTPUT_CURRENT |
 898                                  TEXOP_SCALE_1X |
 899                                  TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1);
 900    i830->state.TexBlend[0][2] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 901                                  TEXPIPE_COLOR |
 902                                  TEXBLEND_ARG1 |
 903                                  TEXBLENDARG_MODIFY_PARMS |
 904                                  TEXBLENDARG_DIFFUSE);
 905    i830->state.TexBlend[0][3] = (_3DSTATE_MAP_BLEND_ARG_CMD(0) |
 906                                  TEXPIPE_ALPHA |
 907                                  TEXBLEND_ARG1 |
 908                                  TEXBLENDARG_MODIFY_PARMS |
 909                                  TEXBLENDARG_DIFFUSE);
 910
 911    i830->state.TexBlendWordsUsed[0] = 4;
 912
 913
 914    i830->state.Ctx[I830_CTXREG_VF] = 0;
 915    i830->state.Ctx[I830_CTXREG_VF2] = 0;
 916
 917    i830->state.Ctx[I830_CTXREG_AA] = (_3DSTATE_AA_CMD |
 918                                       AA_LINE_ECAAR_WIDTH_ENABLE |
 919                                       AA_LINE_ECAAR_WIDTH_1_0 |
 920                                       AA_LINE_REGION_WIDTH_ENABLE |
 921                                       AA_LINE_REGION_WIDTH_1_0 |
 922                                       AA_LINE_DISABLE);
 923
 924    i830->state.Ctx[I830_CTXREG_ENABLES_1] = (_3DSTATE_ENABLES_1_CMD |
 925                                              DISABLE_LOGIC_OP |
 926                                              DISABLE_STENCIL_TEST |
 927                                              DISABLE_DEPTH_BIAS |
 928                                              DISABLE_SPEC_ADD |
 929                                              DISABLE_FOG |
 930                                              DISABLE_ALPHA_TEST |
 931                                              DISABLE_COLOR_BLEND |
 932                                              DISABLE_DEPTH_TEST);
 933
 934 #if 000                         /* XXX all the stencil enable state is set in i830Enable(), right? */
 935    if (i830->intel.hw_stencil) {
 936       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 937                                                 ENABLE_STENCIL_WRITE |
 938                                                 ENABLE_TEX_CACHE |
 939                                                 ENABLE_DITHER |
 940                                                 ENABLE_COLOR_MASK |
 941                                                 /* set no color comps disabled */
 942                                                 ENABLE_COLOR_WRITE |
 943                                                 ENABLE_DEPTH_WRITE);
 944    }
 945    else
 946 #endif
 947    {
 948       i830->state.Ctx[I830_CTXREG_ENABLES_2] = (_3DSTATE_ENABLES_2_CMD |
 949                                                 DISABLE_STENCIL_WRITE |
 950                                                 ENABLE_TEX_CACHE |
 951                                                 ENABLE_DITHER |
 952                                                 ENABLE_COLOR_MASK |
 953                                                 /* set no color comps disabled */
 954                                                 ENABLE_COLOR_WRITE |
 955                                                 ENABLE_DEPTH_WRITE);
 956    }
 957
 958    i830->state.Ctx[I830_CTXREG_STATE1] = (_3DSTATE_MODES_1_CMD |
 959                                           ENABLE_COLR_BLND_FUNC |
 960                                           BLENDFUNC_ADD |
 961                                           ENABLE_SRC_BLND_FACTOR |
 962                                           SRC_BLND_FACT(BLENDFACT_ONE) |
 963                                           ENABLE_DST_BLND_FACTOR |
 964                                           DST_BLND_FACT(BLENDFACT_ZERO));
 965
 966    i830->state.Ctx[I830_CTXREG_STATE2] = (_3DSTATE_MODES_2_CMD |
 967                                           ENABLE_GLOBAL_DEPTH_BIAS |
 968                                           GLOBAL_DEPTH_BIAS(0) |
 969                                           ENABLE_ALPHA_TEST_FUNC |
 970                                           ALPHA_TEST_FUNC(COMPAREFUNC_ALWAYS)
 971                                           | ALPHA_REF_VALUE(0));
 972
 973    i830->state.Ctx[I830_CTXREG_STATE3] = (_3DSTATE_MODES_3_CMD |
 974                                           ENABLE_DEPTH_TEST_FUNC |
 975                                           DEPTH_TEST_FUNC(COMPAREFUNC_LESS) |
 976                                           ENABLE_ALPHA_SHADE_MODE |
 977                                           ALPHA_SHADE_MODE(SHADE_MODE_LINEAR)
 978                                           | ENABLE_FOG_SHADE_MODE |
 979                                           FOG_SHADE_MODE(SHADE_MODE_LINEAR) |
 980                                           ENABLE_SPEC_SHADE_MODE |
 981                                           SPEC_SHADE_MODE(SHADE_MODE_LINEAR) |
 982                                           ENABLE_COLOR_SHADE_MODE |
 983                                           COLOR_SHADE_MODE(SHADE_MODE_LINEAR)
 984                                           | ENABLE_CULL_MODE | CULLMODE_NONE);
 985
 986    i830->state.Ctx[I830_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 987                                           ENABLE_LOGIC_OP_FUNC |
 988                                           LOGIC_OP_FUNC(LOGICOP_COPY) |
 989                                           ENABLE_STENCIL_TEST_MASK |
 990                                           STENCIL_TEST_MASK(0xff) |
 991                                           ENABLE_STENCIL_WRITE_MASK |
 992                                           STENCIL_WRITE_MASK(0xff));
 993
 994    i830->state.Ctx[I830_CTXREG_STENCILTST] = (_3DSTATE_STENCIL_TEST_CMD |
 995                                               ENABLE_STENCIL_PARMS |
 996                                               STENCIL_FAIL_OP(STENCILOP_KEEP)
 997                                               |
 998                                               STENCIL_PASS_DEPTH_FAIL_OP
 999                                               (STENCILOP_KEEP) |
1000                                               STENCIL_PASS_DEPTH_PASS_OP
1001                                               (STENCILOP_KEEP) |
1002                                               ENABLE_STENCIL_TEST_FUNC |
1003                                               STENCIL_TEST_FUNC
1004                                               (COMPAREFUNC_ALWAYS) |
1005                                               ENABLE_STENCIL_REF_VALUE |
1006                                               STENCIL_REF_VALUE(0));
1007
1008    i830->state.Ctx[I830_CTXREG_STATE5] = (_3DSTATE_MODES_5_CMD | FLUSH_TEXTURE_CACHE | ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) |       /* 1.0 */
1009                                           ENABLE_FIXED_POINT_WIDTH |
1010                                           FIXED_POINT_WIDTH(1));
1011
1012    i830->state.Ctx[I830_CTXREG_IALPHAB] = (_3DSTATE_INDPT_ALPHA_BLEND_CMD |
1013                                            DISABLE_INDPT_ALPHA_BLEND |
1014                                            ENABLE_ALPHA_BLENDFUNC |
1015                                            ABLENDFUNC_ADD);
1016
1017    i830->state.Ctx[I830_CTXREG_FOGCOLOR] = (_3DSTATE_FOG_COLOR_CMD |
1018                                             FOG_COLOR_RED(0) |
1019                                             FOG_COLOR_GREEN(0) |
1020                                             FOG_COLOR_BLUE(0));
1021
1022    i830->state.Ctx[I830_CTXREG_BLENDCOLOR0] = _3DSTATE_CONST_BLEND_COLOR_CMD;
1023    i830->state.Ctx[I830_CTXREG_BLENDCOLOR1] = 0;
1024
1025    i830->state.Ctx[I830_CTXREG_MCSB0] = _3DSTATE_MAP_COORD_SETBIND_CMD;
1026    i830->state.Ctx[I830_CTXREG_MCSB1] = (TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) |
1027                                          TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) |
1028                                          TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) |
1029                                          TEXBIND_SET0(TEXCOORDSRC_VTXSET_0));
1030
1031
1032    i830->state.Stipple[I830_STPREG_ST0] = _3DSTATE_STIPPLE;
1033
1034    i830->state.Buffer[I830_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
1035    i830->state.Buffer[I830_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) |     /* pitch in bytes */
1036                                                  BUF_3D_USE_FENCE);
1037
1038
1039    i830->state.Buffer[I830_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
1040    i830->state.Buffer[I830_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) |  /* pitch in bytes */
1041                                                  BUF_3D_USE_FENCE);
1042
1043    i830->state.Buffer[I830_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
1044
1045    switch (screen->fbFormat) {
1046    case DV_PF_565:
1047       i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |   /* .5 */
1048                                               DSTORG_VERT_BIAS(0x8) |   /* .5 */
1049                                               screen->fbFormat |
1050                                               DEPTH_IS_Z |
1051                                               DEPTH_FRMT_16_FIXED);
1052       break;
1053    case DV_PF_8888:
1054       i830->state.Buffer[I830_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |   /* .5 */
1055                                               DSTORG_VERT_BIAS(0x8) |   /* .5 */
1056                                               screen->fbFormat |
1057                                               DEPTH_IS_Z |
1058                                               DEPTH_FRMT_24_FIXED_8_OTHER);
1059       break;
1060    }
1061
1062    i830->state.Buffer[I830_DESTREG_SENABLE] = (_3DSTATE_SCISSOR_ENABLE_CMD |
1063                                                DISABLE_SCISSOR_RECT);
1064    i830->state.Buffer[I830_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
1065    i830->state.Buffer[I830_DESTREG_SR1] = 0;
1066    i830->state.Buffer[I830_DESTREG_SR2] = 0;
1067 }
1068
1069
1070 void
1071 i830InitStateFuncs(struct dd_function_table *functions)
1072 {
1073    functions->AlphaFunc = i830AlphaFunc;
1074    functions->BlendColor = i830BlendColor;
1075    functions->BlendEquationSeparate = i830BlendEquationSeparate;
1076    functions->BlendFuncSeparate = i830BlendFuncSeparate;
1077    functions->ColorMask = i830ColorMask;
1078    functions->CullFace = i830CullFaceFrontFace;
1079    functions->DepthFunc = i830DepthFunc;
1080    functions->DepthMask = i830DepthMask;
1081    functions->Enable = i830Enable;
1082    functions->Fogfv = i830Fogfv;
1083    functions->FrontFace = i830CullFaceFrontFace;
1084    functions->LightModelfv = i830LightModelfv;
1085    functions->LineWidth = i830LineWidth;
1086    functions->LogicOpcode = i830LogicOp;
1087    functions->PointSize = i830PointSize;
1088    functions->PolygonStipple = i830PolygonStipple;
1089    functions->Scissor = i830Scissor;
1090    functions->ShadeModel = i830ShadeModel;
1091    functions->StencilFuncSeparate = i830StencilFuncSeparate;
1092    functions->StencilMaskSeparate = i830StencilMaskSeparate;
1093    functions->StencilOpSeparate = i830StencilOpSeparate;
1094 }
1095
1096 void
1097 i830InitState(struct i830_context *i830)
1098 {
1099    GLcontext *ctx = &i830->intel.ctx;
1100
1101    i830_init_packets(i830);
1102
1103    intelInitState(ctx);
1104
1105    memcpy(&i830->initial, &i830->state, sizeof(i830->state));
1106
1107    i830->current = &i830->state;
1108    i830->state.emitted = 0;
1109    i830->state.active = (I830_UPLOAD_INVARIENT |
1110                          I830_UPLOAD_TEXBLEND(0) |
1111                          I830_UPLOAD_STIPPLE |
1112                          I830_UPLOAD_CTX | I830_UPLOAD_BUFFERS);
1113 }