src/mesa/drivers/dri/i915tex/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "glheader.h"
  30 #include "context.h"
  31 #include "macros.h"
  32 #include "enums.h"
  33 #include "dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "intel_fbo.h"
  40 #include "intel_screen.h"
  41 #include "intel_batchbuffer.h"
  42
  43 #include "i915_context.h"
  44 #include "i915_reg.h"
  45
  46 #define FILE_DEBUG_FLAG DEBUG_STATE
  47
  48 static void
  49 i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  50                         GLuint mask)
  51 {
  52    struct i915_context *i915 = I915_CONTEXT(ctx);
  53    int test = intel_translate_compare_func(func);
  54
  55    mask = mask & 0xff;
  56
  57    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  58        _mesa_lookup_enum_by_nr(func), ref, mask);
  59
  60
  61    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  62    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  63    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  64                                            STENCIL_TEST_MASK(mask));
  65
  66    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
  67                                           S5_STENCIL_TEST_FUNC_MASK);
  68
  69    i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
  70                                          (test <<
  71                                           S5_STENCIL_TEST_FUNC_SHIFT));
  72 }
  73
  74 static void
  75 i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  76 {
  77    struct i915_context *i915 = I915_CONTEXT(ctx);
  78
  79    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  80
  81    mask = mask & 0xff;
  82
  83    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  84    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  85    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  86                                            STENCIL_WRITE_MASK(mask));
  87 }
  88
  89
  90 static void
  91 i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  92                       GLenum zpass)
  93 {
  94    struct i915_context *i915 = I915_CONTEXT(ctx);
  95    int fop = intel_translate_stencil_op(fail);
  96    int dfop = intel_translate_stencil_op(zfail);
  97    int dpop = intel_translate_stencil_op(zpass);
  98
  99
 100    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
 101        _mesa_lookup_enum_by_nr(fail),
 102        _mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
 103
 104    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 105
 106    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
 107                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 108                                           S5_STENCIL_PASS_Z_PASS_MASK);
 109
 110    i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
 111                                          (dfop <<
 112                                           S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 113                                          (dpop <<
 114                                           S5_STENCIL_PASS_Z_PASS_SHIFT));
 115 }
 116
 117 static void
 118 i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 119 {
 120    struct i915_context *i915 = I915_CONTEXT(ctx);
 121    int test = intel_translate_compare_func(func);
 122    GLubyte refByte;
 123
 124    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 125
 126    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 127    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 128                                           S6_ALPHA_REF_MASK);
 129    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 130                                          (((GLuint) refByte) <<
 131                                           S6_ALPHA_REF_SHIFT));
 132 }
 133
 134 /* This function makes sure that the proper enables are
 135  * set for LogicOp, Independant Alpha Blend, and Blending.
 136  * It needs to be called from numerous places where we
 137  * could change the LogicOp or Independant Alpha Blend without subsequent
 138  * calls to glEnable.
 139  */
 140 static void
 141 i915EvalLogicOpBlendState(GLcontext * ctx)
 142 {
 143    struct i915_context *i915 = I915_CONTEXT(ctx);
 144
 145    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 146
 147    if (RGBA_LOGICOP_ENABLED(ctx)) {
 148       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 149       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 150    }
 151    else {
 152       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 153
 154       if (ctx->Color.BlendEnabled) {
 155          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 156       }
 157       else {
 158          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 159       }
 160    }
 161 }
 162
 163 static void
 164 i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 165 {
 166    struct i915_context *i915 = I915_CONTEXT(ctx);
 167    GLubyte r, g, b, a;
 168
 169    DBG("%s\n", __FUNCTION__);
 170
 171    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 172    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 173    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 174    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 175
 176    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 177    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 178       (a << 24) | (r << 16) | (g << 8) | b;
 179 }
 180
 181
 182 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 183 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 184 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 185 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 186
 187
 188
 189 static GLuint
 190 translate_blend_equation(GLenum mode)
 191 {
 192    switch (mode) {
 193    case GL_FUNC_ADD:
 194       return BLENDFUNC_ADD;
 195    case GL_MIN:
 196       return BLENDFUNC_MIN;
 197    case GL_MAX:
 198       return BLENDFUNC_MAX;
 199    case GL_FUNC_SUBTRACT:
 200       return BLENDFUNC_SUBTRACT;
 201    case GL_FUNC_REVERSE_SUBTRACT:
 202       return BLENDFUNC_REVERSE_SUBTRACT;
 203    default:
 204       return 0;
 205    }
 206 }
 207
 208 static void
 209 i915UpdateBlendState(GLcontext * ctx)
 210 {
 211    struct i915_context *i915 = I915_CONTEXT(ctx);
 212    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 213                  ~(IAB_SRC_FACTOR_MASK |
 214                    IAB_DST_FACTOR_MASK |
 215                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 216
 217    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 218                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 219                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 220
 221    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 222    GLuint eqA = ctx->Color.BlendEquationA;
 223    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 224    GLuint dstRGB = ctx->Color.BlendDstRGB;
 225    GLuint srcA = ctx->Color.BlendSrcA;
 226    GLuint dstA = ctx->Color.BlendDstA;
 227
 228    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 229       srcRGB = dstRGB = GL_ONE;
 230    }
 231
 232    if (eqA == GL_MIN || eqA == GL_MAX) {
 233       srcA = dstA = GL_ONE;
 234    }
 235
 236    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 237    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 238    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 239
 240    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 241    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 242    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 243
 244    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 245       iab |= IAB_ENABLE;
 246
 247    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 248        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 249       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 250       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 251       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 252    }
 253
 254    /* This will catch a logicop blend equation */
 255    i915EvalLogicOpBlendState(ctx);
 256 }
 257
 258
 259 static void
 260 i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
 261                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 262 {
 263    i915UpdateBlendState(ctx);
 264 }
 265
 266
 267 static void
 268 i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 269 {
 270    i915UpdateBlendState(ctx);
 271 }
 272
 273
 274 static void
 275 i915DepthFunc(GLcontext * ctx, GLenum func)
 276 {
 277    struct i915_context *i915 = I915_CONTEXT(ctx);
 278    int test = intel_translate_compare_func(func);
 279
 280    DBG("%s\n", __FUNCTION__);
 281
 282    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 283    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 284    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 285 }
 286
 287 static void
 288 i915DepthMask(GLcontext * ctx, GLboolean flag)
 289 {
 290    struct i915_context *i915 = I915_CONTEXT(ctx);
 291
 292    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 293
 294    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 295
 296    if (flag && ctx->Depth.Test)
 297       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 298    else
 299       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 300 }
 301
 302 /* =============================================================
 303  * Polygon stipple
 304  *
 305  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 306  * Fortunately stipple is usually a repeating pattern.
 307  */
 308 static void
 309 i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 310 {
 311    struct i915_context *i915 = I915_CONTEXT(ctx);
 312    const GLubyte *m = mask;
 313    GLubyte p[4];
 314    int i, j, k;
 315    int active = (ctx->Polygon.StippleFlag &&
 316                  i915->intel.reduced_primitive == GL_TRIANGLES);
 317    GLuint newMask;
 318
 319    if (active) {
 320       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 321       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 322    }
 323
 324    p[0] = mask[12] & 0xf;
 325    p[0] |= p[0] << 4;
 326    p[1] = mask[8] & 0xf;
 327    p[1] |= p[1] << 4;
 328    p[2] = mask[4] & 0xf;
 329    p[2] |= p[2] << 4;
 330    p[3] = mask[0] & 0xf;
 331    p[3] |= p[3] << 4;
 332
 333    for (k = 0; k < 8; k++)
 334       for (j = 3; j >= 0; j--)
 335          for (i = 0; i < 4; i++, m++)
 336             if (*m != p[j]) {
 337                i915->intel.hw_stipple = 0;
 338                return;
 339             }
 340
 341    newMask = (((p[0] & 0xf) << 0) |
 342               ((p[1] & 0xf) << 4) |
 343               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 344
 345
 346    if (newMask == 0xffff || newMask == 0x0) {
 347       /* this is needed to make conform pass */
 348       i915->intel.hw_stipple = 0;
 349       return;
 350    }
 351
 352    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 353    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 354    i915->intel.hw_stipple = 1;
 355
 356    if (active)
 357       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 358 }
 359
 360
 361 /* =============================================================
 362  * Hardware clipping
 363  */
 364 static void
 365 i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 366 {
 367    struct i915_context *i915 = I915_CONTEXT(ctx);
 368    int x1, y1, x2, y2;
 369
 370    if (!ctx->DrawBuffer)
 371       return;
 372
 373    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 374
 375    if (ctx->DrawBuffer->Name == 0) {
 376       x1 = x;
 377       y1 = ctx->DrawBuffer->Height - (y + h);
 378       x2 = x + w - 1;
 379       y2 = y1 + h - 1;
 380       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 381    }
 382    else {
 383       /* FBO - not inverted
 384        */
 385       x1 = x;
 386       y1 = y;
 387       x2 = x + w - 1;
 388       y2 = y + h - 1;
 389       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 390    }
 391
 392    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 393    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 394    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 395    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 396
 397    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 398
 399    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 400    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 401    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 402 }
 403
 404 static void
 405 i915LogicOp(GLcontext * ctx, GLenum opcode)
 406 {
 407    struct i915_context *i915 = I915_CONTEXT(ctx);
 408    int tmp = intel_translate_logic_op(opcode);
 409
 410    DBG("%s\n", __FUNCTION__);
 411
 412    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 413    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 414    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 415 }
 416
 417
 418
 419 static void
 420 i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 421 {
 422    struct i915_context *i915 = I915_CONTEXT(ctx);
 423    GLuint mode;
 424
 425    DBG("%s %d\n", __FUNCTION__,
 426        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 427
 428    if (!ctx->Polygon.CullFlag) {
 429       mode = S4_CULLMODE_NONE;
 430    }
 431    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 432       mode = S4_CULLMODE_CW;
 433
 434       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 435          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 436       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 437          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 438       if (ctx->Polygon.FrontFace != GL_CCW)
 439          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 440    }
 441    else {
 442       mode = S4_CULLMODE_BOTH;
 443    }
 444
 445    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 446    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 447    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 448 }
 449
 450 static void
 451 i915LineWidth(GLcontext * ctx, GLfloat widthf)
 452 {
 453    struct i915_context *i915 = I915_CONTEXT(ctx);
 454    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 455    int width;
 456
 457    DBG("%s\n", __FUNCTION__);
 458
 459    width = (int) (widthf * 2);
 460    CLAMP_SELF(width, 1, 0xf);
 461    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 462
 463    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 464       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 465       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 466    }
 467 }
 468
 469 static void
 470 i915PointSize(GLcontext * ctx, GLfloat size)
 471 {
 472    struct i915_context *i915 = I915_CONTEXT(ctx);
 473    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 474    GLint point_size = (int) size;
 475
 476    DBG("%s\n", __FUNCTION__);
 477
 478    CLAMP_SELF(point_size, 1, 255);
 479    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 480
 481    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 482       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 483       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 484    }
 485 }
 486
 487
 488 /* =============================================================
 489  * Color masks
 490  */
 491
 492 static void
 493 i915ColorMask(GLcontext * ctx,
 494               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 495 {
 496    struct i915_context *i915 = I915_CONTEXT(ctx);
 497    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 498
 499    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 500        a);
 501
 502    if (!r)
 503       tmp |= S5_WRITEDISABLE_RED;
 504    if (!g)
 505       tmp |= S5_WRITEDISABLE_GREEN;
 506    if (!b)
 507       tmp |= S5_WRITEDISABLE_BLUE;
 508    if (!a)
 509       tmp |= S5_WRITEDISABLE_ALPHA;
 510
 511    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 512       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 513       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 514    }
 515 }
 516
 517 static void
 518 update_specular(GLcontext * ctx)
 519 {
 520    /* A hack to trigger the rebuild of the fragment program.
 521     */
 522    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 523 }
 524
 525 static void
 526 i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 527 {
 528    DBG("%s\n", __FUNCTION__);
 529
 530    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 531       update_specular(ctx);
 532    }
 533 }
 534
 535 static void
 536 i915ShadeModel(GLcontext * ctx, GLenum mode)
 537 {
 538    struct i915_context *i915 = I915_CONTEXT(ctx);
 539    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 540
 541    if (mode == GL_SMOOTH) {
 542       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 543                                              S4_FLATSHADE_COLOR |
 544                                              S4_FLATSHADE_SPECULAR);
 545    }
 546    else {
 547       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 548                                             S4_FLATSHADE_COLOR |
 549                                             S4_FLATSHADE_SPECULAR);
 550    }
 551 }
 552
 553 /* =============================================================
 554  * Fog
 555  */
 556 void
 557 i915_update_fog(GLcontext * ctx)
 558 {
 559    struct i915_context *i915 = I915_CONTEXT(ctx);
 560    GLenum mode;
 561    GLboolean enabled;
 562    GLboolean try_pixel_fog;
 563
 564    if (ctx->FragmentProgram._Enabled) {
 565       /* Pull in static fog state from program */
 566
 567       mode = ctx->FragmentProgram._Current->FogOption;
 568       enabled = (mode != GL_NONE);
 569       try_pixel_fog = 0;
 570    }
 571    else {
 572       enabled = ctx->Fog.Enabled;
 573       mode = ctx->Fog.Mode;
 574
 575       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT && ctx->Hint.Fog == GL_NICEST && 0);       /* XXX - DISABLE -- Need ortho fallback */
 576    }
 577
 578    if (!enabled) {
 579       i915->vertex_fog = I915_FOG_NONE;
 580    }
 581    else if (try_pixel_fog) {
 582
 583       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 584       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 585       i915->vertex_fog = I915_FOG_PIXEL;
 586
 587       switch (mode) {
 588       case GL_LINEAR:
 589          if (ctx->Fog.End <= ctx->Fog.Start) {
 590             /* XXX - this won't work with fragment programs.  Need to
 591              * either fallback or append fog instructions to end of
 592              * program in the case of linear fog.
 593              */
 594             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 595             i915->vertex_fog = I915_FOG_VERTEX;
 596          }
 597          else {
 598             GLfloat c1 = ctx->Fog.End / (ctx->Fog.End - ctx->Fog.Start);
 599             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 600
 601             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 602             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 603             i915->state.Fog[I915_FOGREG_MODE1] |=
 604                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 605
 606             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 607                i915->state.Fog[I915_FOGREG_MODE2] =
 608                   (GLuint) (c2 * FMC2_C2_ONE);
 609             }
 610             else {
 611                union
 612                {
 613                   float f;
 614                   int i;
 615                } fi;
 616                fi.f = c2;
 617                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 618             }
 619          }
 620          break;
 621       case GL_EXP:
 622          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 623          break;
 624       case GL_EXP2:
 625          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 626          break;
 627       default:
 628          break;
 629       }
 630    }
 631    else {                       /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 632
 633       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 634       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 635       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 636       i915->vertex_fog = I915_FOG_VERTEX;
 637    }
 638
 639    {
 640       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 641       I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 642       if (enabled)
 643          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 644       else
 645          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 646    }
 647
 648     /* always enbale pixel fog
 649     * vertex fog use precaculted fog coord will conflict with appended
 650     * fog program
 651     */
 652     _tnl_allow_vertex_fog( ctx, 0 );
 653     _tnl_allow_pixel_fog( ctx, 1 );
 654 }
 655
 656 static void
 657 i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 658 {
 659    struct i915_context *i915 = I915_CONTEXT(ctx);
 660
 661    switch (pname) {
 662    case GL_FOG_COORDINATE_SOURCE_EXT:
 663    case GL_FOG_MODE:
 664    case GL_FOG_START:
 665    case GL_FOG_END:
 666       break;
 667
 668    case GL_FOG_DENSITY:
 669       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 670
 671       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 672          i915->state.Fog[I915_FOGREG_MODE3] = (GLuint) (ctx->Fog.Density *
 673                                                         FMC3_D_ONE);
 674       }
 675       else {
 676          union
 677          {
 678             float f;
 679             int i;
 680          } fi;
 681          fi.f = ctx->Fog.Density;
 682          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 683       }
 684       break;
 685
 686    case GL_FOG_COLOR:
 687       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 688       i915->state.Fog[I915_FOGREG_COLOR] =
 689          (_3DSTATE_FOG_COLOR_CMD |
 690           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 691           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 692           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 693       break;
 694
 695    default:
 696       break;
 697    }
 698 }
 699
 700 static void
 701 i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 702 {
 703    switch (target) {
 704    case GL_FOG_HINT:
 705       break;
 706    default:
 707       break;
 708    }
 709 }
 710
 711 /* =============================================================
 712  */
 713
 714 static void
 715 i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 716 {
 717    struct i915_context *i915 = I915_CONTEXT(ctx);
 718
 719    switch (cap) {
 720    case GL_TEXTURE_2D:
 721       break;
 722
 723    case GL_LIGHTING:
 724    case GL_COLOR_SUM:
 725       update_specular(ctx);
 726       break;
 727
 728    case GL_ALPHA_TEST:
 729       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 730       if (state)
 731          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 732       else
 733          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 734       break;
 735
 736    case GL_BLEND:
 737       i915EvalLogicOpBlendState(ctx);
 738       break;
 739
 740    case GL_COLOR_LOGIC_OP:
 741       i915EvalLogicOpBlendState(ctx);
 742
 743       /* Logicop doesn't seem to work at 16bpp:
 744        */
 745       if (i915->intel.intelScreen->cpp == 2)    /* XXX FBO fix */
 746          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 747       break;
 748
 749    case GL_FRAGMENT_PROGRAM_ARB:
 750       break;
 751
 752    case GL_DITHER:
 753       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 754       if (state)
 755          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 756       else
 757          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 758       break;
 759
 760    case GL_DEPTH_TEST:
 761       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 762       if (state)
 763          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 764       else
 765          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 766
 767       i915DepthMask(ctx, ctx->Depth.Mask);
 768       break;
 769
 770    case GL_SCISSOR_TEST:
 771       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 772       if (state)
 773          i915->state.Buffer[I915_DESTREG_SENABLE] =
 774             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 775       else
 776          i915->state.Buffer[I915_DESTREG_SENABLE] =
 777             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 778       break;
 779
 780    case GL_LINE_SMOOTH:
 781       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 782       if (state)
 783          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 784       else
 785          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 786       break;
 787
 788    case GL_FOG:
 789       break;
 790
 791    case GL_CULL_FACE:
 792       i915CullFaceFrontFace(ctx, 0);
 793       break;
 794
 795    case GL_STENCIL_TEST:
 796       {
 797          GLboolean hw_stencil = GL_FALSE;
 798          if (ctx->DrawBuffer) {
 799             struct intel_renderbuffer *irbStencil
 800                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 801             hw_stencil = (irbStencil && irbStencil->region);
 802          }
 803          if (hw_stencil) {
 804             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 805             if (state)
 806                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 807                                                      S5_STENCIL_WRITE_ENABLE);
 808             else
 809                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 810                                                       S5_STENCIL_WRITE_ENABLE);
 811          }
 812          else {
 813             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 814          }
 815       }
 816       break;
 817
 818    case GL_POLYGON_STIPPLE:
 819       /* The stipple command worked on my 855GM box, but not my 845G.
 820        * I'll do more testing later to find out exactly which hardware
 821        * supports it.  Disabled for now.
 822        */
 823       if (i915->intel.hw_stipple &&
 824           i915->intel.reduced_primitive == GL_TRIANGLES) {
 825          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 826          if (state)
 827             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 828          else
 829             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 830       }
 831       break;
 832
 833    case GL_POLYGON_SMOOTH:
 834       break;
 835
 836    case GL_POINT_SMOOTH:
 837       break;
 838
 839    default:
 840       ;
 841    }
 842 }
 843
 844
 845 static void
 846 i915_init_packets(struct i915_context *i915)
 847 {
 848    intelScreenPrivate *screen = i915->intel.intelScreen;
 849
 850    /* Zero all state */
 851    memset(&i915->state, 0, sizeof(i915->state));
 852
 853
 854    {
 855       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 856       /* Probably don't want to upload all this stuff every time one
 857        * piece changes.
 858        */
 859       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 860                                          I1_LOAD_S(2) |
 861                                          I1_LOAD_S(4) |
 862                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (3));
 863       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 864       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 865       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 866
 867       if (screen->cpp == 2)     /* XXX FBO fix */
 868          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 869
 870
 871       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 872                                            (2 << S6_TRISTRIP_PV_SHIFT));
 873
 874       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 875                                              ENABLE_LOGIC_OP_FUNC |
 876                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 877                                              ENABLE_STENCIL_TEST_MASK |
 878                                              STENCIL_TEST_MASK(0xff) |
 879                                              ENABLE_STENCIL_WRITE_MASK |
 880                                              STENCIL_WRITE_MASK(0xff));
 881
 882       i915->state.Ctx[I915_CTXREG_IAB] =
 883          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 884           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 885
 886       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
 887          _3DSTATE_CONST_BLEND_COLOR_CMD;
 888       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
 889
 890    }
 891
 892    {
 893       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 894       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 895    }
 896
 897
 898    {
 899       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 900       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
 901       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
 902                                             FMC1_FOGFUNC_VERTEX |
 903                                             FMC1_FOGINDEX_MODIFY_ENABLE |
 904                                             FMC1_FOGINDEX_W |
 905                                             FMC1_C1_C2_MODIFY_ENABLE |
 906                                             FMC1_DENSITY_MODIFY_ENABLE);
 907       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
 908    }
 909
 910
 911    {
 912       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 913       /* color buffer offset/stride */
 914       i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
 915       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 916       i915->state.Buffer[I915_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) |  /* pitch in bytes */
 917                                                     BUF_3D_USE_FENCE);
 918
 919       i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
 920       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 921       i915->state.Buffer[I915_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) |       /* pitch in bytes */
 922                                                     BUF_3D_USE_FENCE);
 923
 924       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 925
 926       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 927 #if 0                           /* seems we don't need this */
 928       switch (screen->fbFormat) {
 929       case DV_PF_565:
 930          i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |        /* .5 */
 931                                                  DSTORG_VERT_BIAS(0x8) |        /* .5 */
 932                                                  LOD_PRECLAMP_OGL |
 933                                                  TEX_DEFAULT_COLOR_OGL |
 934                                                  DITHER_FULL_ALWAYS |
 935                                                  screen->fbFormat |
 936                                                  DEPTH_FRMT_16_FIXED);
 937          break;
 938       case DV_PF_8888:
 939          i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |        /* .5 */
 940                                                  DSTORG_VERT_BIAS(0x8) |        /* .5 */
 941                                                  LOD_PRECLAMP_OGL |
 942                                                  TEX_DEFAULT_COLOR_OGL |
 943                                                  screen->fbFormat |
 944                                                  DEPTH_FRMT_24_FIXED_8_OTHER);
 945          break;
 946       }
 947 #endif
 948
 949
 950       /* scissor */
 951       i915->state.Buffer[I915_DESTREG_SENABLE] =
 952          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 953       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 954       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 955       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 956    }
 957
 958
 959 #if 0
 960    {
 961       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 962       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 963       i915->state.Default[I915_DEFREG_C1] = 0;
 964       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 965       i915->state.Default[I915_DEFREG_S1] = 0;
 966       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 967       i915->state.Default[I915_DEFREG_Z1] = 0;
 968    }
 969 #endif
 970
 971
 972    /* These will be emitted every at the head of every buffer, unless
 973     * we get hardware contexts working.
 974     */
 975    i915->state.active = (I915_UPLOAD_PROGRAM |
 976                          I915_UPLOAD_STIPPLE |
 977                          I915_UPLOAD_CTX |
 978                          I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
 979 }
 980
 981 void
 982 i915InitStateFunctions(struct dd_function_table *functions)
 983 {
 984    functions->AlphaFunc = i915AlphaFunc;
 985    functions->BlendColor = i915BlendColor;
 986    functions->BlendEquationSeparate = i915BlendEquationSeparate;
 987    functions->BlendFuncSeparate = i915BlendFuncSeparate;
 988    functions->ColorMask = i915ColorMask;
 989    functions->CullFace = i915CullFaceFrontFace;
 990    functions->DepthFunc = i915DepthFunc;
 991    functions->DepthMask = i915DepthMask;
 992    functions->Enable = i915Enable;
 993    functions->Fogfv = i915Fogfv;
 994    functions->FrontFace = i915CullFaceFrontFace;
 995    functions->Hint = i915Hint;
 996    functions->LightModelfv = i915LightModelfv;
 997    functions->LineWidth = i915LineWidth;
 998    functions->LogicOpcode = i915LogicOp;
 999    functions->PointSize = i915PointSize;
1000    functions->PolygonStipple = i915PolygonStipple;
1001    functions->Scissor = i915Scissor;
1002    functions->ShadeModel = i915ShadeModel;
1003    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1004    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1005    functions->StencilOpSeparate = i915StencilOpSeparate;
1006 }
1007
1008
1009 void
1010 i915InitState(struct i915_context *i915)
1011 {
1012    GLcontext *ctx = &i915->intel.ctx;
1013
1014    i915_init_packets(i915);
1015
1016    intelInitState(ctx);
1017
1018    memcpy(&i915->initial, &i915->state, sizeof(i915->state));
1019    i915->current = &i915->state;
1020 }