src/mesa/drivers/dri/i915tex/i915_state.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "glheader.h"
  30 #include "context.h"
  31 #include "macros.h"
  32 #include "enums.h"
  33 #include "dd.h"
  34 #include "tnl/tnl.h"
  35 #include "tnl/t_context.h"
  36
  37 #include "texmem.h"
  38
  39 #include "intel_fbo.h"
  40 #include "intel_screen.h"
  41 #include "intel_batchbuffer.h"
  42
  43 #include "i915_context.h"
  44 #include "i915_reg.h"
  45
  46 #define FILE_DEBUG_FLAG DEBUG_STATE
  47
  48 static void
  49 i915StencilFuncSeparate(GLcontext * ctx, GLenum face, GLenum func, GLint ref,
  50                         GLuint mask)
  51 {
  52    struct i915_context *i915 = I915_CONTEXT(ctx);
  53    int test = intel_translate_compare_func(func);
  54
  55    mask = mask & 0xff;
  56
  57    DBG("%s : func: %s, ref : 0x%x, mask: 0x%x\n", __FUNCTION__,
  58        _mesa_lookup_enum_by_nr(func), ref, mask);
  59
  60
  61    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  62    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
  63    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
  64                                            STENCIL_TEST_MASK(mask));
  65
  66    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_REF_MASK |
  67                                           S5_STENCIL_TEST_FUNC_MASK);
  68
  69    i915->state.Ctx[I915_CTXREG_LIS5] |= ((ref << S5_STENCIL_REF_SHIFT) |
  70                                          (test <<
  71                                           S5_STENCIL_TEST_FUNC_SHIFT));
  72 }
  73
  74 static void
  75 i915StencilMaskSeparate(GLcontext * ctx, GLenum face, GLuint mask)
  76 {
  77    struct i915_context *i915 = I915_CONTEXT(ctx);
  78
  79    DBG("%s : mask 0x%x\n", __FUNCTION__, mask);
  80
  81    mask = mask & 0xff;
  82
  83    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
  84    i915->state.Ctx[I915_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
  85    i915->state.Ctx[I915_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
  86                                            STENCIL_WRITE_MASK(mask));
  87 }
  88
  89
  90 static void
  91 i915StencilOpSeparate(GLcontext * ctx, GLenum face, GLenum fail, GLenum zfail,
  92                       GLenum zpass)
  93 {
  94    struct i915_context *i915 = I915_CONTEXT(ctx);
  95    int fop = intel_translate_stencil_op(fail);
  96    int dfop = intel_translate_stencil_op(zfail);
  97    int dpop = intel_translate_stencil_op(zpass);
  98
  99
 100    DBG("%s: fail : %s, zfail: %s, zpass : %s\n", __FUNCTION__,
 101        _mesa_lookup_enum_by_nr(fail),
 102        _mesa_lookup_enum_by_nr(zfail), _mesa_lookup_enum_by_nr(zpass));
 103
 104    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 105
 106    i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_FAIL_MASK |
 107                                           S5_STENCIL_PASS_Z_FAIL_MASK |
 108                                           S5_STENCIL_PASS_Z_PASS_MASK);
 109
 110    i915->state.Ctx[I915_CTXREG_LIS5] |= ((fop << S5_STENCIL_FAIL_SHIFT) |
 111                                          (dfop <<
 112                                           S5_STENCIL_PASS_Z_FAIL_SHIFT) |
 113                                          (dpop <<
 114                                           S5_STENCIL_PASS_Z_PASS_SHIFT));
 115 }
 116
 117 static void
 118 i915AlphaFunc(GLcontext * ctx, GLenum func, GLfloat ref)
 119 {
 120    struct i915_context *i915 = I915_CONTEXT(ctx);
 121    int test = intel_translate_compare_func(func);
 122    GLubyte refByte;
 123
 124    UNCLAMPED_FLOAT_TO_UBYTE(refByte, ref);
 125
 126    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 127    i915->state.Ctx[I915_CTXREG_LIS6] &= ~(S6_ALPHA_TEST_FUNC_MASK |
 128                                           S6_ALPHA_REF_MASK);
 129    i915->state.Ctx[I915_CTXREG_LIS6] |= ((test << S6_ALPHA_TEST_FUNC_SHIFT) |
 130                                          (((GLuint) refByte) <<
 131                                           S6_ALPHA_REF_SHIFT));
 132 }
 133
 134 /* This function makes sure that the proper enables are
 135  * set for LogicOp, Independant Alpha Blend, and Blending.
 136  * It needs to be called from numerous places where we
 137  * could change the LogicOp or Independant Alpha Blend without subsequent
 138  * calls to glEnable.
 139  */
 140 static void
 141 i915EvalLogicOpBlendState(GLcontext * ctx)
 142 {
 143    struct i915_context *i915 = I915_CONTEXT(ctx);
 144
 145    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 146
 147    if (ctx->Color._LogicOpEnabled) {
 148       i915->state.Ctx[I915_CTXREG_LIS5] |= S5_LOGICOP_ENABLE;
 149       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 150    }
 151    else {
 152       i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_LOGICOP_ENABLE;
 153
 154       if (ctx->Color.BlendEnabled) {
 155          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_CBUF_BLEND_ENABLE;
 156       }
 157       else {
 158          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_CBUF_BLEND_ENABLE;
 159       }
 160    }
 161 }
 162
 163 static void
 164 i915BlendColor(GLcontext * ctx, const GLfloat color[4])
 165 {
 166    struct i915_context *i915 = I915_CONTEXT(ctx);
 167    GLubyte r, g, b, a;
 168
 169    DBG("%s\n", __FUNCTION__);
 170
 171    UNCLAMPED_FLOAT_TO_UBYTE(r, color[RCOMP]);
 172    UNCLAMPED_FLOAT_TO_UBYTE(g, color[GCOMP]);
 173    UNCLAMPED_FLOAT_TO_UBYTE(b, color[BCOMP]);
 174    UNCLAMPED_FLOAT_TO_UBYTE(a, color[ACOMP]);
 175
 176    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 177    i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] =
 178       (a << 24) | (r << 16) | (g << 8) | b;
 179 }
 180
 181
 182 #define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT)
 183 #define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT)
 184 #define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT)
 185 #define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT)
 186
 187
 188
 189 static GLuint
 190 translate_blend_equation(GLenum mode)
 191 {
 192    switch (mode) {
 193    case GL_FUNC_ADD:
 194       return BLENDFUNC_ADD;
 195    case GL_MIN:
 196       return BLENDFUNC_MIN;
 197    case GL_MAX:
 198       return BLENDFUNC_MAX;
 199    case GL_FUNC_SUBTRACT:
 200       return BLENDFUNC_SUBTRACT;
 201    case GL_FUNC_REVERSE_SUBTRACT:
 202       return BLENDFUNC_REVERSE_SUBTRACT;
 203    default:
 204       return 0;
 205    }
 206 }
 207
 208 static void
 209 i915UpdateBlendState(GLcontext * ctx)
 210 {
 211    struct i915_context *i915 = I915_CONTEXT(ctx);
 212    GLuint iab = (i915->state.Ctx[I915_CTXREG_IAB] &
 213                  ~(IAB_SRC_FACTOR_MASK |
 214                    IAB_DST_FACTOR_MASK |
 215                    (BLENDFUNC_MASK << IAB_FUNC_SHIFT) | IAB_ENABLE));
 216
 217    GLuint lis6 = (i915->state.Ctx[I915_CTXREG_LIS6] &
 218                   ~(S6_CBUF_SRC_BLEND_FACT_MASK |
 219                     S6_CBUF_DST_BLEND_FACT_MASK | S6_CBUF_BLEND_FUNC_MASK));
 220
 221    GLuint eqRGB = ctx->Color.BlendEquationRGB;
 222    GLuint eqA = ctx->Color.BlendEquationA;
 223    GLuint srcRGB = ctx->Color.BlendSrcRGB;
 224    GLuint dstRGB = ctx->Color.BlendDstRGB;
 225    GLuint srcA = ctx->Color.BlendSrcA;
 226    GLuint dstA = ctx->Color.BlendDstA;
 227
 228    if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 229       srcRGB = dstRGB = GL_ONE;
 230    }
 231
 232    if (eqA == GL_MIN || eqA == GL_MAX) {
 233       srcA = dstA = GL_ONE;
 234    }
 235
 236    lis6 |= SRC_BLND_FACT(intel_translate_blend_factor(srcRGB));
 237    lis6 |= DST_BLND_FACT(intel_translate_blend_factor(dstRGB));
 238    lis6 |= translate_blend_equation(eqRGB) << S6_CBUF_BLEND_FUNC_SHIFT;
 239
 240    iab |= SRC_ABLND_FACT(intel_translate_blend_factor(srcA));
 241    iab |= DST_ABLND_FACT(intel_translate_blend_factor(dstA));
 242    iab |= translate_blend_equation(eqA) << IAB_FUNC_SHIFT;
 243
 244    if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB)
 245       iab |= IAB_ENABLE;
 246
 247    if (iab != i915->state.Ctx[I915_CTXREG_IAB] ||
 248        lis6 != i915->state.Ctx[I915_CTXREG_LIS6]) {
 249       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 250       i915->state.Ctx[I915_CTXREG_IAB] = iab;
 251       i915->state.Ctx[I915_CTXREG_LIS6] = lis6;
 252    }
 253
 254    /* This will catch a logicop blend equation */
 255    i915EvalLogicOpBlendState(ctx);
 256 }
 257
 258
 259 static void
 260 i915BlendFuncSeparate(GLcontext * ctx, GLenum srcRGB,
 261                       GLenum dstRGB, GLenum srcA, GLenum dstA)
 262 {
 263    i915UpdateBlendState(ctx);
 264 }
 265
 266
 267 static void
 268 i915BlendEquationSeparate(GLcontext * ctx, GLenum eqRGB, GLenum eqA)
 269 {
 270    i915UpdateBlendState(ctx);
 271 }
 272
 273
 274 static void
 275 i915DepthFunc(GLcontext * ctx, GLenum func)
 276 {
 277    struct i915_context *i915 = I915_CONTEXT(ctx);
 278    int test = intel_translate_compare_func(func);
 279
 280    DBG("%s\n", __FUNCTION__);
 281
 282    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 283    i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_FUNC_MASK;
 284    i915->state.Ctx[I915_CTXREG_LIS6] |= test << S6_DEPTH_TEST_FUNC_SHIFT;
 285 }
 286
 287 static void
 288 i915DepthMask(GLcontext * ctx, GLboolean flag)
 289 {
 290    struct i915_context *i915 = I915_CONTEXT(ctx);
 291
 292    DBG("%s flag (%d)\n", __FUNCTION__, flag);
 293
 294    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 295
 296    if (flag && ctx->Depth.Test)
 297       i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_WRITE_ENABLE;
 298    else
 299       i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_WRITE_ENABLE;
 300 }
 301
 302 /* =============================================================
 303  * Polygon stipple
 304  *
 305  * The i915 supports a 4x4 stipple natively, GL wants 32x32.
 306  * Fortunately stipple is usually a repeating pattern.
 307  */
 308 static void
 309 i915PolygonStipple(GLcontext * ctx, const GLubyte * mask)
 310 {
 311    struct i915_context *i915 = I915_CONTEXT(ctx);
 312    const GLubyte *m = mask;
 313    GLubyte p[4];
 314    int i, j, k;
 315    int active = (ctx->Polygon.StippleFlag &&
 316                  i915->intel.reduced_primitive == GL_TRIANGLES);
 317    GLuint newMask;
 318
 319    if (active) {
 320       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 321       i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 322    }
 323
 324    p[0] = mask[12] & 0xf;
 325    p[0] |= p[0] << 4;
 326    p[1] = mask[8] & 0xf;
 327    p[1] |= p[1] << 4;
 328    p[2] = mask[4] & 0xf;
 329    p[2] |= p[2] << 4;
 330    p[3] = mask[0] & 0xf;
 331    p[3] |= p[3] << 4;
 332
 333    for (k = 0; k < 8; k++)
 334       for (j = 3; j >= 0; j--)
 335          for (i = 0; i < 4; i++, m++)
 336             if (*m != p[j]) {
 337                i915->intel.hw_stipple = 0;
 338                return;
 339             }
 340
 341    newMask = (((p[0] & 0xf) << 0) |
 342               ((p[1] & 0xf) << 4) |
 343               ((p[2] & 0xf) << 8) | ((p[3] & 0xf) << 12));
 344
 345
 346    if (newMask == 0xffff || newMask == 0x0) {
 347       /* this is needed to make conform pass */
 348       i915->intel.hw_stipple = 0;
 349       return;
 350    }
 351
 352    i915->state.Stipple[I915_STPREG_ST1] &= ~0xffff;
 353    i915->state.Stipple[I915_STPREG_ST1] |= newMask;
 354    i915->intel.hw_stipple = 1;
 355
 356    if (active)
 357       i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 358 }
 359
 360
 361 /* =============================================================
 362  * Hardware clipping
 363  */
 364 static void
 365 i915Scissor(GLcontext * ctx, GLint x, GLint y, GLsizei w, GLsizei h)
 366 {
 367    struct i915_context *i915 = I915_CONTEXT(ctx);
 368    int x1, y1, x2, y2;
 369
 370    if (!ctx->DrawBuffer)
 371       return;
 372
 373    DBG("%s %d,%d %dx%d\n", __FUNCTION__, x, y, w, h);
 374
 375    if (ctx->DrawBuffer->Name == 0) {
 376       x1 = x;
 377       y1 = ctx->DrawBuffer->Height - (y + h);
 378       x2 = x + w - 1;
 379       y2 = y1 + h - 1;
 380       DBG("%s %d..%d,%d..%d (inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 381    }
 382    else {
 383       /* FBO - not inverted
 384        */
 385       x1 = x;
 386       y1 = y;
 387       x2 = x + w - 1;
 388       y2 = y + h - 1;
 389       DBG("%s %d..%d,%d..%d (not inverted)\n", __FUNCTION__, x1, x2, y1, y2);
 390    }
 391
 392    x1 = CLAMP(x1, 0, ctx->DrawBuffer->Width - 1);
 393    y1 = CLAMP(y1, 0, ctx->DrawBuffer->Height - 1);
 394    x2 = CLAMP(x2, 0, ctx->DrawBuffer->Width - 1);
 395    y2 = CLAMP(y2, 0, ctx->DrawBuffer->Height - 1);
 396
 397    DBG("%s %d..%d,%d..%d (clamped)\n", __FUNCTION__, x1, x2, y1, y2);
 398
 399    I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 400    i915->state.Buffer[I915_DESTREG_SR1] = (y1 << 16) | (x1 & 0xffff);
 401    i915->state.Buffer[I915_DESTREG_SR2] = (y2 << 16) | (x2 & 0xffff);
 402 }
 403
 404 static void
 405 i915LogicOp(GLcontext * ctx, GLenum opcode)
 406 {
 407    struct i915_context *i915 = I915_CONTEXT(ctx);
 408    int tmp = intel_translate_logic_op(opcode);
 409
 410    DBG("%s\n", __FUNCTION__);
 411
 412    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 413    i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
 414    i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
 415 }
 416
 417
 418
 419 static void
 420 i915CullFaceFrontFace(GLcontext * ctx, GLenum unused)
 421 {
 422    struct i915_context *i915 = I915_CONTEXT(ctx);
 423    GLuint mode;
 424
 425    DBG("%s %d\n", __FUNCTION__,
 426        ctx->DrawBuffer ? ctx->DrawBuffer->Name : 0);
 427
 428    if (!ctx->Polygon.CullFlag) {
 429       mode = S4_CULLMODE_NONE;
 430    }
 431    else if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) {
 432       mode = S4_CULLMODE_CW;
 433
 434       if (ctx->DrawBuffer && ctx->DrawBuffer->Name != 0)
 435          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 436       if (ctx->Polygon.CullFaceMode == GL_FRONT)
 437          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 438       if (ctx->Polygon.FrontFace != GL_CCW)
 439          mode ^= (S4_CULLMODE_CW ^ S4_CULLMODE_CCW);
 440    }
 441    else {
 442       mode = S4_CULLMODE_BOTH;
 443    }
 444
 445    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 446    i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_CULLMODE_MASK;
 447    i915->state.Ctx[I915_CTXREG_LIS4] |= mode;
 448 }
 449
 450 static void
 451 i915LineWidth(GLcontext * ctx, GLfloat widthf)
 452 {
 453    struct i915_context *i915 = I915_CONTEXT(ctx);
 454    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_LINE_WIDTH_MASK;
 455    int width;
 456
 457    DBG("%s\n", __FUNCTION__);
 458
 459    width = (int) (widthf * 2);
 460    CLAMP_SELF(width, 1, 0xf);
 461    lis4 |= width << S4_LINE_WIDTH_SHIFT;
 462
 463    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 464       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 465       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 466    }
 467 }
 468
 469 static void
 470 i915PointSize(GLcontext * ctx, GLfloat size)
 471 {
 472    struct i915_context *i915 = I915_CONTEXT(ctx);
 473    int lis4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_POINT_WIDTH_MASK;
 474    GLint point_size = (int) size;
 475
 476    DBG("%s\n", __FUNCTION__);
 477
 478    CLAMP_SELF(point_size, 1, 255);
 479    lis4 |= point_size << S4_POINT_WIDTH_SHIFT;
 480
 481    if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
 482       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 483       i915->state.Ctx[I915_CTXREG_LIS4] = lis4;
 484    }
 485 }
 486
 487
 488 /* =============================================================
 489  * Color masks
 490  */
 491
 492 static void
 493 i915ColorMask(GLcontext * ctx,
 494               GLboolean r, GLboolean g, GLboolean b, GLboolean a)
 495 {
 496    struct i915_context *i915 = I915_CONTEXT(ctx);
 497    GLuint tmp = i915->state.Ctx[I915_CTXREG_LIS5] & ~S5_WRITEDISABLE_MASK;
 498
 499    DBG("%s r(%d) g(%d) b(%d) a(%d)\n", __FUNCTION__, r, g, b,
 500        a);
 501
 502    if (!r)
 503       tmp |= S5_WRITEDISABLE_RED;
 504    if (!g)
 505       tmp |= S5_WRITEDISABLE_GREEN;
 506    if (!b)
 507       tmp |= S5_WRITEDISABLE_BLUE;
 508    if (!a)
 509       tmp |= S5_WRITEDISABLE_ALPHA;
 510
 511    if (tmp != i915->state.Ctx[I915_CTXREG_LIS5]) {
 512       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 513       i915->state.Ctx[I915_CTXREG_LIS5] = tmp;
 514    }
 515 }
 516
 517 static void
 518 update_specular(GLcontext * ctx)
 519 {
 520    /* A hack to trigger the rebuild of the fragment program.
 521     */
 522    intel_context(ctx)->NewGLState |= _NEW_TEXTURE;
 523    I915_CONTEXT(ctx)->tex_program.translated = 0;
 524 }
 525
 526 static void
 527 i915LightModelfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 528 {
 529    DBG("%s\n", __FUNCTION__);
 530
 531    if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) {
 532       update_specular(ctx);
 533    }
 534 }
 535
 536 static void
 537 i915ShadeModel(GLcontext * ctx, GLenum mode)
 538 {
 539    struct i915_context *i915 = I915_CONTEXT(ctx);
 540    I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 541
 542    if (mode == GL_SMOOTH) {
 543       i915->state.Ctx[I915_CTXREG_LIS4] &= ~(S4_FLATSHADE_ALPHA |
 544                                              S4_FLATSHADE_COLOR |
 545                                              S4_FLATSHADE_SPECULAR);
 546    }
 547    else {
 548       i915->state.Ctx[I915_CTXREG_LIS4] |= (S4_FLATSHADE_ALPHA |
 549                                             S4_FLATSHADE_COLOR |
 550                                             S4_FLATSHADE_SPECULAR);
 551    }
 552 }
 553
 554 /* =============================================================
 555  * Fog
 556  */
 557 void
 558 i915_update_fog(GLcontext * ctx)
 559 {
 560    struct i915_context *i915 = I915_CONTEXT(ctx);
 561    GLenum mode;
 562    GLboolean enabled;
 563    GLboolean try_pixel_fog;
 564
 565    if (ctx->FragmentProgram._Active) {
 566       /* Pull in static fog state from program */
 567
 568       mode = ctx->FragmentProgram._Current->FogOption;
 569       enabled = (mode != GL_NONE);
 570       try_pixel_fog = 0;
 571    }
 572    else {
 573       enabled = ctx->Fog.Enabled;
 574       mode = ctx->Fog.Mode;
 575
 576       try_pixel_fog = (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH_EXT && ctx->Hint.Fog == GL_NICEST && 0);       /* XXX - DISABLE -- Need ortho fallback */
 577    }
 578
 579    if (!enabled) {
 580       i915->vertex_fog = I915_FOG_NONE;
 581    }
 582    else if (try_pixel_fog) {
 583
 584       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 585       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 586       i915->vertex_fog = I915_FOG_PIXEL;
 587
 588       switch (mode) {
 589       case GL_LINEAR:
 590          if (ctx->Fog.End <= ctx->Fog.Start) {
 591             /* XXX - this won't work with fragment programs.  Need to
 592              * either fallback or append fog instructions to end of
 593              * program in the case of linear fog.
 594              */
 595             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 596             i915->vertex_fog = I915_FOG_VERTEX;
 597          }
 598          else {
 599             GLfloat c1 = ctx->Fog.End / (ctx->Fog.End - ctx->Fog.Start);
 600             GLfloat c2 = 1.0 / (ctx->Fog.End - ctx->Fog.Start);
 601
 602             i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_C1_MASK;
 603             i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_LINEAR;
 604             i915->state.Fog[I915_FOGREG_MODE1] |=
 605                ((GLuint) (c1 * FMC1_C1_ONE)) & FMC1_C1_MASK;
 606
 607             if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 608                i915->state.Fog[I915_FOGREG_MODE2] =
 609                   (GLuint) (c2 * FMC2_C2_ONE);
 610             }
 611             else {
 612                union
 613                {
 614                   float f;
 615                   int i;
 616                } fi;
 617                fi.f = c2;
 618                i915->state.Fog[I915_FOGREG_MODE2] = fi.i;
 619             }
 620          }
 621          break;
 622       case GL_EXP:
 623          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP;
 624          break;
 625       case GL_EXP2:
 626          i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_PIXEL_EXP2;
 627          break;
 628       default:
 629          break;
 630       }
 631    }
 632    else {                       /* if (i915->vertex_fog != I915_FOG_VERTEX) */
 633
 634       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 635       i915->state.Fog[I915_FOGREG_MODE1] &= ~FMC1_FOGFUNC_MASK;
 636       i915->state.Fog[I915_FOGREG_MODE1] |= FMC1_FOGFUNC_VERTEX;
 637       i915->vertex_fog = I915_FOG_VERTEX;
 638    }
 639
 640    {
 641       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 642       I915_ACTIVESTATE(i915, I915_UPLOAD_FOG, enabled);
 643       if (enabled)
 644          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_FOG_ENABLE;
 645       else
 646          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_FOG_ENABLE;
 647    }
 648
 649    if (enabled) {
 650       _tnl_allow_vertex_fog(ctx, (i915->vertex_fog == I915_FOG_VERTEX));
 651       _tnl_allow_pixel_fog(ctx, (i915->vertex_fog != I915_FOG_VERTEX));
 652    }
 653 }
 654
 655 static void
 656 i915Fogfv(GLcontext * ctx, GLenum pname, const GLfloat * param)
 657 {
 658    struct i915_context *i915 = I915_CONTEXT(ctx);
 659
 660    switch (pname) {
 661    case GL_FOG_COORDINATE_SOURCE_EXT:
 662    case GL_FOG_MODE:
 663    case GL_FOG_START:
 664    case GL_FOG_END:
 665       break;
 666
 667    case GL_FOG_DENSITY:
 668       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 669
 670       if (i915->state.Fog[I915_FOGREG_MODE1] & FMC1_FOGINDEX_Z) {
 671          i915->state.Fog[I915_FOGREG_MODE3] = (GLuint) (ctx->Fog.Density *
 672                                                         FMC3_D_ONE);
 673       }
 674       else {
 675          union
 676          {
 677             float f;
 678             int i;
 679          } fi;
 680          fi.f = ctx->Fog.Density;
 681          i915->state.Fog[I915_FOGREG_MODE3] = fi.i;
 682       }
 683       break;
 684
 685    case GL_FOG_COLOR:
 686       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 687       i915->state.Fog[I915_FOGREG_COLOR] =
 688          (_3DSTATE_FOG_COLOR_CMD |
 689           ((GLubyte) (ctx->Fog.Color[0] * 255.0F) << 16) |
 690           ((GLubyte) (ctx->Fog.Color[1] * 255.0F) << 8) |
 691           ((GLubyte) (ctx->Fog.Color[2] * 255.0F) << 0));
 692       break;
 693
 694    default:
 695       break;
 696    }
 697 }
 698
 699 static void
 700 i915Hint(GLcontext * ctx, GLenum target, GLenum state)
 701 {
 702    switch (target) {
 703    case GL_FOG_HINT:
 704       break;
 705    default:
 706       break;
 707    }
 708 }
 709
 710 /* =============================================================
 711  */
 712
 713 static void
 714 i915Enable(GLcontext * ctx, GLenum cap, GLboolean state)
 715 {
 716    struct i915_context *i915 = I915_CONTEXT(ctx);
 717
 718    switch (cap) {
 719    case GL_TEXTURE_2D:
 720       break;
 721
 722    case GL_LIGHTING:
 723    case GL_COLOR_SUM:
 724       update_specular(ctx);
 725       break;
 726
 727    case GL_ALPHA_TEST:
 728       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 729       if (state)
 730          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_ALPHA_TEST_ENABLE;
 731       else
 732          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_ALPHA_TEST_ENABLE;
 733       break;
 734
 735    case GL_BLEND:
 736       i915EvalLogicOpBlendState(ctx);
 737       break;
 738
 739    case GL_COLOR_LOGIC_OP:
 740       i915EvalLogicOpBlendState(ctx);
 741
 742       /* Logicop doesn't seem to work at 16bpp:
 743        */
 744       if (i915->intel.intelScreen->cpp == 2)    /* XXX FBO fix */
 745          FALLBACK(&i915->intel, I915_FALLBACK_LOGICOP, state);
 746       break;
 747
 748    case GL_FRAGMENT_PROGRAM_ARB:
 749       break;
 750
 751    case GL_DITHER:
 752       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 753       if (state)
 754          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 755       else
 756          i915->state.Ctx[I915_CTXREG_LIS5] &= ~S5_COLOR_DITHER_ENABLE;
 757       break;
 758
 759    case GL_DEPTH_TEST:
 760       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 761       if (state)
 762          i915->state.Ctx[I915_CTXREG_LIS6] |= S6_DEPTH_TEST_ENABLE;
 763       else
 764          i915->state.Ctx[I915_CTXREG_LIS6] &= ~S6_DEPTH_TEST_ENABLE;
 765
 766       i915DepthMask(ctx, ctx->Depth.Mask);
 767       break;
 768
 769    case GL_SCISSOR_TEST:
 770       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 771       if (state)
 772          i915->state.Buffer[I915_DESTREG_SENABLE] =
 773             (_3DSTATE_SCISSOR_ENABLE_CMD | ENABLE_SCISSOR_RECT);
 774       else
 775          i915->state.Buffer[I915_DESTREG_SENABLE] =
 776             (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 777       break;
 778
 779    case GL_LINE_SMOOTH:
 780       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 781       if (state)
 782          i915->state.Ctx[I915_CTXREG_LIS4] |= S4_LINE_ANTIALIAS_ENABLE;
 783       else
 784          i915->state.Ctx[I915_CTXREG_LIS4] &= ~S4_LINE_ANTIALIAS_ENABLE;
 785       break;
 786
 787    case GL_FOG:
 788       break;
 789
 790    case GL_CULL_FACE:
 791       i915CullFaceFrontFace(ctx, 0);
 792       break;
 793
 794    case GL_STENCIL_TEST:
 795       {
 796          GLboolean hw_stencil = GL_FALSE;
 797          if (ctx->DrawBuffer) {
 798             struct intel_renderbuffer *irbStencil
 799                = intel_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL);
 800             hw_stencil = (irbStencil && irbStencil->region);
 801          }
 802          if (hw_stencil) {
 803             I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 804             if (state)
 805                i915->state.Ctx[I915_CTXREG_LIS5] |= (S5_STENCIL_TEST_ENABLE |
 806                                                      S5_STENCIL_WRITE_ENABLE);
 807             else
 808                i915->state.Ctx[I915_CTXREG_LIS5] &= ~(S5_STENCIL_TEST_ENABLE |
 809                                                       S5_STENCIL_WRITE_ENABLE);
 810          }
 811          else {
 812             FALLBACK(&i915->intel, I915_FALLBACK_STENCIL, state);
 813          }
 814       }
 815       break;
 816
 817    case GL_POLYGON_STIPPLE:
 818       /* The stipple command worked on my 855GM box, but not my 845G.
 819        * I'll do more testing later to find out exactly which hardware
 820        * supports it.  Disabled for now.
 821        */
 822       if (i915->intel.hw_stipple &&
 823           i915->intel.reduced_primitive == GL_TRIANGLES) {
 824          I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 825          if (state)
 826             i915->state.Stipple[I915_STPREG_ST1] |= ST1_ENABLE;
 827          else
 828             i915->state.Stipple[I915_STPREG_ST1] &= ~ST1_ENABLE;
 829       }
 830       break;
 831
 832    case GL_POLYGON_SMOOTH:
 833       break;
 834
 835    case GL_POINT_SMOOTH:
 836       break;
 837
 838    default:
 839       ;
 840    }
 841 }
 842
 843
 844 static void
 845 i915_init_packets(struct i915_context *i915)
 846 {
 847    intelScreenPrivate *screen = i915->intel.intelScreen;
 848
 849    /* Zero all state */
 850    memset(&i915->state, 0, sizeof(i915->state));
 851
 852
 853    {
 854       I915_STATECHANGE(i915, I915_UPLOAD_CTX);
 855       /* Probably don't want to upload all this stuff every time one
 856        * piece changes.
 857        */
 858       i915->state.Ctx[I915_CTXREG_LI] = (_3DSTATE_LOAD_STATE_IMMEDIATE_1 |
 859                                          I1_LOAD_S(2) |
 860                                          I1_LOAD_S(4) |
 861                                          I1_LOAD_S(5) | I1_LOAD_S(6) | (4));
 862       i915->state.Ctx[I915_CTXREG_LIS2] = 0;
 863       i915->state.Ctx[I915_CTXREG_LIS4] = 0;
 864       i915->state.Ctx[I915_CTXREG_LIS5] = 0;
 865
 866       if (screen->cpp == 2)     /* XXX FBO fix */
 867          i915->state.Ctx[I915_CTXREG_LIS5] |= S5_COLOR_DITHER_ENABLE;
 868
 869
 870       i915->state.Ctx[I915_CTXREG_LIS6] = (S6_COLOR_WRITE_ENABLE |
 871                                            (2 << S6_TRISTRIP_PV_SHIFT));
 872
 873       i915->state.Ctx[I915_CTXREG_STATE4] = (_3DSTATE_MODES_4_CMD |
 874                                              ENABLE_LOGIC_OP_FUNC |
 875                                              LOGIC_OP_FUNC(LOGICOP_COPY) |
 876                                              ENABLE_STENCIL_TEST_MASK |
 877                                              STENCIL_TEST_MASK(0xff) |
 878                                              ENABLE_STENCIL_WRITE_MASK |
 879                                              STENCIL_WRITE_MASK(0xff));
 880
 881       i915->state.Ctx[I915_CTXREG_IAB] =
 882          (_3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD | IAB_MODIFY_ENABLE |
 883           IAB_MODIFY_FUNC | IAB_MODIFY_SRC_FACTOR | IAB_MODIFY_DST_FACTOR);
 884
 885       i915->state.Ctx[I915_CTXREG_BLENDCOLOR0] =
 886          _3DSTATE_CONST_BLEND_COLOR_CMD;
 887       i915->state.Ctx[I915_CTXREG_BLENDCOLOR1] = 0;
 888
 889    }
 890
 891    {
 892       I915_STATECHANGE(i915, I915_UPLOAD_STIPPLE);
 893       i915->state.Stipple[I915_STPREG_ST0] = _3DSTATE_STIPPLE;
 894    }
 895
 896
 897    {
 898       I915_STATECHANGE(i915, I915_UPLOAD_FOG);
 899       i915->state.Fog[I915_FOGREG_MODE0] = _3DSTATE_FOG_MODE_CMD;
 900       i915->state.Fog[I915_FOGREG_MODE1] = (FMC1_FOGFUNC_MODIFY_ENABLE |
 901                                             FMC1_FOGFUNC_VERTEX |
 902                                             FMC1_FOGINDEX_MODIFY_ENABLE |
 903                                             FMC1_FOGINDEX_W |
 904                                             FMC1_C1_C2_MODIFY_ENABLE |
 905                                             FMC1_DENSITY_MODIFY_ENABLE);
 906       i915->state.Fog[I915_FOGREG_COLOR] = _3DSTATE_FOG_COLOR_CMD;
 907    }
 908
 909
 910    {
 911       I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS);
 912       /* color buffer offset/stride */
 913       i915->state.Buffer[I915_DESTREG_CBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
 914       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 915       i915->state.Buffer[I915_DESTREG_CBUFADDR1] = (BUF_3D_ID_COLOR_BACK | BUF_3D_PITCH(screen->front.pitch) |  /* pitch in bytes */
 916                                                     BUF_3D_USE_FENCE);
 917
 918       i915->state.Buffer[I915_DESTREG_DBUFADDR0] = _3DSTATE_BUF_INFO_CMD;
 919       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 920       i915->state.Buffer[I915_DESTREG_DBUFADDR1] = (BUF_3D_ID_DEPTH | BUF_3D_PITCH(screen->depth.pitch) |       /* pitch in bytes */
 921                                                     BUF_3D_USE_FENCE);
 922
 923       i915->state.Buffer[I915_DESTREG_DV0] = _3DSTATE_DST_BUF_VARS_CMD;
 924
 925       /* XXX FBO: remove this?  Also get set in i915_set_draw_region() */
 926 #if 0                           /* seems we don't need this */
 927       switch (screen->fbFormat) {
 928       case DV_PF_565:
 929          i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |        /* .5 */
 930                                                  DSTORG_VERT_BIAS(0x8) |        /* .5 */
 931                                                  LOD_PRECLAMP_OGL |
 932                                                  TEX_DEFAULT_COLOR_OGL |
 933                                                  DITHER_FULL_ALWAYS |
 934                                                  screen->fbFormat |
 935                                                  DEPTH_FRMT_16_FIXED);
 936          break;
 937       case DV_PF_8888:
 938          i915->state.Buffer[I915_DESTREG_DV1] = (DSTORG_HORT_BIAS(0x8) |        /* .5 */
 939                                                  DSTORG_VERT_BIAS(0x8) |        /* .5 */
 940                                                  LOD_PRECLAMP_OGL |
 941                                                  TEX_DEFAULT_COLOR_OGL |
 942                                                  screen->fbFormat |
 943                                                  DEPTH_FRMT_24_FIXED_8_OTHER);
 944          break;
 945       }
 946 #endif
 947
 948
 949       /* scissor */
 950       i915->state.Buffer[I915_DESTREG_SENABLE] =
 951          (_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT);
 952       i915->state.Buffer[I915_DESTREG_SR0] = _3DSTATE_SCISSOR_RECT_0_CMD;
 953       i915->state.Buffer[I915_DESTREG_SR1] = 0;
 954       i915->state.Buffer[I915_DESTREG_SR2] = 0;
 955    }
 956
 957
 958 #if 0
 959    {
 960       I915_STATECHANGE(i915, I915_UPLOAD_DEFAULTS);
 961       i915->state.Default[I915_DEFREG_C0] = _3DSTATE_DEFAULT_DIFFUSE;
 962       i915->state.Default[I915_DEFREG_C1] = 0;
 963       i915->state.Default[I915_DEFREG_S0] = _3DSTATE_DEFAULT_SPECULAR;
 964       i915->state.Default[I915_DEFREG_S1] = 0;
 965       i915->state.Default[I915_DEFREG_Z0] = _3DSTATE_DEFAULT_Z;
 966       i915->state.Default[I915_DEFREG_Z1] = 0;
 967    }
 968 #endif
 969
 970
 971    /* These will be emitted every at the head of every buffer, unless
 972     * we get hardware contexts working.
 973     */
 974    i915->state.active = (I915_UPLOAD_PROGRAM |
 975                          I915_UPLOAD_STIPPLE |
 976                          I915_UPLOAD_CTX |
 977                          I915_UPLOAD_BUFFERS | I915_UPLOAD_INVARIENT);
 978 }
 979
 980 void
 981 i915InitStateFunctions(struct dd_function_table *functions)
 982 {
 983    functions->AlphaFunc = i915AlphaFunc;
 984    functions->BlendColor = i915BlendColor;
 985    functions->BlendEquationSeparate = i915BlendEquationSeparate;
 986    functions->BlendFuncSeparate = i915BlendFuncSeparate;
 987    functions->ColorMask = i915ColorMask;
 988    functions->CullFace = i915CullFaceFrontFace;
 989    functions->DepthFunc = i915DepthFunc;
 990    functions->DepthMask = i915DepthMask;
 991    functions->Enable = i915Enable;
 992    functions->Fogfv = i915Fogfv;
 993    functions->FrontFace = i915CullFaceFrontFace;
 994    functions->Hint = i915Hint;
 995    functions->LightModelfv = i915LightModelfv;
 996    functions->LineWidth = i915LineWidth;
 997    functions->LogicOpcode = i915LogicOp;
 998    functions->PointSize = i915PointSize;
 999    functions->PolygonStipple = i915PolygonStipple;
1000    functions->Scissor = i915Scissor;
1001    functions->ShadeModel = i915ShadeModel;
1002    functions->StencilFuncSeparate = i915StencilFuncSeparate;
1003    functions->StencilMaskSeparate = i915StencilMaskSeparate;
1004    functions->StencilOpSeparate = i915StencilOpSeparate;
1005 }
1006
1007
1008 void
1009 i915InitState(struct i915_context *i915)
1010 {
1011    GLcontext *ctx = &i915->intel.ctx;
1012
1013    i915_init_packets(i915);
1014
1015    intelInitState(ctx);
1016
1017    memcpy(&i915->initial, &i915->state, sizeof(i915->state));
1018    i915->current = &i915->state;
1019 }