Merge branch 'i915tex_privbuffers' into softpipe_0_1_branch
[mesa.git] / src / mesa / drivers / dri / i915tex / intel_buffers.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "intel_screen.h"
29 #include "intel_context.h"
30 #include "intel_blit.h"
31 #include "intel_buffers.h"
32 #include "intel_depthstencil.h"
33 #include "intel_fbo.h"
34 #include "intel_tris.h"
35 #include "intel_regions.h"
36 #include "intel_batchbuffer.h"
37 #include "intel_reg.h"
38 #include "context.h"
39 #include "utils.h"
40 #include "drirenderbuffer.h"
41 #include "framebuffer.h"
42 #include "swrast/swrast.h"
43 #include "vblank.h"
44
45
46 /* This block can be removed when libdrm >= 2.3.1 is required */
47
48 #ifndef DRM_VBLANK_FLIP
49
50 #define DRM_VBLANK_FLIP 0x8000000
51
52 typedef struct drm_i915_flip {
53 int pipes;
54 } drm_i915_flip_t;
55
56 #undef DRM_IOCTL_I915_FLIP
57 #define DRM_IOCTL_I915_FLIP DRM_IOW(DRM_COMMAND_BASE + DRM_I915_FLIP, \
58 drm_i915_flip_t)
59
60 #endif
61
62
63 /**
64 * XXX move this into a new dri/common/cliprects.c file.
65 */
66 GLboolean
67 intel_intersect_cliprects(drm_clip_rect_t * dst,
68 const drm_clip_rect_t * a,
69 const drm_clip_rect_t * b)
70 {
71 GLint bx = b->x1;
72 GLint by = b->y1;
73 GLint bw = b->x2 - bx;
74 GLint bh = b->y2 - by;
75
76 if (bx < a->x1)
77 bw -= a->x1 - bx, bx = a->x1;
78 if (by < a->y1)
79 bh -= a->y1 - by, by = a->y1;
80 if (bx + bw > a->x2)
81 bw = a->x2 - bx;
82 if (by + bh > a->y2)
83 bh = a->y2 - by;
84 if (bw <= 0)
85 return GL_FALSE;
86 if (bh <= 0)
87 return GL_FALSE;
88
89 dst->x1 = bx;
90 dst->y1 = by;
91 dst->x2 = bx + bw;
92 dst->y2 = by + bh;
93
94 return GL_TRUE;
95 }
96
97 /**
98 * Return pointer to current color drawing region, or NULL.
99 */
100 struct intel_region *
101 intel_drawbuf_region(struct intel_context *intel)
102 {
103 struct intel_renderbuffer *irbColor =
104 intel_renderbuffer(intel->ctx.DrawBuffer->_ColorDrawBuffers[0][0]);
105 if (irbColor)
106 return irbColor->region;
107 else
108 return NULL;
109 }
110
111 /**
112 * Return pointer to current color reading region, or NULL.
113 */
114 struct intel_region *
115 intel_readbuf_region(struct intel_context *intel)
116 {
117 struct intel_renderbuffer *irb
118 = intel_renderbuffer(intel->ctx.ReadBuffer->_ColorReadBuffer);
119 if (irb)
120 return irb->region;
121 else
122 return NULL;
123 }
124
125
126
127 /**
128 * Update the following fields for rendering:
129 * intel->numClipRects
130 * intel->pClipRects
131 */
132 static void
133 intelSetRenderbufferClipRects(struct intel_context *intel)
134 {
135 /* zero-sized buffers might be legal? */
136 assert(intel->ctx.DrawBuffer->Width > 0);
137 assert(intel->ctx.DrawBuffer->Height > 0);
138 intel->fboRect.x1 = 0;
139 intel->fboRect.y1 = 0;
140 intel->fboRect.x2 = intel->ctx.DrawBuffer->Width;
141 intel->fboRect.y2 = intel->ctx.DrawBuffer->Height;
142 intel->numClipRects = 1;
143 intel->pClipRects = &intel->fboRect;
144 }
145
146
147 /**
148 * This will be called whenever the currently bound window is moved/resized.
149 * XXX: actually, it seems to NOT be called when the window is only moved (BP).
150 */
151 void
152 intelWindowMoved(struct intel_context *intel)
153 {
154 GLcontext *ctx = &intel->ctx;
155 __DRIdrawablePrivate *dPriv = intel->driDrawable;
156 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
157
158 if (!intel->ctx.DrawBuffer) {
159 /* when would this happen? -BP */
160 assert(0);
161 intel->numClipRects = 0;
162 }
163
164 /* Update Mesa's notion of window size */
165 driUpdateFramebufferSize(ctx, dPriv);
166 intel_fb->Base.Initialized = GL_TRUE; /* XXX remove someday */
167
168 {
169 drmI830Sarea *sarea = intel->sarea;
170 drm_clip_rect_t drw_rect = { .x1 = dPriv->x, .x2 = dPriv->x + dPriv->w,
171 .y1 = dPriv->y, .y2 = dPriv->y + dPriv->h };
172 drm_clip_rect_t pipeA_rect = { .x1 = sarea->pipeA_x, .y1 = sarea->pipeA_y,
173 .x2 = sarea->pipeA_x + sarea->pipeA_w,
174 .y2 = sarea->pipeA_y + sarea->pipeA_h };
175 drm_clip_rect_t pipeB_rect = { .x1 = sarea->pipeB_x, .y1 = sarea->pipeB_y,
176 .x2 = sarea->pipeB_x + sarea->pipeB_w,
177 .y2 = sarea->pipeB_y + sarea->pipeB_h };
178 GLint areaA = driIntersectArea( drw_rect, pipeA_rect );
179 GLint areaB = driIntersectArea( drw_rect, pipeB_rect );
180 GLuint flags = intel_fb->vblank_flags;
181 GLboolean pf_active;
182 GLint pf_pipes;
183
184 /* Update page flipping info
185 */
186 pf_pipes = 0;
187
188 if (areaA > 0)
189 pf_pipes |= 1;
190
191 if (areaB > 0)
192 pf_pipes |= 2;
193
194 intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
195 (intel_fb->pf_pipes & 0x2)) & 0x3;
196
197 intel_fb->pf_num_pages = 2 /*intel->intelScreen->third.handle ? 3 : 2*/;
198
199 pf_active = pf_pipes && (pf_pipes & intel->sarea->pf_active) == pf_pipes;
200
201 if (INTEL_DEBUG & DEBUG_LOCK)
202 if (pf_active != intel_fb->pf_active)
203 _mesa_printf("%s - Page flipping %sactive\n", __progname,
204 pf_active ? "" : "in");
205
206 if (pf_active) {
207 /* Sync pages between pipes if we're flipping on both at the same time */
208 if (pf_pipes == 0x3 && pf_pipes != intel_fb->pf_pipes &&
209 (intel->sarea->pf_current_page & 0x3) !=
210 (((intel->sarea->pf_current_page) >> 2) & 0x3)) {
211 drm_i915_flip_t flip;
212
213 if (intel_fb->pf_current_page ==
214 (intel->sarea->pf_current_page & 0x3)) {
215 /* XXX: This is ugly, but emitting two flips 'in a row' can cause
216 * lockups for unknown reasons.
217 */
218 intel->sarea->pf_current_page =
219 intel->sarea->pf_current_page & 0x3;
220 intel->sarea->pf_current_page |=
221 ((intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
222 intel_fb->pf_num_pages) << 2;
223
224 flip.pipes = 0x2;
225 } else {
226 intel->sarea->pf_current_page =
227 intel->sarea->pf_current_page & (0x3 << 2);
228 intel->sarea->pf_current_page |=
229 (intel_fb->pf_current_page + intel_fb->pf_num_pages - 1) %
230 intel_fb->pf_num_pages;
231
232 flip.pipes = 0x1;
233 }
234
235 drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
236 }
237
238 intel_fb->pf_pipes = pf_pipes;
239 }
240
241 intel_fb->pf_active = pf_active;
242 intel_flip_renderbuffers(intel_fb);
243 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
244
245 /* Update vblank info
246 */
247 if (areaB > areaA || (areaA == areaB && areaB > 0)) {
248 flags = intel_fb->vblank_flags | VBLANK_FLAG_SECONDARY;
249 } else {
250 flags = intel_fb->vblank_flags & ~VBLANK_FLAG_SECONDARY;
251 }
252
253 if (flags != intel_fb->vblank_flags && intel_fb->vblank_flags &&
254 !(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ)) {
255 drmVBlank vbl;
256 int i;
257
258 vbl.request.type = DRM_VBLANK_ABSOLUTE;
259
260 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
261 vbl.request.type |= DRM_VBLANK_SECONDARY;
262 }
263
264 for (i = 0; i < intel_fb->pf_num_pages; i++) {
265 if (!intel_fb->color_rb[i] ||
266 (intel_fb->vbl_waited - intel_fb->color_rb[i]->vbl_pending) <=
267 (1<<23))
268 continue;
269
270 vbl.request.sequence = intel_fb->color_rb[i]->vbl_pending;
271 drmWaitVBlank(intel->driFd, &vbl);
272 }
273
274 intel_fb->vblank_flags = flags;
275 driGetCurrentVBlank(dPriv, intel_fb->vblank_flags, &intel_fb->vbl_seq);
276 intel_fb->vbl_waited = intel_fb->vbl_seq;
277
278 for (i = 0; i < intel_fb->pf_num_pages; i++) {
279 if (intel_fb->color_rb[i])
280 intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_waited;
281 }
282 }
283 }
284
285 /* Update hardware scissor */
286 ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
287 ctx->Scissor.Width, ctx->Scissor.Height);
288
289 /* Re-calculate viewport related state */
290 ctx->Driver.DepthRange( ctx, ctx->Viewport.Near, ctx->Viewport.Far );
291 }
292
293
294
295 /* A true meta version of this would be very simple and additionally
296 * machine independent. Maybe we'll get there one day.
297 */
298 static void
299 intelClearWithTris(struct intel_context *intel, GLbitfield mask)
300 {
301 GLcontext *ctx = &intel->ctx;
302 struct gl_framebuffer *fb = ctx->DrawBuffer;
303 drm_clip_rect_t clear;
304
305 if (INTEL_DEBUG & DEBUG_BLIT)
306 _mesa_printf("%s 0x%x\n", __FUNCTION__, mask);
307
308 LOCK_HARDWARE(intel);
309
310 if (intel->numClipRects) {
311 GLint cx, cy, cw, ch;
312 GLuint buf;
313
314 intel->vtbl.install_meta_state(intel);
315
316 /* Get clear bounds after locking */
317 cx = fb->_Xmin;
318 cy = fb->_Ymin;
319 ch = fb->_Ymax - cx;
320 cw = fb->_Xmax - cy;
321
322 /* note: regardless of 'all', cx, cy, cw, ch are now correct */
323 clear.x1 = cx;
324 clear.y1 = cy;
325 clear.x2 = cx + cw;
326 clear.y2 = cy + ch;
327
328 /* Back and stencil cliprects are the same. Try and do both
329 * buffers at once:
330 */
331 if (mask &
332 (BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH)) {
333 struct intel_region *backRegion =
334 intel_get_rb_region(fb, BUFFER_BACK_LEFT);
335 struct intel_region *depthRegion =
336 intel_get_rb_region(fb, BUFFER_DEPTH);
337 const GLuint clearColor = (backRegion && backRegion->cpp == 4)
338 ? intel->ClearColor8888 : intel->ClearColor565;
339
340 intel->vtbl.meta_draw_region(intel, backRegion, depthRegion);
341
342 if (mask & BUFFER_BIT_BACK_LEFT)
343 intel->vtbl.meta_color_mask(intel, GL_TRUE);
344 else
345 intel->vtbl.meta_color_mask(intel, GL_FALSE);
346
347 if (mask & BUFFER_BIT_STENCIL)
348 intel->vtbl.meta_stencil_replace(intel,
349 intel->ctx.Stencil.WriteMask[0],
350 intel->ctx.Stencil.Clear);
351 else
352 intel->vtbl.meta_no_stencil_write(intel);
353
354 if (mask & BUFFER_BIT_DEPTH)
355 intel->vtbl.meta_depth_replace(intel);
356 else
357 intel->vtbl.meta_no_depth_write(intel);
358
359 /* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
360 * drawing origin may not be correctly emitted.
361 */
362 intel_meta_draw_quad(intel, clear.x1, clear.x2, clear.y1, clear.y2,
363 intel->ctx.Depth.Clear, clearColor, 0, 0, 0, 0); /* texcoords */
364
365 mask &=
366 ~(BUFFER_BIT_BACK_LEFT | BUFFER_BIT_STENCIL | BUFFER_BIT_DEPTH);
367 }
368
369 /* clear the remaining (color) renderbuffers */
370 for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
371 const GLuint bufBit = 1 << buf;
372 if (mask & bufBit) {
373 struct intel_renderbuffer *irbColor =
374 intel_renderbuffer(fb->Attachment[buf].Renderbuffer);
375 GLuint color = (irbColor->region->cpp == 4)
376 ? intel->ClearColor8888 : intel->ClearColor565;
377
378 ASSERT(irbColor);
379
380 intel->vtbl.meta_no_depth_write(intel);
381 intel->vtbl.meta_no_stencil_write(intel);
382 intel->vtbl.meta_color_mask(intel, GL_TRUE);
383 intel->vtbl.meta_draw_region(intel, irbColor->region, NULL);
384
385 /* XXX: Using INTEL_BATCH_NO_CLIPRECTS here is dangerous as the
386 * drawing origin may not be correctly emitted.
387 */
388 intel_meta_draw_quad(intel, clear.x1, clear.x2, clear.y1, clear.y2, 0, /* depth clear val */
389 color, 0, 0, 0, 0); /* texcoords */
390
391 mask &= ~bufBit;
392 }
393 }
394
395 intel->vtbl.leave_meta_state(intel);
396 intel_batchbuffer_flush(intel->batch);
397 }
398 UNLOCK_HARDWARE(intel);
399 }
400
401
402 /**
403 * Called by ctx->Driver.Clear.
404 */
405 static void
406 intelClear(GLcontext *ctx, GLbitfield mask)
407 {
408 struct intel_context *intel = intel_context(ctx);
409 const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask);
410 GLbitfield tri_mask = 0;
411 GLbitfield blit_mask = 0;
412 GLbitfield swrast_mask = 0;
413 struct gl_framebuffer *fb = ctx->DrawBuffer;
414 GLuint i;
415
416 if (0)
417 fprintf(stderr, "%s\n", __FUNCTION__);
418
419 /* HW color buffers (front, back, aux, generic FBO, etc) */
420 if (colorMask == ~0) {
421 /* clear all R,G,B,A */
422 /* XXX FBO: need to check if colorbuffers are software RBOs! */
423 blit_mask |= (mask & BUFFER_BITS_COLOR);
424 }
425 else {
426 /* glColorMask in effect */
427 tri_mask |= (mask & BUFFER_BITS_COLOR);
428 }
429
430 /* HW stencil */
431 if (mask & BUFFER_BIT_STENCIL) {
432 const struct intel_region *stencilRegion
433 = intel_get_rb_region(fb, BUFFER_STENCIL);
434 if (stencilRegion) {
435 /* have hw stencil */
436 if ((ctx->Stencil.WriteMask[0] & 0xff) != 0xff) {
437 /* not clearing all stencil bits, so use triangle clearing */
438 tri_mask |= BUFFER_BIT_STENCIL;
439 }
440 else {
441 /* clearing all stencil bits, use blitting */
442 blit_mask |= BUFFER_BIT_STENCIL;
443 }
444 }
445 }
446
447 /* HW depth */
448 if (mask & BUFFER_BIT_DEPTH) {
449 /* clear depth with whatever method is used for stencil (see above) */
450 if (tri_mask & BUFFER_BIT_STENCIL)
451 tri_mask |= BUFFER_BIT_DEPTH;
452 else
453 blit_mask |= BUFFER_BIT_DEPTH;
454 }
455
456 /* SW fallback clearing */
457 swrast_mask = mask & ~tri_mask & ~blit_mask;
458
459 for (i = 0; i < BUFFER_COUNT; i++) {
460 GLuint bufBit = 1 << i;
461 if ((blit_mask | tri_mask) & bufBit) {
462 if (!fb->Attachment[i].Renderbuffer->ClassID) {
463 blit_mask &= ~bufBit;
464 tri_mask &= ~bufBit;
465 swrast_mask |= bufBit;
466 }
467 }
468 }
469
470
471 intelFlush(ctx); /* XXX intelClearWithBlit also does this */
472
473 if (blit_mask)
474 intelClearWithBlit(ctx, blit_mask);
475
476 if (tri_mask)
477 intelClearWithTris(intel, tri_mask);
478
479 if (swrast_mask)
480 _swrast_Clear(ctx, swrast_mask);
481 }
482
483
484 /* Emit wait for pending flips */
485 void
486 intel_wait_flips(struct intel_context *intel, GLuint batch_flags)
487 {
488 struct intel_framebuffer *intel_fb =
489 (struct intel_framebuffer *) intel->ctx.DrawBuffer;
490 struct intel_renderbuffer *intel_rb =
491 intel_get_renderbuffer(&intel_fb->Base,
492 intel_fb->Base._ColorDrawBufferMask[0] ==
493 BUFFER_BIT_FRONT_LEFT ? BUFFER_FRONT_LEFT :
494 BUFFER_BACK_LEFT);
495
496 if (intel_fb->Base.Name == 0 && intel_rb->pf_pending == intel_fb->pf_seq) {
497 GLint pf_pipes = intel_fb->pf_pipes;
498 BATCH_LOCALS;
499
500 /* Wait for pending flips to take effect */
501 BEGIN_BATCH(2, batch_flags);
502 OUT_BATCH(pf_pipes & 0x1 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP)
503 : 0);
504 OUT_BATCH(pf_pipes & 0x2 ? (MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_B_FLIP)
505 : 0);
506 ADVANCE_BATCH();
507
508 intel_rb->pf_pending--;
509 }
510 }
511
512 #if 0
513 /* Flip the front & back buffers
514 */
515 static GLboolean
516 intelPageFlip(const __DRIdrawablePrivate * dPriv)
517 {
518 struct intel_context *intel;
519 int ret;
520 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
521
522 if (INTEL_DEBUG & DEBUG_IOCTL)
523 fprintf(stderr, "%s\n", __FUNCTION__);
524
525 assert(dPriv);
526 assert(dPriv->driContextPriv);
527 assert(dPriv->driContextPriv->driverPrivate);
528
529 intel = (struct intel_context *) dPriv->driContextPriv->driverPrivate;
530
531 if (intel->intelScreen->drmMinor < 9)
532 return GL_FALSE;
533
534 intelFlush(&intel->ctx);
535
536 ret = 0;
537
538 LOCK_HARDWARE(intel);
539
540 if (dPriv->numClipRects && intel_fb->pf_active) {
541 drm_i915_flip_t flip;
542
543 flip.pipes = intel_fb->pf_pipes;
544
545 ret = drmCommandWrite(intel->driFd, DRM_I915_FLIP, &flip, sizeof(flip));
546 }
547
548 UNLOCK_HARDWARE(intel);
549
550 if (ret || !intel_fb->pf_active)
551 return GL_FALSE;
552
553 if (!dPriv->numClipRects) {
554 usleep(10000); /* throttle invisible client 10ms */
555 }
556
557 intel_fb->pf_current_page = (intel->sarea->pf_current_page >>
558 (intel_fb->pf_pipes & 0x2)) & 0x3;
559
560 if (dPriv->numClipRects != 0) {
561 intel_get_renderbuffer(&intel_fb->Base, BUFFER_FRONT_LEFT)->pf_pending =
562 intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->pf_pending =
563 ++intel_fb->pf_seq;
564 }
565
566 intel_flip_renderbuffers(intel_fb);
567 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
568
569 if (INTEL_DEBUG & DEBUG_IOCTL)
570 fprintf(stderr, "%s: success\n", __FUNCTION__);
571
572 return GL_TRUE;
573 }
574 #endif
575
576
577 static GLboolean
578 intelScheduleSwap(const __DRIdrawablePrivate * dPriv, GLboolean *missed_target)
579 {
580 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
581 unsigned int interval = driGetVBlankInterval(dPriv, intel_fb->vblank_flags);
582 struct intel_context *intel =
583 intelScreenContext(dPriv->driScreenPriv->private);
584 const intelScreenPrivate *intelScreen = intel->intelScreen;
585 unsigned int target;
586 drm_i915_vblank_swap_t swap;
587 GLboolean ret;
588
589 if (!intel_fb->vblank_flags ||
590 (intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) ||
591 intelScreen->drmMinor < (intel_fb->pf_active ? 9 : 6))
592 return GL_FALSE;
593
594 swap.seqtype = DRM_VBLANK_ABSOLUTE;
595
596 if (intel_fb->vblank_flags & VBLANK_FLAG_SYNC) {
597 swap.seqtype |= DRM_VBLANK_NEXTONMISS;
598 } else if (interval == 0) {
599 return GL_FALSE;
600 }
601
602 swap.drawable = dPriv->hHWDrawable;
603 target = swap.sequence = intel_fb->vbl_seq + interval;
604
605 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
606 swap.seqtype |= DRM_VBLANK_SECONDARY;
607 }
608
609 LOCK_HARDWARE(intel);
610
611 intel_batchbuffer_flush(intel->batch);
612
613 if ( intel_fb->pf_active ) {
614 swap.seqtype |= DRM_VBLANK_FLIP;
615
616 intel_fb->pf_current_page = (((intel->sarea->pf_current_page >>
617 (intel_fb->pf_pipes & 0x2)) & 0x3) + 1) %
618 intel_fb->pf_num_pages;
619 }
620
621 if (!drmCommandWriteRead(intel->driFd, DRM_I915_VBLANK_SWAP, &swap,
622 sizeof(swap))) {
623 intel_fb->vbl_seq = swap.sequence;
624 swap.sequence -= target;
625 *missed_target = swap.sequence > 0 && swap.sequence <= (1 << 23);
626
627 intel_get_renderbuffer(&intel_fb->Base, BUFFER_BACK_LEFT)->vbl_pending =
628 intel_get_renderbuffer(&intel_fb->Base,
629 BUFFER_FRONT_LEFT)->vbl_pending =
630 intel_fb->vbl_seq;
631
632 if (swap.seqtype & DRM_VBLANK_FLIP) {
633 intel_flip_renderbuffers(intel_fb);
634 intel_draw_buffer(&intel->ctx, intel->ctx.DrawBuffer);
635 }
636
637 ret = GL_TRUE;
638 } else {
639 if (swap.seqtype & DRM_VBLANK_FLIP) {
640 intel_fb->pf_current_page = ((intel->sarea->pf_current_page >>
641 (intel_fb->pf_pipes & 0x2)) & 0x3) %
642 intel_fb->pf_num_pages;
643 }
644
645 ret = GL_FALSE;
646 }
647
648 UNLOCK_HARDWARE(intel);
649
650 return ret;
651 }
652
653 void
654 intelSwapBuffers(__DRIdrawablePrivate * dPriv)
655 {
656 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
657 GET_CURRENT_CONTEXT(ctx);
658 struct intel_context *intel;
659
660 if (ctx == NULL)
661 return;
662
663 intel = intel_context(ctx);
664
665 if (ctx->Visual.doubleBufferMode) {
666 GLboolean missed_target;
667 struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
668 int64_t ust;
669
670 _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */
671
672 if (!intelScheduleSwap(dPriv, &missed_target)) {
673 driWaitForVBlank(dPriv, &intel_fb->vbl_seq, intel_fb->vblank_flags,
674 &missed_target);
675
676 intelCopyBuffer(dPriv, NULL);
677 }
678
679 intel_fb->swap_count++;
680 (*dri_interface->getUST) (&ust);
681 if (missed_target) {
682 intel_fb->swap_missed_count++;
683 intel_fb->swap_missed_ust = ust - intel_fb->swap_ust;
684 }
685
686 intel_fb->swap_ust = ust;
687 }
688 }
689 else {
690 /* XXX this shouldn't be an error but we can't handle it for now */
691 fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
692 }
693 }
694
695 void
696 intelCopySubBuffer(__DRIdrawablePrivate * dPriv, int x, int y, int w, int h)
697 {
698 if (dPriv->driContextPriv && dPriv->driContextPriv->driverPrivate) {
699 struct intel_context *intel =
700 (struct intel_context *) dPriv->driContextPriv->driverPrivate;
701 GLcontext *ctx = &intel->ctx;
702
703 if (ctx->Visual.doubleBufferMode) {
704 drm_clip_rect_t rect;
705 /* fixup cliprect (driDrawable may have changed?) later */
706 rect.x1 = x;
707 rect.y1 = y;
708 rect.x2 = w;
709 rect.y2 = h;
710 _mesa_notifySwapBuffers(ctx); /* flush pending rendering comands */
711 intelCopyBuffer(dPriv, &rect);
712 }
713 }
714 else {
715 /* XXX this shouldn't be an error but we can't handle it for now */
716 fprintf(stderr, "%s: drawable has no context!\n", __FUNCTION__);
717 }
718 }
719
720
721 /**
722 * Update the hardware state for drawing into a window or framebuffer object.
723 *
724 * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
725 * places within the driver.
726 *
727 * Basically, this needs to be called any time the current framebuffer
728 * changes, the renderbuffers change, or we need to draw into different
729 * color buffers.
730 */
731 void
732 intel_draw_buffer(GLcontext * ctx, struct gl_framebuffer *fb)
733 {
734 struct intel_context *intel = intel_context(ctx);
735 struct intel_region *colorRegion, *depthRegion = NULL;
736 struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
737
738 if (!fb) {
739 /* this can happen during the initial context initialization */
740 return;
741 }
742
743 /* Do this here, not core Mesa, since this function is called from
744 * many places within the driver.
745 */
746 if (ctx->NewState & (_NEW_BUFFERS | _NEW_COLOR | _NEW_PIXEL)) {
747 /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
748 _mesa_update_framebuffer(ctx);
749 /* this updates the DrawBuffer's Width/Height if it's a FBO */
750 _mesa_update_draw_buffer_bounds(ctx);
751 }
752
753 if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
754 /* this may occur when we're called by glBindFrameBuffer() during
755 * the process of someone setting up renderbuffers, etc.
756 */
757 /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
758 return;
759 }
760
761 if (fb->Name)
762 intel_validate_paired_depth_stencil(ctx, fb);
763
764 /*
765 * How many color buffers are we drawing into?
766 */
767 if (fb->_NumColorDrawBuffers[0] != 1) {
768 /* writing to 0 or 2 or 4 color buffers */
769 /*_mesa_debug(ctx, "Software rendering\n");*/
770 FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE);
771 }
772 else {
773 /* draw to exactly one color buffer */
774 /*_mesa_debug(ctx, "Hardware rendering\n");*/
775 FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE);
776 }
777
778 /*
779 * Get the intel_renderbuffer for the colorbuffer we're drawing into.
780 * And set up cliprects.
781 */
782 {
783 struct intel_renderbuffer *irb;
784 intelSetRenderbufferClipRects(intel);
785 irb = intel_renderbuffer(fb->_ColorDrawBuffers[0][0]);
786 colorRegion = (irb && irb->region) ? irb->region : NULL;
787 }
788
789 /* Update culling direction which changes depending on the
790 * orientation of the buffer:
791 */
792 if (ctx->Driver.FrontFace)
793 ctx->Driver.FrontFace(ctx, ctx->Polygon.FrontFace);
794 else
795 ctx->NewState |= _NEW_POLYGON;
796
797 if (!colorRegion) {
798 FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_TRUE);
799 }
800 else {
801 FALLBACK(intel, INTEL_FALLBACK_DRAW_BUFFER, GL_FALSE);
802 }
803
804 /***
805 *** Get depth buffer region and check if we need a software fallback.
806 *** Note that the depth buffer is usually a DEPTH_STENCIL buffer.
807 ***/
808 if (fb->_DepthBuffer && fb->_DepthBuffer->Wrapped) {
809 irbDepth = intel_renderbuffer(fb->_DepthBuffer->Wrapped);
810 if (irbDepth && irbDepth->region) {
811 FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_FALSE);
812 depthRegion = irbDepth->region;
813 }
814 else {
815 FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_TRUE);
816 depthRegion = NULL;
817 }
818 }
819 else {
820 /* not using depth buffer */
821 FALLBACK(intel, INTEL_FALLBACK_DEPTH_BUFFER, GL_FALSE);
822 depthRegion = NULL;
823 }
824
825 /***
826 *** Stencil buffer
827 *** This can only be hardware accelerated if we're using a
828 *** combined DEPTH_STENCIL buffer (for now anyway).
829 ***/
830 if (fb->_StencilBuffer && fb->_StencilBuffer->Wrapped) {
831 irbStencil = intel_renderbuffer(fb->_StencilBuffer->Wrapped);
832 if (irbStencil && irbStencil->region) {
833 ASSERT(irbStencil->Base._ActualFormat == GL_DEPTH24_STENCIL8_EXT);
834 FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
835 /* need to re-compute stencil hw state */
836 ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
837 if (!depthRegion)
838 depthRegion = irbStencil->region;
839 }
840 else {
841 FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_TRUE);
842 }
843 }
844 else {
845 /* XXX FBO: instead of FALSE, pass ctx->Stencil.Enabled ??? */
846 FALLBACK(intel, INTEL_FALLBACK_STENCIL_BUFFER, GL_FALSE);
847 /* need to re-compute stencil hw state */
848 ctx->Driver.Enable(ctx, GL_STENCIL_TEST, ctx->Stencil.Enabled);
849 }
850
851
852 /**
853 ** Release old regions, reference new regions
854 **/
855
856 intel->vtbl.set_draw_region(intel, colorRegion, depthRegion);
857
858 /* update viewport since it depends on window size */
859 ctx->Driver.Viewport(ctx, ctx->Viewport.X, ctx->Viewport.Y,
860 ctx->Viewport.Width, ctx->Viewport.Height);
861
862 /* Update hardware scissor */
863 ctx->Driver.Scissor(ctx, ctx->Scissor.X, ctx->Scissor.Y,
864 ctx->Scissor.Width, ctx->Scissor.Height);
865 }
866
867
868 static void
869 intelDrawBuffer(GLcontext * ctx, GLenum mode)
870 {
871 intel_draw_buffer(ctx, ctx->DrawBuffer);
872 }
873
874
875 static void
876 intelReadBuffer(GLcontext * ctx, GLenum mode)
877 {
878 if (ctx->ReadBuffer == ctx->DrawBuffer) {
879 /* This will update FBO completeness status.
880 * A framebuffer will be incomplete if the GL_READ_BUFFER setting
881 * refers to a missing renderbuffer. Calling glReadBuffer can set
882 * that straight and can make the drawing buffer complete.
883 */
884 intel_draw_buffer(ctx, ctx->DrawBuffer);
885 }
886 /* Generally, functions which read pixels (glReadPixels, glCopyPixels, etc)
887 * reference ctx->ReadBuffer and do appropriate state checks.
888 */
889 }
890
891
892 void
893 intelInitBufferFuncs(struct dd_function_table *functions)
894 {
895 functions->Clear = intelClear;
896 functions->DrawBuffer = intelDrawBuffer;
897 functions->ReadBuffer = intelReadBuffer;
898 }