Merge branch 'master' of git+ssh://znh@git.freedesktop.org/git/mesa/mesa into 965...
[mesa.git] / src / mesa / drivers / dri / i915tex / intel_context.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include "glheader.h"
30 #include "context.h"
31 #include "matrix.h"
32 #include "simple_list.h"
33 #include "extensions.h"
34 #include "framebuffer.h"
35 #include "imports.h"
36 #include "points.h"
37
38 #include "swrast/swrast.h"
39 #include "swrast_setup/swrast_setup.h"
40 #include "tnl/tnl.h"
41
42 #include "tnl/t_pipeline.h"
43 #include "tnl/t_vertex.h"
44
45 #include "drivers/common/driverfuncs.h"
46
47 #include "intel_screen.h"
48
49 #include "i830_dri.h"
50
51 #include "intel_buffers.h"
52 #include "intel_tex.h"
53 #include "intel_span.h"
54 #include "intel_tris.h"
55 #include "intel_ioctl.h"
56 #include "intel_batchbuffer.h"
57 #include "intel_blit.h"
58 #include "intel_pixel.h"
59 #include "intel_regions.h"
60 #include "intel_buffer_objects.h"
61 #include "intel_fbo.h"
62
63 #include "drirenderbuffer.h"
64 #include "vblank.h"
65 #include "utils.h"
66 #include "xmlpool.h" /* for symbolic values of enum-type options */
67 #ifndef INTEL_DEBUG
68 int INTEL_DEBUG = (0);
69 #endif
70
71 #define need_GL_ARB_multisample
72 #define need_GL_ARB_point_parameters
73 #define need_GL_ARB_texture_compression
74 #define need_GL_ARB_vertex_buffer_object
75 #define need_GL_ARB_vertex_program
76 #define need_GL_ARB_window_pos
77 #define need_GL_EXT_blend_color
78 #define need_GL_EXT_blend_equation_separate
79 #define need_GL_EXT_blend_func_separate
80 #define need_GL_EXT_blend_minmax
81 #define need_GL_EXT_cull_vertex
82 #define need_GL_EXT_fog_coord
83 #define need_GL_EXT_framebuffer_object
84 #define need_GL_EXT_multi_draw_arrays
85 #define need_GL_EXT_secondary_color
86 #define need_GL_NV_vertex_program
87 #include "extension_helper.h"
88
89
90 #define DRIVER_DATE "20061102"
91
92 _glthread_Mutex lockMutex;
93 static GLboolean lockMutexInit = GL_FALSE;
94
95
96 static const GLubyte *
97 intelGetString(GLcontext * ctx, GLenum name)
98 {
99 const char *chipset;
100 static char buffer[128];
101
102 switch (name) {
103 case GL_VENDOR:
104 return (GLubyte *) "Tungsten Graphics, Inc";
105 break;
106
107 case GL_RENDERER:
108 switch (intel_context(ctx)->intelScreen->deviceID) {
109 case PCI_CHIP_845_G:
110 chipset = "Intel(R) 845G";
111 break;
112 case PCI_CHIP_I830_M:
113 chipset = "Intel(R) 830M";
114 break;
115 case PCI_CHIP_I855_GM:
116 chipset = "Intel(R) 852GM/855GM";
117 break;
118 case PCI_CHIP_I865_G:
119 chipset = "Intel(R) 865G";
120 break;
121 case PCI_CHIP_I915_G:
122 chipset = "Intel(R) 915G";
123 break;
124 case PCI_CHIP_I915_GM:
125 chipset = "Intel(R) 915GM";
126 break;
127 case PCI_CHIP_I945_G:
128 chipset = "Intel(R) 945G";
129 break;
130 case PCI_CHIP_I945_GM:
131 chipset = "Intel(R) 945GM";
132 break;
133 case PCI_CHIP_I945_GME:
134 chipset = "Intel(R) 945GME";
135 break;
136 case PCI_CHIP_G33_G:
137 chipset = "Intel(R) G33";
138 break;
139 case PCI_CHIP_Q35_G:
140 chipset = "Intel(R) Q35";
141 break;
142 case PCI_CHIP_Q33_G:
143 chipset = "Intel(R) Q33";
144 break;
145 default:
146 chipset = "Unknown Intel Chipset";
147 break;
148 }
149
150 (void) driGetRendererString(buffer, chipset, DRIVER_DATE, 0);
151 return (GLubyte *) buffer;
152
153 default:
154 return NULL;
155 }
156 }
157
158
159 /**
160 * Extension strings exported by the intel driver.
161 *
162 * \note
163 * It appears that ARB_texture_env_crossbar has "disappeared" compared to the
164 * old i830-specific driver.
165 */
166 const struct dri_extension card_extensions[] = {
167 {"GL_ARB_multisample", GL_ARB_multisample_functions},
168 {"GL_ARB_multitexture", NULL},
169 {"GL_ARB_point_parameters", GL_ARB_point_parameters_functions},
170 {"GL_ARB_texture_border_clamp", NULL},
171 {"GL_ARB_texture_compression", GL_ARB_texture_compression_functions},
172 {"GL_ARB_texture_cube_map", NULL},
173 {"GL_ARB_texture_env_add", NULL},
174 {"GL_ARB_texture_env_combine", NULL},
175 {"GL_ARB_texture_env_dot3", NULL},
176 {"GL_ARB_texture_mirrored_repeat", NULL},
177 {"GL_ARB_texture_rectangle", NULL},
178 {"GL_ARB_vertex_buffer_object", GL_ARB_vertex_buffer_object_functions},
179 {"GL_ARB_pixel_buffer_object", NULL},
180 {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions},
181 {"GL_ARB_window_pos", GL_ARB_window_pos_functions},
182 {"GL_EXT_blend_color", GL_EXT_blend_color_functions},
183 {"GL_EXT_blend_equation_separate",
184 GL_EXT_blend_equation_separate_functions},
185 {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions},
186 {"GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions},
187 {"GL_EXT_blend_subtract", NULL},
188 {"GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions},
189 {"GL_EXT_fog_coord", GL_EXT_fog_coord_functions},
190 {"GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions},
191 {"GL_EXT_multi_draw_arrays", GL_EXT_multi_draw_arrays_functions},
192 #if 1 /* XXX FBO temporary? */
193 {"GL_EXT_packed_depth_stencil", NULL},
194 #endif
195 {"GL_EXT_secondary_color", GL_EXT_secondary_color_functions},
196 {"GL_EXT_stencil_wrap", NULL},
197 {"GL_EXT_texture_edge_clamp", NULL},
198 {"GL_EXT_texture_env_combine", NULL},
199 {"GL_EXT_texture_env_dot3", NULL},
200 {"GL_EXT_texture_filter_anisotropic", NULL},
201 {"GL_EXT_texture_lod_bias", NULL},
202 {"GL_3DFX_texture_compression_FXT1", NULL},
203 {"GL_APPLE_client_storage", NULL},
204 {"GL_MESA_pack_invert", NULL},
205 {"GL_MESA_ycbcr_texture", NULL},
206 {"GL_NV_blend_square", NULL},
207 {"GL_NV_vertex_program", GL_NV_vertex_program_functions},
208 {"GL_NV_vertex_program1_1", NULL},
209 /* { "GL_SGIS_generate_mipmap", NULL }, */
210 {NULL, NULL}
211 };
212
213 extern const struct tnl_pipeline_stage _intel_render_stage;
214
215 static const struct tnl_pipeline_stage *intel_pipeline[] = {
216 &_tnl_vertex_transform_stage,
217 &_tnl_vertex_cull_stage,
218 &_tnl_normal_transform_stage,
219 &_tnl_lighting_stage,
220 &_tnl_fog_coordinate_stage,
221 &_tnl_texgen_stage,
222 &_tnl_texture_transform_stage,
223 &_tnl_point_attenuation_stage,
224 &_tnl_vertex_program_stage,
225 #if 1
226 &_intel_render_stage, /* ADD: unclipped rastersetup-to-dma */
227 #endif
228 &_tnl_render_stage,
229 0,
230 };
231
232
233 static const struct dri_debug_control debug_control[] = {
234 {"tex", DEBUG_TEXTURE},
235 {"state", DEBUG_STATE},
236 {"ioctl", DEBUG_IOCTL},
237 {"blit", DEBUG_BLIT},
238 {"mip", DEBUG_MIPTREE},
239 {"fall", DEBUG_FALLBACKS},
240 {"verb", DEBUG_VERBOSE},
241 {"bat", DEBUG_BATCH},
242 {"pix", DEBUG_PIXEL},
243 {"buf", DEBUG_BUFMGR},
244 {"reg", DEBUG_REGION},
245 {"fbo", DEBUG_FBO},
246 {"lock", DEBUG_LOCK},
247 {NULL, 0}
248 };
249
250
251 static void
252 intelInvalidateState(GLcontext * ctx, GLuint new_state)
253 {
254 _swrast_InvalidateState(ctx, new_state);
255 _swsetup_InvalidateState(ctx, new_state);
256 _vbo_InvalidateState(ctx, new_state);
257 _tnl_InvalidateState(ctx, new_state);
258 _tnl_invalidate_vertex_state(ctx, new_state);
259 intel_context(ctx)->NewGLState |= new_state;
260 }
261
262
263 void
264 intelFlush(GLcontext * ctx)
265 {
266 struct intel_context *intel = intel_context(ctx);
267
268 if (intel->Fallback)
269 _swrast_flush(ctx);
270
271 INTEL_FIREVERTICES(intel);
272
273 if (intel->batch->map != intel->batch->ptr)
274 intel_batchbuffer_flush(intel->batch);
275
276 /* XXX: Need to do an MI_FLUSH here.
277 */
278 }
279
280
281 /**
282 * Check if we need to rotate/warp the front color buffer to the
283 * rotated screen. We generally need to do this when we get a glFlush
284 * or glFinish after drawing to the front color buffer.
285 */
286 static void
287 intelCheckFrontRotate(GLcontext * ctx)
288 {
289 struct intel_context *intel = intel_context(ctx);
290 if (intel->ctx.DrawBuffer->_ColorDrawBufferMask[0] ==
291 BUFFER_BIT_FRONT_LEFT) {
292 intelScreenPrivate *screen = intel->intelScreen;
293 if (screen->current_rotation != 0) {
294 __DRIdrawablePrivate *dPriv = intel->driDrawable;
295 intelRotateWindow(intel, dPriv, BUFFER_BIT_FRONT_LEFT);
296 }
297 }
298 }
299
300
301 /**
302 * Called via glFlush.
303 */
304 static void
305 intelglFlush(GLcontext * ctx)
306 {
307 intelFlush(ctx);
308 intelCheckFrontRotate(ctx);
309 }
310
311 void
312 intelFinish(GLcontext * ctx)
313 {
314 struct intel_context *intel = intel_context(ctx);
315 intelFlush(ctx);
316 if (intel->batch->last_fence) {
317 driFenceFinish(intel->batch->last_fence,
318 0, GL_FALSE);
319 driFenceUnReference(intel->batch->last_fence);
320 intel->batch->last_fence = NULL;
321 }
322 intelCheckFrontRotate(ctx);
323 }
324
325
326 void
327 intelInitDriverFunctions(struct dd_function_table *functions)
328 {
329 _mesa_init_driver_functions(functions);
330
331 functions->Flush = intelglFlush;
332 functions->Finish = intelFinish;
333 functions->GetString = intelGetString;
334 functions->UpdateState = intelInvalidateState;
335 functions->CopyColorTable = _swrast_CopyColorTable;
336 functions->CopyColorSubTable = _swrast_CopyColorSubTable;
337 functions->CopyConvolutionFilter1D = _swrast_CopyConvolutionFilter1D;
338 functions->CopyConvolutionFilter2D = _swrast_CopyConvolutionFilter2D;
339
340 intelInitTextureFuncs(functions);
341 intelInitPixelFuncs(functions);
342 intelInitStateFuncs(functions);
343 intelInitBufferFuncs(functions);
344 }
345
346
347 GLboolean
348 intelInitContext(struct intel_context *intel,
349 const __GLcontextModes * mesaVis,
350 __DRIcontextPrivate * driContextPriv,
351 void *sharedContextPrivate,
352 struct dd_function_table *functions)
353 {
354 GLcontext *ctx = &intel->ctx;
355 GLcontext *shareCtx = (GLcontext *) sharedContextPrivate;
356 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
357 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
358 drmI830Sarea *saPriv = (drmI830Sarea *)
359 (((GLubyte *) sPriv->pSAREA) + intelScreen->sarea_priv_offset);
360 int fthrottle_mode;
361 GLboolean havePools;
362
363 DRM_LIGHT_LOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
364 havePools = intelCreatePools(intelScreen);
365 DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, driContextPriv->hHWContext);
366
367 if (!havePools)
368 return GL_FALSE;
369
370 if (!_mesa_initialize_context(&intel->ctx,
371 mesaVis, shareCtx,
372 functions, (void *) intel))
373 return GL_FALSE;
374
375 driContextPriv->driverPrivate = intel;
376 intel->intelScreen = intelScreen;
377 intel->driScreen = sPriv;
378 intel->sarea = saPriv;
379
380 intel->width = intelScreen->width;
381 intel->height = intelScreen->height;
382 intel->current_rotation = intelScreen->current_rotation;
383
384 if (!lockMutexInit) {
385 lockMutexInit = GL_TRUE;
386 _glthread_INIT_MUTEX(lockMutex);
387 }
388
389 driParseConfigFiles(&intel->optionCache, &intelScreen->optionCache,
390 intel->driScreen->myNum, "i915");
391
392 ctx->Const.MaxTextureMaxAnisotropy = 2.0;
393
394 /* This doesn't yet catch all non-conformant rendering, but it's a
395 * start.
396 */
397 if (getenv("INTEL_STRICT_CONFORMANCE")) {
398 intel->strict_conformance = 1;
399 }
400
401 ctx->Const.MinLineWidth = 1.0;
402 ctx->Const.MinLineWidthAA = 1.0;
403 ctx->Const.MaxLineWidth = 3.0;
404 ctx->Const.MaxLineWidthAA = 3.0;
405 ctx->Const.LineWidthGranularity = 1.0;
406
407 ctx->Const.MinPointSize = 1.0;
408 ctx->Const.MinPointSizeAA = 1.0;
409 ctx->Const.MaxPointSize = 255.0;
410 ctx->Const.MaxPointSizeAA = 3.0;
411 ctx->Const.PointSizeGranularity = 1.0;
412
413 /* reinitialize the context point state.
414 * It depend on constants in __GLcontextRec::Const
415 */
416 _mesa_init_point(ctx);
417
418 ctx->Const.MaxColorAttachments = 4; /* XXX FBO: review this */
419
420 /* Initialize the software rasterizer and helper modules. */
421 _swrast_CreateContext(ctx);
422 _vbo_CreateContext(ctx);
423 _tnl_CreateContext(ctx);
424 _swsetup_CreateContext(ctx);
425
426 /* Install the customized pipeline: */
427 _tnl_destroy_pipeline(ctx);
428 _tnl_install_pipeline(ctx, intel_pipeline);
429
430 /* Configure swrast to match hardware characteristics: */
431 _swrast_allow_pixel_fog(ctx, GL_FALSE);
432 _swrast_allow_vertex_fog(ctx, GL_TRUE);
433
434 /* Dri stuff */
435 intel->hHWContext = driContextPriv->hHWContext;
436 intel->driFd = sPriv->fd;
437 intel->driHwLock = (drmLock *) & sPriv->pSAREA->lock;
438
439 intel->hw_stipple = 1;
440
441 /* XXX FBO: this doesn't seem to be used anywhere */
442 switch (mesaVis->depthBits) {
443 case 0: /* what to do in this case? */
444 case 16:
445 intel->polygon_offset_scale = 1.0 / 0xffff;
446 break;
447 case 24:
448 intel->polygon_offset_scale = 2.0 / 0xffffff; /* req'd to pass glean */
449 break;
450 default:
451 assert(0);
452 break;
453 }
454
455 /* Initialize swrast, tnl driver tables: */
456 intelInitSpanFuncs(ctx);
457 intelInitTriFuncs(ctx);
458
459
460 intel->RenderIndex = ~0;
461
462 fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode");
463 intel->iw.irq_seq = -1;
464 intel->irqsEmitted = 0;
465
466 intel->do_irqs = (intel->intelScreen->irq_active &&
467 fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS);
468
469 intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
470
471 _math_matrix_ctr(&intel->ViewportMatrix);
472
473 /* Disable imaging extension until convolution is working in
474 * teximage paths:
475 */
476 driInitExtensions(ctx, card_extensions,
477 /* GL_TRUE, */
478 GL_FALSE);
479
480
481 intel->batch = intel_batchbuffer_alloc(intel);
482 intel->last_swap_fence = NULL;
483 intel->first_swap_fence = NULL;
484
485 intel_bufferobj_init(intel);
486 intel_fbo_init(intel);
487
488 if (intel->ctx.Mesa_DXTn) {
489 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
490 _mesa_enable_extension(ctx, "GL_S3_s3tc");
491 }
492 else if (driQueryOptionb(&intel->optionCache, "force_s3tc_enable")) {
493 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
494 }
495
496 intel->prim.primitive = ~0;
497
498
499 #if DO_DEBUG
500 INTEL_DEBUG = driParseDebugString(getenv("INTEL_DEBUG"), debug_control);
501 #endif
502
503 if (getenv("INTEL_NO_RAST")) {
504 fprintf(stderr, "disabling 3D rasterization\n");
505 FALLBACK(intel, INTEL_FALLBACK_USER, 1);
506 }
507
508 return GL_TRUE;
509 }
510
511 void
512 intelDestroyContext(__DRIcontextPrivate * driContextPriv)
513 {
514 struct intel_context *intel =
515 (struct intel_context *) driContextPriv->driverPrivate;
516
517 assert(intel); /* should never be null */
518 if (intel) {
519 GLboolean release_texture_heaps;
520
521 INTEL_FIREVERTICES(intel);
522
523 intel->vtbl.destroy(intel);
524
525 release_texture_heaps = (intel->ctx.Shared->RefCount == 1);
526 _swsetup_DestroyContext(&intel->ctx);
527 _tnl_DestroyContext(&intel->ctx);
528 _vbo_DestroyContext(&intel->ctx);
529
530 _swrast_DestroyContext(&intel->ctx);
531 intel->Fallback = 0; /* don't call _swrast_Flush later */
532
533 intel_batchbuffer_free(intel->batch);
534
535 if (intel->last_swap_fence) {
536 driFenceFinish(intel->last_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE);
537 driFenceUnReference(intel->last_swap_fence);
538 intel->last_swap_fence = NULL;
539 }
540 if (intel->first_swap_fence) {
541 driFenceFinish(intel->first_swap_fence, DRM_FENCE_TYPE_EXE, GL_TRUE);
542 driFenceUnReference(intel->first_swap_fence);
543 intel->first_swap_fence = NULL;
544 }
545
546
547 if (release_texture_heaps) {
548 /* This share group is about to go away, free our private
549 * texture object data.
550 */
551 if (INTEL_DEBUG & DEBUG_TEXTURE)
552 fprintf(stderr, "do something to free texture heaps\n");
553 }
554
555 /* free the Mesa context */
556 _mesa_free_context_data(&intel->ctx);
557 }
558 }
559
560 GLboolean
561 intelUnbindContext(__DRIcontextPrivate * driContextPriv)
562 {
563 return GL_TRUE;
564 }
565
566 GLboolean
567 intelMakeCurrent(__DRIcontextPrivate * driContextPriv,
568 __DRIdrawablePrivate * driDrawPriv,
569 __DRIdrawablePrivate * driReadPriv)
570 {
571
572 if (driContextPriv) {
573 struct intel_context *intel =
574 (struct intel_context *) driContextPriv->driverPrivate;
575 struct intel_framebuffer *intel_fb =
576 (struct intel_framebuffer *) driDrawPriv->driverPrivate;
577 GLframebuffer *readFb = (GLframebuffer *) driReadPriv->driverPrivate;
578
579
580 /* XXX FBO temporary fix-ups! */
581 /* if the renderbuffers don't have regions, init them from the context */
582 {
583 struct intel_renderbuffer *irbDepth
584 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_DEPTH);
585 struct intel_renderbuffer *irbStencil
586 = intel_get_renderbuffer(&intel_fb->Base, BUFFER_STENCIL);
587
588 if (intel_fb->color_rb[0] && !intel_fb->color_rb[0]->region) {
589 intel_region_reference(&intel_fb->color_rb[0]->region,
590 intel->intelScreen->front_region);
591 }
592 if (intel_fb->color_rb[1] && !intel_fb->color_rb[1]->region) {
593 intel_region_reference(&intel_fb->color_rb[1]->region,
594 intel->intelScreen->back_region);
595 }
596 if (intel_fb->color_rb[2] && !intel_fb->color_rb[2]->region) {
597 intel_region_reference(&intel_fb->color_rb[2]->region,
598 intel->intelScreen->third_region);
599 }
600 if (irbDepth && !irbDepth->region) {
601 intel_region_reference(&irbDepth->region, intel->intelScreen->depth_region);
602 }
603 if (irbStencil && !irbStencil->region) {
604 intel_region_reference(&irbStencil->region, intel->intelScreen->depth_region);
605 }
606 }
607
608 /* set GLframebuffer size to match window, if needed */
609 driUpdateFramebufferSize(&intel->ctx, driDrawPriv);
610
611 if (driReadPriv != driDrawPriv) {
612 driUpdateFramebufferSize(&intel->ctx, driReadPriv);
613 }
614
615 _mesa_make_current(&intel->ctx, &intel_fb->Base, readFb);
616
617 /* The drawbuffer won't always be updated by _mesa_make_current:
618 */
619 if (intel->ctx.DrawBuffer == &intel_fb->Base) {
620
621 if (intel->driDrawable != driDrawPriv) {
622 if (driDrawPriv->pdraw->swap_interval == (unsigned)-1) {
623 int i;
624
625 intel_fb->vblank_flags = (intel->intelScreen->irq_active != 0)
626 ? driGetDefaultVBlankFlags(&intel->optionCache)
627 : VBLANK_FLAG_NO_IRQ;
628
629 (*dri_interface->getUST) (&intel_fb->swap_ust);
630 driDrawableInitVBlank(driDrawPriv, intel_fb->vblank_flags,
631 &intel_fb->vbl_seq);
632 intel_fb->vbl_waited = intel_fb->vbl_seq;
633
634 for (i = 0; i < (intel->intelScreen->third.handle ? 3 : 2); i++) {
635 if (intel_fb->color_rb[i])
636 intel_fb->color_rb[i]->vbl_pending = intel_fb->vbl_seq;
637 }
638 }
639 intel->driDrawable = driDrawPriv;
640 intelWindowMoved(intel);
641 }
642
643 intel_draw_buffer(&intel->ctx, &intel_fb->Base);
644 }
645 }
646 else {
647 _mesa_make_current(NULL, NULL, NULL);
648 }
649
650 return GL_TRUE;
651 }
652
653 static void
654 intelContendedLock(struct intel_context *intel, GLuint flags)
655 {
656 __DRIdrawablePrivate *dPriv = intel->driDrawable;
657 __DRIscreenPrivate *sPriv = intel->driScreen;
658 intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;
659 drmI830Sarea *sarea = intel->sarea;
660
661 drmGetLock(intel->driFd, intel->hHWContext, flags);
662
663 if (INTEL_DEBUG & DEBUG_LOCK)
664 _mesa_printf("%s - got contended lock\n", __progname);
665
666 /* If the window moved, may need to set a new cliprect now.
667 *
668 * NOTE: This releases and regains the hw lock, so all state
669 * checking must be done *after* this call:
670 */
671 if (dPriv)
672 DRI_VALIDATE_DRAWABLE_INFO(sPriv, dPriv);
673
674 if (sarea->width != intelScreen->width ||
675 sarea->height != intelScreen->height ||
676 sarea->rotation != intelScreen->current_rotation) {
677
678 intelUpdateScreenRotation(sPriv, sarea);
679 }
680
681 if (sarea->width != intel->width ||
682 sarea->height != intel->height ||
683 sarea->rotation != intel->current_rotation) {
684 int numClipRects = intel->numClipRects;
685
686 /*
687 * FIXME: Really only need to do this when drawing to a
688 * common back- or front buffer.
689 */
690
691 /*
692 * This will essentially drop the outstanding batchbuffer on the floor.
693 */
694 intel->numClipRects = 0;
695
696 if (intel->Fallback)
697 _swrast_flush(&intel->ctx);
698
699 INTEL_FIREVERTICES(intel);
700
701 if (intel->batch->map != intel->batch->ptr)
702 intel_batchbuffer_flush(intel->batch);
703
704 intel->numClipRects = numClipRects;
705
706 /* force window update */
707 intel->lastStamp = 0;
708
709 intel->width = sarea->width;
710 intel->height = sarea->height;
711 intel->current_rotation = sarea->rotation;
712 }
713
714 /* Drawable changed?
715 */
716 if (dPriv && intel->lastStamp != dPriv->lastStamp) {
717 intelWindowMoved(intel);
718 intel->lastStamp = dPriv->lastStamp;
719 }
720 }
721
722
723
724 /* Lock the hardware and validate our state.
725 */
726 void LOCK_HARDWARE( struct intel_context *intel )
727 {
728 char __ret=0;
729 struct intel_framebuffer *intel_fb = NULL;
730 struct intel_renderbuffer *intel_rb = NULL;
731 _glthread_LOCK_MUTEX(lockMutex);
732 assert(!intel->locked);
733
734 if (intel->driDrawable) {
735 intel_fb = intel->driDrawable->driverPrivate;
736
737 if (intel_fb)
738 intel_rb =
739 intel_get_renderbuffer(&intel_fb->Base,
740 intel_fb->Base._ColorDrawBufferMask[0] ==
741 BUFFER_BIT_FRONT_LEFT ? BUFFER_FRONT_LEFT :
742 BUFFER_BACK_LEFT);
743 }
744
745 if (intel_rb && intel_fb->vblank_flags &&
746 !(intel_fb->vblank_flags & VBLANK_FLAG_NO_IRQ) &&
747 (intel_fb->vbl_waited - intel_rb->vbl_pending) > (1<<23)) {
748 drmVBlank vbl;
749
750 vbl.request.type = DRM_VBLANK_ABSOLUTE;
751
752 if ( intel_fb->vblank_flags & VBLANK_FLAG_SECONDARY ) {
753 vbl.request.type |= DRM_VBLANK_SECONDARY;
754 }
755
756 vbl.request.sequence = intel_rb->vbl_pending;
757 drmWaitVBlank(intel->driFd, &vbl);
758 intel_fb->vbl_waited = vbl.reply.sequence;
759 }
760
761 DRM_CAS(intel->driHwLock, intel->hHWContext,
762 (DRM_LOCK_HELD|intel->hHWContext), __ret);
763
764 if (__ret)
765 intelContendedLock( intel, 0 );
766
767 if (INTEL_DEBUG & DEBUG_LOCK)
768 _mesa_printf("%s - locked\n", __progname);
769
770 intel->locked = 1;
771 }
772
773
774 /* Unlock the hardware using the global current context
775 */
776 void UNLOCK_HARDWARE( struct intel_context *intel )
777 {
778 intel->locked = 0;
779
780 DRM_UNLOCK(intel->driFd, intel->driHwLock, intel->hHWContext);
781
782 _glthread_UNLOCK_MUTEX(lockMutex);
783
784 if (INTEL_DEBUG & DEBUG_LOCK)
785 _mesa_printf("%s - unlocked\n", __progname);
786 }
787