src/mesa/drivers/dri/i915tex/intel_ioctl.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include <stdio.h>
  30 #include <unistd.h>
  31 #include <errno.h>
  32 #include <sched.h>
  33
  34 #include "mtypes.h"
  35 #include "context.h"
  36 #include "swrast/swrast.h"
  37
  38 #include "intel_context.h"
  39 #include "intel_ioctl.h"
  40 #include "intel_batchbuffer.h"
  41 #include "intel_blit.h"
  42 #include "intel_regions.h"
  43 #include "drm.h"
  44
  45 #define FILE_DEBUG_FLAG DEBUG_IOCTL
  46
  47 int
  48 intelEmitIrqLocked(struct intel_context *intel)
  49 {
  50    drmI830IrqEmit ie;
  51    int ret, seq;
  52
  53    assert(((*(int *) intel->driHwLock) & ~DRM_LOCK_CONT) ==
  54           (DRM_LOCK_HELD | intel->hHWContext));
  55
  56    ie.irq_seq = &seq;
  57
  58    ret = drmCommandWriteRead(intel->driFd, DRM_I830_IRQ_EMIT,
  59                              &ie, sizeof(ie));
  60    if (ret) {
  61       fprintf(stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret);
  62       exit(1);
  63    }
  64
  65    DBG("%s -->  %d\n", __FUNCTION__, seq);
  66
  67    return seq;
  68 }
  69
  70 void
  71 intelWaitIrq(struct intel_context *intel, int seq)
  72 {
  73    int ret;
  74
  75    DBG("%s %d\n", __FUNCTION__, seq);
  76
  77    intel->iw.irq_seq = seq;
  78
  79    do {
  80       ret =
  81          drmCommandWrite(intel->driFd, DRM_I830_IRQ_WAIT, &intel->iw,
  82                          sizeof(intel->iw));
  83    } while (ret == -EAGAIN || ret == -EINTR);
  84
  85    if (ret) {
  86       fprintf(stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret);
  87       exit(1);
  88    }
  89 }
  90
  91
  92 void
  93 intel_batch_ioctl(struct intel_context *intel,
  94                   GLuint start_offset,
  95                   GLuint used,
  96                   GLboolean ignore_cliprects, GLboolean allow_unlock)
  97 {
  98    drmI830BatchBuffer batch;
  99
 100    assert(intel->locked);
 101    assert(used);
 102
 103    DBG("%s used %d offset %x..%x ignore_cliprects %d\n",
 104        __FUNCTION__,
 105        used, start_offset, start_offset + used, ignore_cliprects);
 106
 107    /* Throw away non-effective packets.  Won't work once we have
 108     * hardware contexts which would preserve statechanges beyond a
 109     * single buffer.
 110     */
 111
 112
 113
 114    batch.start = start_offset;
 115    batch.used = used;
 116    batch.cliprects = intel->pClipRects;
 117    batch.num_cliprects = ignore_cliprects ? 0 : intel->numClipRects;
 118    batch.DR1 = 0;
 119    batch.DR4 = ((((GLuint) intel->drawX) & 0xffff) |
 120                 (((GLuint) intel->drawY) << 16));
 121
 122    DBG("%s: 0x%x..0x%x DR4: %x cliprects: %d\n",
 123        __FUNCTION__,
 124        batch.start,
 125        batch.start + batch.used * 4, batch.DR4, batch.num_cliprects);
 126
 127    if (drmCommandWrite(intel->driFd, DRM_I830_BATCHBUFFER, &batch,
 128                        sizeof(batch))) {
 129       fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
 130       UNLOCK_HARDWARE(intel);
 131       exit(1);
 132    }
 133
 134    /* FIXME: use hardware contexts to avoid 'losing' hardware after
 135     * each buffer flush.
 136     */
 137    intel->vtbl.lost_hardware(intel);
 138 }