src/mesa/drivers/dri/i965/brw_binding_tables.c

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 /**
  25  * \file brw_binding_tables.c
  26  *
  27  * State atoms which upload the "binding table" for each shader stage.
  28  *
  29  * Binding tables map a numeric "surface index" to the SURFACE_STATE structure
  30  * for a currently bound surface.  This allows SEND messages (such as sampler
  31  * or data port messages) to refer to a particular surface by number, rather
  32  * than by pointer.
  33  *
  34  * The binding table is stored as a (sparse) array of SURFACE_STATE entries;
  35  * surface indexes are simply indexes into the array.  The ordering of the
  36  * entries is entirely left up to software; see the SURF_INDEX_* macros in
  37  * brw_context.h to see our current layout.
  38  */
  39
  40 #include "main/mtypes.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_defines.h"
  44 #include "brw_state.h"
  45 #include "intel_batchbuffer.h"
  46
  47 /**
  48  * Upload a shader stage's binding table as indirect state.
  49  *
  50  * This copies brw_stage_state::surf_offset[] into the indirect state section
  51  * of the batchbuffer (allocated by brw_state_batch()).
  52  */
  53 static void
  54 brw_upload_binding_table(struct brw_context *brw,
  55                          GLbitfield brw_new_binding_table,
  56                          struct brw_stage_state *stage_state)
  57 {
  58    /* CACHE_NEW_*_PROG */
  59    struct brw_stage_prog_data *prog_data = stage_state->prog_data;
  60
  61    if (prog_data->binding_table.size_bytes == 0) {
  62       /* There are no surfaces; skip making the binding table altogether. */
  63       if (stage_state->bind_bo_offset == 0)
  64          return;
  65
  66       stage_state->bind_bo_offset = 0;
  67    } else {
  68       /* Upload a new binding table. */
  69       if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
  70          brw->vtbl.create_raw_surface(
  71             brw, brw->shader_time.bo, 0, brw->shader_time.bo->size,
  72             &stage_state->surf_offset[prog_data->binding_table.shader_time_start], true);
  73       }
  74
  75       uint32_t *bind = brw_state_batch(brw, AUB_TRACE_BINDING_TABLE,
  76                                        prog_data->binding_table.size_bytes, 32,
  77                                        &stage_state->bind_bo_offset);
  78
  79       /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
  80       memcpy(bind, stage_state->surf_offset,
  81              prog_data->binding_table.size_bytes);
  82    }
  83
  84    brw->state.dirty.brw |= brw_new_binding_table;
  85 }
  86
  87 /**
  88  * State atoms which upload the binding table for a particular shader stage.
  89  *  @{
  90  */
  91
  92 /** Upload the VS binding table. */
  93 static void
  94 brw_vs_upload_binding_table(struct brw_context *brw)
  95 {
  96    brw_upload_binding_table(brw, BRW_NEW_VS_BINDING_TABLE, &brw->vs.base);
  97 }
  98
  99 const struct brw_tracked_state brw_vs_binding_table = {
 100    .dirty = {
 101       .mesa = 0,
 102       .brw = BRW_NEW_BATCH |
 103              BRW_NEW_VS_CONSTBUF |
 104              BRW_NEW_SURFACES,
 105       .cache = CACHE_NEW_VS_PROG
 106    },
 107    .emit = brw_vs_upload_binding_table,
 108 };
 109
 110
 111 /** Upload the PS binding table. */
 112 static void
 113 brw_upload_wm_binding_table(struct brw_context *brw)
 114 {
 115    brw_upload_binding_table(brw, BRW_NEW_PS_BINDING_TABLE, &brw->wm.base);
 116 }
 117
 118 const struct brw_tracked_state brw_wm_binding_table = {
 119    .dirty = {
 120       .mesa = 0,
 121       .brw = BRW_NEW_BATCH | BRW_NEW_SURFACES,
 122       .cache = CACHE_NEW_WM_PROG
 123    },
 124    .emit = brw_upload_wm_binding_table,
 125 };
 126
 127 /** Upload the GS binding table (if GS is active). */
 128 static void
 129 brw_gs_upload_binding_table(struct brw_context *brw)
 130 {
 131    /* If there's no GS, skip changing anything. */
 132    if (brw->geometry_program == NULL)
 133       return;
 134
 135    brw_upload_binding_table(brw, BRW_NEW_GS_BINDING_TABLE, &brw->gs.base);
 136 }
 137
 138 const struct brw_tracked_state brw_gs_binding_table = {
 139    .dirty = {
 140       .mesa = 0,
 141       .brw = BRW_NEW_BATCH |
 142              BRW_NEW_GS_CONSTBUF |
 143              BRW_NEW_SURFACES,
 144       .cache = CACHE_NEW_GS_PROG
 145    },
 146    .emit = brw_gs_upload_binding_table,
 147 };
 148
 149 /** @} */
 150
 151 /**
 152  * State atoms which emit 3DSTATE packets to update the binding table pointers.
 153  *  @{
 154  */
 155
 156 /**
 157  * (Gen4-5) Upload the binding table pointers for all shader stages.
 158  *
 159  * The binding table pointers are relative to the surface state base address,
 160  * which points at the batchbuffer containing the streamed batch state.
 161  */
 162 static void
 163 gen4_upload_binding_table_pointers(struct brw_context *brw)
 164 {
 165    BEGIN_BATCH(6);
 166    OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS << 16 | (6 - 2));
 167    OUT_BATCH(brw->vs.base.bind_bo_offset);
 168    OUT_BATCH(0); /* gs */
 169    OUT_BATCH(0); /* clip */
 170    OUT_BATCH(0); /* sf */
 171    OUT_BATCH(brw->wm.base.bind_bo_offset);
 172    ADVANCE_BATCH();
 173 }
 174
 175 const struct brw_tracked_state brw_binding_table_pointers = {
 176    .dirty = {
 177       .mesa = 0,
 178       .brw = (BRW_NEW_BATCH |
 179               BRW_NEW_STATE_BASE_ADDRESS |
 180               BRW_NEW_VS_BINDING_TABLE |
 181               BRW_NEW_GS_BINDING_TABLE |
 182               BRW_NEW_PS_BINDING_TABLE),
 183       .cache = 0,
 184    },
 185    .emit = gen4_upload_binding_table_pointers,
 186 };
 187
 188 /**
 189  * (Sandybridge Only) Upload the binding table pointers for all shader stages.
 190  *
 191  * The binding table pointers are relative to the surface state base address,
 192  * which points at the batchbuffer containing the streamed batch state.
 193  */
 194 static void
 195 gen6_upload_binding_table_pointers(struct brw_context *brw)
 196 {
 197    BEGIN_BATCH(4);
 198    OUT_BATCH(_3DSTATE_BINDING_TABLE_POINTERS << 16 |
 199              GEN6_BINDING_TABLE_MODIFY_VS |
 200              GEN6_BINDING_TABLE_MODIFY_GS |
 201              GEN6_BINDING_TABLE_MODIFY_PS |
 202              (4 - 2));
 203    OUT_BATCH(brw->vs.base.bind_bo_offset); /* vs */
 204    OUT_BATCH(brw->ff_gs.bind_bo_offset); /* gs */
 205    OUT_BATCH(brw->wm.base.bind_bo_offset); /* wm/ps */
 206    ADVANCE_BATCH();
 207 }
 208
 209 const struct brw_tracked_state gen6_binding_table_pointers = {
 210    .dirty = {
 211       .mesa = 0,
 212       .brw = (BRW_NEW_BATCH |
 213               BRW_NEW_STATE_BASE_ADDRESS |
 214               BRW_NEW_VS_BINDING_TABLE |
 215               BRW_NEW_GS_BINDING_TABLE |
 216               BRW_NEW_PS_BINDING_TABLE),
 217       .cache = 0,
 218    },
 219    .emit = gen6_upload_binding_table_pointers,
 220 };
 221
 222 /* Gen7+ code lives in gen7_{vs,gs,wm}_state.c. */
 223
 224 /** @} */