src/mesa/drivers/dri/i965/brw_blorp.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_fbo.h"
  25
  26 #include "brw_blorp.h"
  27 #include "brw_defines.h"
  28 #include "gen6_blorp.h"
  29 #include "gen7_blorp.h"
  30
  31 brw_blorp_mip_info::brw_blorp_mip_info()
  32    : mt(NULL),
  33      level(0),
  34      layer(0)
  35 {
  36 }
  37
  38 brw_blorp_surface_info::brw_blorp_surface_info()
  39    : map_stencil_as_y_tiled(false),
  40      num_samples(0)
  41 {
  42 }
  43
  44 void
  45 brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
  46                         unsigned int level, unsigned int layer)
  47 {
  48    intel_miptree_check_level_layer(mt, level, layer);
  49
  50    this->mt = mt;
  51    this->level = level;
  52    this->layer = layer;
  53 }
  54
  55 void
  56 brw_blorp_surface_info::set(struct brw_context *brw,
  57                             struct intel_mipmap_tree *mt,
  58                             unsigned int level, unsigned int layer)
  59 {
  60    brw_blorp_mip_info::set(mt, level, layer);
  61    this->num_samples = mt->num_samples;
  62    this->array_spacing_lod0 = mt->array_spacing_lod0;
  63    this->map_stencil_as_y_tiled = false;
  64    this->msaa_layout = mt->msaa_layout;
  65
  66    switch (mt->format) {
  67    case MESA_FORMAT_S8:
  68       /* The miptree is a W-tiled stencil buffer.  Surface states can't be set
  69        * up for W tiling, so we'll need to use Y tiling and have the WM
  70        * program swizzle the coordinates.
  71        */
  72       this->map_stencil_as_y_tiled = true;
  73       this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM;
  74       break;
  75    case MESA_FORMAT_X8_Z24:
  76    case MESA_FORMAT_Z32_FLOAT:
  77       /* The miptree consists of 32 bits per pixel, arranged either as 24-bit
  78        * depth values interleaved with 8 "don't care" bits, or as 32-bit
  79        * floating point depth values.  Since depth values don't require any
  80        * blending, it doesn't matter how we interpret the bit pattern as long
  81        * as we copy the right amount of data, so just map it as 8-bit BGRA.
  82        */
  83       this->brw_surfaceformat = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  84       break;
  85    case MESA_FORMAT_Z16:
  86       /* The miptree consists of 16 bits per pixel of depth data.  Since depth
  87        * values don't require any blending, it doesn't matter how we interpret
  88        * the bit pattern as long as we copy the right amount of data, so just
  89        * map is as 8-bit RG.
  90        */
  91       this->brw_surfaceformat = BRW_SURFACEFORMAT_R8G8_UNORM;
  92       break;
  93    default:
  94       /* Blorp blits don't support any sort of format conversion, so we can
  95        * safely assume that the same format is being used for the source and
  96        * destination.  Therefore the format must be supported as a render
  97        * target, even if this is the source image.  So we can convert to a
  98        * surface format using brw->render_target_format.
  99        */
 100       assert(brw->format_supported_as_render_target[mt->format]);
 101       this->brw_surfaceformat = brw->render_target_format[mt->format];
 102       break;
 103    }
 104 }
 105
 106 void
 107 brw_blorp_mip_info::get_draw_offsets(uint32_t *draw_x, uint32_t *draw_y) const
 108 {
 109    /* Construct a dummy renderbuffer just to extract tile offsets. */
 110    struct intel_renderbuffer rb;
 111    rb.mt = mt;
 112    rb.mt_level = level;
 113    rb.mt_layer = layer;
 114    intel_renderbuffer_set_draw_offset(&rb);
 115    *draw_x = rb.draw_x;
 116    *draw_y = rb.draw_y;
 117 }
 118
 119 brw_blorp_params::brw_blorp_params()
 120    : x0(0),
 121      y0(0),
 122      x1(0),
 123      y1(0),
 124      depth_format(0),
 125      hiz_op(GEN6_HIZ_OP_NONE),
 126      num_samples(0),
 127      use_wm_prog(false)
 128 {
 129 }
 130
 131 extern "C" {
 132 void
 133 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
 134                unsigned int level, unsigned int layer, gen6_hiz_op op)
 135 {
 136    brw_hiz_op_params params(mt, level, layer, op);
 137    brw_blorp_exec(intel, &params);
 138 }
 139
 140 } /* extern "C" */
 141
 142 void
 143 brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params)
 144 {
 145    switch (intel->gen) {
 146    case 6:
 147       gen6_blorp_exec(intel, params);
 148       break;
 149    case 7:
 150       gen7_blorp_exec(intel, params);
 151       break;
 152    default:
 153       /* BLORP is not supported before Gen6. */
 154       assert(false);
 155       break;
 156    }
 157 }
 158
 159 brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
 160                                      unsigned int level,
 161                                      unsigned int layer,
 162                                      gen6_hiz_op op)
 163 {
 164    this->hiz_op = op;
 165
 166    depth.set(mt, level, layer);
 167    depth.get_miplevel_dims(&x1, &y1);
 168
 169    assert(mt->hiz_mt != NULL);
 170
 171    switch (mt->format) {
 172    case MESA_FORMAT_Z16:       depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
 173    case MESA_FORMAT_Z32_FLOAT: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break;
 174    case MESA_FORMAT_X8_Z24:    depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
 175    default:                    assert(0); break;
 176    }
 177 }
 178
 179 uint32_t
 180 brw_hiz_op_params::get_wm_prog(struct brw_context *brw,
 181                                brw_blorp_prog_data **prog_data) const
 182 {
 183    return 0;
 184 }