i965: Parameterize HiZ code to prepare for adding blitting.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "intel_fbo.h"
25
26 #include "brw_blorp.h"
27 #include "brw_defines.h"
28 #include "gen6_blorp.h"
29 #include "gen7_blorp.h"
30
31 brw_blorp_mip_info::brw_blorp_mip_info()
32 : mt(NULL),
33 level(0),
34 layer(0)
35 {
36 }
37
38 void
39 brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
40 unsigned int level, unsigned int layer)
41 {
42 intel_miptree_check_level_layer(mt, level, layer);
43
44 this->mt = mt;
45 this->level = level;
46 this->layer = layer;
47 }
48
49 void
50 brw_blorp_mip_info::get_draw_offsets(uint32_t *draw_x, uint32_t *draw_y) const
51 {
52 /* Construct a dummy renderbuffer just to extract tile offsets. */
53 struct intel_renderbuffer rb;
54 rb.mt = mt;
55 rb.mt_level = level;
56 rb.mt_layer = layer;
57 intel_renderbuffer_set_draw_offset(&rb);
58 *draw_x = rb.draw_x;
59 *draw_y = rb.draw_y;
60 }
61
62 brw_blorp_params::brw_blorp_params()
63 : x0(0),
64 y0(0),
65 x1(0),
66 y1(0),
67 depth_format(0),
68 hiz_op(GEN6_HIZ_OP_NONE)
69 {
70 }
71
72 void
73 brw_blorp_params::exec(struct intel_context *intel) const
74 {
75 switch (intel->gen) {
76 case 6:
77 gen6_blorp_exec(intel, this);
78 break;
79 case 7:
80 gen7_blorp_exec(intel, this);
81 break;
82 default:
83 /* BLORP is not supported before Gen6. */
84 assert(false);
85 break;
86 }
87 }
88
89 brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
90 unsigned int level,
91 unsigned int layer,
92 gen6_hiz_op op)
93 {
94 assert(op != GEN6_HIZ_OP_DEPTH_CLEAR); /* Not implemented yet. */
95 this->hiz_op = op;
96
97 depth.set(mt, level, layer);
98 depth.get_miplevel_dims(&x1, &y1);
99
100 assert(mt->hiz_mt != NULL);
101
102 switch (mt->format) {
103 case MESA_FORMAT_Z16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
104 case MESA_FORMAT_Z32_FLOAT: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break;
105 case MESA_FORMAT_X8_Z24: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
106 default: assert(0); break;
107 }
108 }