src/mesa/drivers/dri/i965/brw_blorp.cpp

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_fbo.h"
  25
  26 #include "brw_blorp.h"
  27 #include "brw_defines.h"
  28 #include "gen6_blorp.h"
  29 #include "gen7_blorp.h"
  30
  31 brw_blorp_mip_info::brw_blorp_mip_info()
  32    : mt(NULL),
  33      level(0),
  34      layer(0)
  35 {
  36 }
  37
  38 brw_blorp_surface_info::brw_blorp_surface_info()
  39    : map_stencil_as_y_tiled(false)
  40 {
  41 }
  42
  43 void
  44 brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
  45                         unsigned int level, unsigned int layer)
  46 {
  47    intel_miptree_check_level_layer(mt, level, layer);
  48
  49    this->mt = mt;
  50    this->level = level;
  51    this->layer = layer;
  52 }
  53
  54 void
  55 brw_blorp_surface_info::set(struct intel_mipmap_tree *mt,
  56                             unsigned int level, unsigned int layer)
  57 {
  58    brw_blorp_mip_info::set(mt, level, layer);
  59
  60    if (mt->format == MESA_FORMAT_S8) {
  61       /* The miptree is a W-tiled stencil buffer.  Surface states can't be set
  62        * up for W tiling, so we'll need to use Y tiling and have the WM
  63        * program swizzle the coordinates.
  64        */
  65       this->map_stencil_as_y_tiled = true;
  66    } else {
  67       this->map_stencil_as_y_tiled = false;
  68    }
  69 }
  70
  71 void
  72 brw_blorp_mip_info::get_draw_offsets(uint32_t *draw_x, uint32_t *draw_y) const
  73 {
  74    /* Construct a dummy renderbuffer just to extract tile offsets. */
  75    struct intel_renderbuffer rb;
  76    rb.mt = mt;
  77    rb.mt_level = level;
  78    rb.mt_layer = layer;
  79    intel_renderbuffer_set_draw_offset(&rb);
  80    *draw_x = rb.draw_x;
  81    *draw_y = rb.draw_y;
  82 }
  83
  84 brw_blorp_params::brw_blorp_params()
  85    : x0(0),
  86      y0(0),
  87      x1(0),
  88      y1(0),
  89      depth_format(0),
  90      hiz_op(GEN6_HIZ_OP_NONE),
  91      use_wm_prog(false)
  92 {
  93 }
  94
  95 void
  96 brw_blorp_params::exec(struct intel_context *intel) const
  97 {
  98    switch (intel->gen) {
  99    case 6:
 100       gen6_blorp_exec(intel, this);
 101       break;
 102    case 7:
 103       gen7_blorp_exec(intel, this);
 104       break;
 105    default:
 106       /* BLORP is not supported before Gen6. */
 107       assert(false);
 108       break;
 109    }
 110 }
 111
 112 brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
 113                                      unsigned int level,
 114                                      unsigned int layer,
 115                                      gen6_hiz_op op)
 116 {
 117    assert(op != GEN6_HIZ_OP_DEPTH_CLEAR); /* Not implemented yet. */
 118    this->hiz_op = op;
 119
 120    depth.set(mt, level, layer);
 121    depth.get_miplevel_dims(&x1, &y1);
 122
 123    assert(mt->hiz_mt != NULL);
 124
 125    switch (mt->format) {
 126    case MESA_FORMAT_Z16:       depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
 127    case MESA_FORMAT_Z32_FLOAT: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break;
 128    case MESA_FORMAT_X8_Z24:    depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
 129    default:                    assert(0); break;
 130    }
 131 }
 132
 133 uint32_t
 134 brw_hiz_op_params::get_wm_prog(struct brw_context *brw,
 135                                brw_blorp_prog_data **prog_data) const
 136 {
 137    return 0;
 138 }