2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
28 #include "brw_context.h"
29 #include "intel_mipmap_tree.h"
38 brw_blorp_blit_miptrees(struct intel_context
*intel
,
39 struct intel_mipmap_tree
*src_mt
,
40 unsigned src_level
, unsigned src_layer
,
41 struct intel_mipmap_tree
*dst_mt
,
42 unsigned dst_level
, unsigned dst_layer
,
43 float src_x0
, float src_y0
,
44 float src_x1
, float src_y1
,
45 float dst_x0
, float dst_y0
,
46 float dst_x1
, float dst_y1
,
47 bool mirror_x
, bool mirror_y
);
50 brw_blorp_clear_color(struct intel_context
*intel
, struct gl_framebuffer
*fb
,
54 } /* end extern "C" */
57 * Binding table indices used by BLORP.
60 BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX
,
61 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX
,
62 BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
66 class brw_blorp_mip_info
71 void set(struct intel_mipmap_tree
*mt
,
72 unsigned int level
, unsigned int layer
);
74 struct intel_mipmap_tree
*mt
;
77 * The miplevel to use.
82 * The 2D layer within the miplevel. Combined, level and layer define the
83 * 2D miptree slice to use.
88 * Width of the miplevel to be used. For surfaces using
89 * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
94 * Height of the miplevel to be used. For surfaces using
95 * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
100 * X offset within the surface to texture from (or render to). For
101 * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
107 * Y offset within the surface to texture from (or render to). For
108 * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
114 class brw_blorp_surface_info
: public brw_blorp_mip_info
117 brw_blorp_surface_info();
119 void set(struct brw_context
*brw
,
120 struct intel_mipmap_tree
*mt
,
121 unsigned int level
, unsigned int layer
);
123 uint32_t compute_tile_offsets(uint32_t *tile_x
, uint32_t *tile_y
) const;
125 /* Setting this flag indicates that the buffer's contents are W-tiled
126 * stencil data, but the surface state should be set up for Y tiled
127 * MESA_FORMAT_R8 data (this is necessary because surface states don't
130 * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
131 * MESA_FORMAT_R8 data are 128 pixels wide by 32 pixels high, the width and
132 * pitch stored in the surface state will be multiplied by 2, and the
133 * height will be halved. Also, since W and Y tiles store their data in a
134 * different order, the width and height will be rounded up to a multiple
135 * of the tile size, to ensure that the WM program can access the full
136 * width and height of the buffer.
138 bool map_stencil_as_y_tiled
;
140 unsigned num_samples
;
142 /* Setting this flag indicates that the surface should be set up in
143 * ARYSPC_LOD0 mode. Ignored prior to Gen7.
145 bool array_spacing_lod0
;
148 * Format that should be used when setting up the surface state for this
149 * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
151 uint32_t brw_surfaceformat
;
154 * For MSAA surfaces, MSAA layout that should be used when setting up the
155 * surface state for this surface.
157 intel_msaa_layout msaa_layout
;
161 struct brw_blorp_coord_transform_params
163 void setup(GLfloat src0
, GLfloat src1
, GLfloat dst0
, GLfloat dst1
,
171 struct brw_blorp_wm_push_constants
177 brw_blorp_coord_transform_params x_transform
;
178 brw_blorp_coord_transform_params y_transform
;
181 /* Every 32 bytes of push constant data constitutes one GEN register. */
182 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS
=
183 sizeof(brw_blorp_wm_push_constants
) / 32;
185 struct brw_blorp_prog_data
187 unsigned int first_curbe_grf
;
190 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
191 * than one sample per pixel.
193 bool persample_msaa_dispatch
;
197 enum gen7_fast_clear_op
{
198 GEN7_FAST_CLEAR_OP_NONE
,
199 GEN7_FAST_CLEAR_OP_FAST_CLEAR
,
203 class brw_blorp_params
208 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
209 brw_blorp_prog_data
**prog_data
) const = 0;
215 brw_blorp_mip_info depth
;
216 uint32_t depth_format
;
217 brw_blorp_surface_info src
;
218 brw_blorp_surface_info dst
;
219 enum gen6_hiz_op hiz_op
;
220 enum gen7_fast_clear_op fast_clear_op
;
221 unsigned num_samples
;
223 brw_blorp_wm_push_constants wm_push_consts
;
224 bool color_write_disable
[4];
229 brw_blorp_exec(struct intel_context
*intel
, const brw_blorp_params
*params
);
233 * Parameters for a HiZ or depth resolve operation.
235 * For an overview of HiZ ops, see the following sections of the Sandy Bridge
236 * PRM, Volume 1, Part 2:
237 * - 7.5.3.1 Depth Buffer Clear
238 * - 7.5.3.2 Depth Buffer Resolve
239 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
241 class brw_hiz_op_params
: public brw_blorp_params
244 brw_hiz_op_params(struct intel_mipmap_tree
*mt
,
245 unsigned int level
, unsigned int layer
,
248 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
249 brw_blorp_prog_data
**prog_data
) const;
252 struct brw_blorp_blit_prog_key
254 /* Number of samples per pixel that have been configured in the surface
255 * state for texturing from.
257 unsigned tex_samples
;
259 /* MSAA layout that has been configured in the surface state for texturing
262 intel_msaa_layout tex_layout
;
264 /* Actual number of samples per pixel in the source image. */
265 unsigned src_samples
;
267 /* Actual MSAA layout used by the source image. */
268 intel_msaa_layout src_layout
;
270 /* Number of samples per pixel that have been configured in the render
275 /* MSAA layout that has been configured in the render target. */
276 intel_msaa_layout rt_layout
;
278 /* Actual number of samples per pixel in the destination image. */
279 unsigned dst_samples
;
281 /* Actual MSAA layout used by the destination image. */
282 intel_msaa_layout dst_layout
;
284 /* Type of the data to be read from the texture (one of
285 * BRW_REGISTER_TYPE_{UD,D,F}).
287 unsigned texture_data_type
;
289 /* True if the source image is W tiled. If true, the surface state for the
290 * source image must be configured as Y tiled, and tex_samples must be 0.
294 /* True if the destination image is W tiled. If true, the surface state
295 * for the render target must be configured as Y tiled, and rt_samples must
300 /* True if all source samples should be blended together to produce each
301 * destination pixel. If true, src_tiled_w must be false, tex_samples must
302 * equal src_samples, and tex_samples must be nonzero.
306 /* True if the rectangle being sent through the rendering pipeline might be
307 * larger than the destination rectangle, so the WM program should kill any
308 * pixels that are outside the destination rectangle.
313 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
314 * than one sample per pixel.
316 bool persample_msaa_dispatch
;
319 class brw_blorp_blit_params
: public brw_blorp_params
322 brw_blorp_blit_params(struct brw_context
*brw
,
323 struct intel_mipmap_tree
*src_mt
,
324 unsigned src_level
, unsigned src_layer
,
325 struct intel_mipmap_tree
*dst_mt
,
326 unsigned dst_level
, unsigned dst_layer
,
327 GLfloat src_x0
, GLfloat src_y0
,
328 GLfloat src_x1
, GLfloat src_y1
,
329 GLfloat dst_x0
, GLfloat dst_y0
,
330 GLfloat dst_x1
, GLfloat dst_y1
,
331 bool mirror_x
, bool mirror_y
);
333 virtual uint32_t get_wm_prog(struct brw_context
*brw
,
334 brw_blorp_prog_data
**prog_data
) const;
337 brw_blorp_blit_prog_key wm_prog_key
;
341 * \name BLORP internals
344 * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
348 gen6_blorp_init(struct brw_context
*brw
);
351 gen6_blorp_emit_batch_head(struct brw_context
*brw
,
352 const brw_blorp_params
*params
);
355 gen6_blorp_emit_state_base_address(struct brw_context
*brw
,
356 const brw_blorp_params
*params
);
359 gen6_blorp_emit_vertices(struct brw_context
*brw
,
360 const brw_blorp_params
*params
);
363 gen6_blorp_emit_blend_state(struct brw_context
*brw
,
364 const brw_blorp_params
*params
);
367 gen6_blorp_emit_cc_state(struct brw_context
*brw
,
368 const brw_blorp_params
*params
);
371 gen6_blorp_emit_wm_constants(struct brw_context
*brw
,
372 const brw_blorp_params
*params
);
375 gen6_blorp_emit_vs_disable(struct brw_context
*brw
,
376 const brw_blorp_params
*params
);
379 gen6_blorp_emit_binding_table(struct brw_context
*brw
,
380 const brw_blorp_params
*params
,
381 uint32_t wm_surf_offset_renderbuffer
,
382 uint32_t wm_surf_offset_texture
);
385 gen6_blorp_emit_depth_stencil_state(struct brw_context
*brw
,
386 const brw_blorp_params
*params
);
389 gen6_blorp_emit_gs_disable(struct brw_context
*brw
,
390 const brw_blorp_params
*params
);
393 gen6_blorp_emit_clip_disable(struct brw_context
*brw
,
394 const brw_blorp_params
*params
);
397 gen6_blorp_emit_drawing_rectangle(struct brw_context
*brw
,
398 const brw_blorp_params
*params
);
401 #endif /* __cplusplus */