src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_context.h"
  29 #include "brw_reg.h"
  30 #include "intel_mipmap_tree.h"
  31
  32 struct brw_context;
  33
  34 #ifdef __cplusplus
  35 extern "C" {
  36 #endif
  37
  38 void
  39 brw_blorp_blit_miptrees(struct brw_context *brw,
  40                         struct intel_mipmap_tree *src_mt,
  41                         unsigned src_level, unsigned src_layer,
  42                         struct intel_mipmap_tree *dst_mt,
  43                         unsigned dst_level, unsigned dst_layer,
  44                         float src_x0, float src_y0,
  45                         float src_x1, float src_y1,
  46                         float dst_x0, float dst_y0,
  47                         float dst_x1, float dst_y1,
  48                         GLenum filter, bool mirror_x, bool mirror_y);
  49
  50 bool
  51 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
  52                       GLbitfield mask, bool partial_clear);
  53
  54 void
  55 brw_blorp_resolve_color(struct brw_context *brw,
  56                         struct intel_mipmap_tree *mt);
  57
  58 #ifdef __cplusplus
  59 } /* end extern "C" */
  60
  61 /**
  62  * Binding table indices used by BLORP.
  63  */
  64 enum {
  65    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  66    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  67    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  68 };
  69
  70
  71 class brw_blorp_mip_info
  72 {
  73 public:
  74    brw_blorp_mip_info();
  75
  76    void set(struct intel_mipmap_tree *mt,
  77             unsigned int level, unsigned int layer);
  78
  79    struct intel_mipmap_tree *mt;
  80
  81    /**
  82     * The miplevel to use.
  83     */
  84    uint32_t level;
  85
  86    /**
  87     * The 2D layer within the miplevel. Combined, level and layer define the
  88     * 2D miptree slice to use.
  89     *
  90     * Note: if mt is a 2D multisample array texture on Gen7+ using
  91     * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
  92     * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
  93     * logical layer n corresponds to layer == 4*n.
  94     */
  95    uint32_t layer;
  96
  97    /**
  98     * Width of the miplevel to be used.  For surfaces using
  99     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
 100     */
 101    uint32_t width;
 102
 103    /**
 104     * Height of the miplevel to be used.  For surfaces using
 105     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
 106     */
 107    uint32_t height;
 108
 109    /**
 110     * X offset within the surface to texture from (or render to).  For
 111     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 112     * pixels.
 113     */
 114    uint32_t x_offset;
 115
 116    /**
 117     * Y offset within the surface to texture from (or render to).  For
 118     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 119     * pixels.
 120     */
 121    uint32_t y_offset;
 122 };
 123
 124 class brw_blorp_surface_info : public brw_blorp_mip_info
 125 {
 126 public:
 127    brw_blorp_surface_info();
 128
 129    void set(struct brw_context *brw,
 130             struct intel_mipmap_tree *mt,
 131             unsigned int level, unsigned int layer,
 132             bool is_render_target);
 133
 134    uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
 135
 136    /* Setting this flag indicates that the buffer's contents are W-tiled
 137     * stencil data, but the surface state should be set up for Y tiled
 138     * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
 139     * support W tiling).
 140     *
 141     * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
 142     * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
 143     * pitch stored in the surface state will be multiplied by 2, and the
 144     * height will be halved.  Also, since W and Y tiles store their data in a
 145     * different order, the width and height will be rounded up to a multiple
 146     * of the tile size, to ensure that the WM program can access the full
 147     * width and height of the buffer.
 148     */
 149    bool map_stencil_as_y_tiled;
 150
 151    unsigned num_samples;
 152
 153    /* Setting this flag indicates that the surface should be set up in
 154     * ARYSPC_LOD0 mode.  Ignored prior to Gen7.
 155     */
 156    bool array_spacing_lod0;
 157
 158    /**
 159     * Format that should be used when setting up the surface state for this
 160     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
 161     */
 162    uint32_t brw_surfaceformat;
 163
 164    /**
 165     * For MSAA surfaces, MSAA layout that should be used when setting up the
 166     * surface state for this surface.
 167     */
 168    intel_msaa_layout msaa_layout;
 169 };
 170
 171
 172 struct brw_blorp_coord_transform_params
 173 {
 174    void setup(GLfloat src0, GLfloat src1, GLfloat dst0, GLfloat dst1,
 175               bool mirror);
 176
 177    float multiplier;
 178    float offset;
 179 };
 180
 181
 182 struct brw_blorp_wm_push_constants
 183 {
 184    uint32_t dst_x0;
 185    uint32_t dst_x1;
 186    uint32_t dst_y0;
 187    uint32_t dst_y1;
 188    /* Top right coordinates of the rectangular grid used for scaled blitting */
 189    float rect_grid_x1;
 190    float rect_grid_y1;
 191    brw_blorp_coord_transform_params x_transform;
 192    brw_blorp_coord_transform_params y_transform;
 193    /* Pad out to an integral number of registers */
 194    uint32_t pad[6];
 195 };
 196
 197 /* Every 32 bytes of push constant data constitutes one GEN register. */
 198 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
 199    sizeof(brw_blorp_wm_push_constants) / 32;
 200
 201 struct brw_blorp_prog_data
 202 {
 203    unsigned int first_curbe_grf;
 204
 205    /**
 206     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 207     * than one sample per pixel.
 208     */
 209    bool persample_msaa_dispatch;
 210 };
 211
 212
 213 enum gen7_fast_clear_op {
 214    GEN7_FAST_CLEAR_OP_NONE,
 215    GEN7_FAST_CLEAR_OP_FAST_CLEAR,
 216    GEN7_FAST_CLEAR_OP_RESOLVE,
 217 };
 218
 219
 220 class brw_blorp_params
 221 {
 222 public:
 223    brw_blorp_params();
 224
 225    virtual uint32_t get_wm_prog(struct brw_context *brw,
 226                                 brw_blorp_prog_data **prog_data) const = 0;
 227
 228    uint32_t x0;
 229    uint32_t y0;
 230    uint32_t x1;
 231    uint32_t y1;
 232    brw_blorp_mip_info depth;
 233    uint32_t depth_format;
 234    brw_blorp_surface_info src;
 235    brw_blorp_surface_info dst;
 236    enum gen6_hiz_op hiz_op;
 237    enum gen7_fast_clear_op fast_clear_op;
 238    bool use_wm_prog;
 239    brw_blorp_wm_push_constants wm_push_consts;
 240    bool color_write_disable[4];
 241 };
 242
 243
 244 void
 245 brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
 246
 247
 248 /**
 249  * Parameters for a HiZ or depth resolve operation.
 250  *
 251  * For an overview of HiZ ops, see the following sections of the Sandy Bridge
 252  * PRM, Volume 1, Part 2:
 253  *   - 7.5.3.1 Depth Buffer Clear
 254  *   - 7.5.3.2 Depth Buffer Resolve
 255  *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
 256  */
 257 class brw_hiz_op_params : public brw_blorp_params
 258 {
 259 public:
 260    brw_hiz_op_params(struct intel_mipmap_tree *mt,
 261                      unsigned int level, unsigned int layer,
 262                      gen6_hiz_op op);
 263
 264    virtual uint32_t get_wm_prog(struct brw_context *brw,
 265                                 brw_blorp_prog_data **prog_data) const;
 266 };
 267
 268 struct brw_blorp_blit_prog_key
 269 {
 270    /* Number of samples per pixel that have been configured in the surface
 271     * state for texturing from.
 272     */
 273    unsigned tex_samples;
 274
 275    /* MSAA layout that has been configured in the surface state for texturing
 276     * from.
 277     */
 278    intel_msaa_layout tex_layout;
 279
 280    /* Actual number of samples per pixel in the source image. */
 281    unsigned src_samples;
 282
 283    /* Actual MSAA layout used by the source image. */
 284    intel_msaa_layout src_layout;
 285
 286    /* Number of samples per pixel that have been configured in the render
 287     * target.
 288     */
 289    unsigned rt_samples;
 290
 291    /* MSAA layout that has been configured in the render target. */
 292    intel_msaa_layout rt_layout;
 293
 294    /* Actual number of samples per pixel in the destination image. */
 295    unsigned dst_samples;
 296
 297    /* Actual MSAA layout used by the destination image. */
 298    intel_msaa_layout dst_layout;
 299
 300    /* Type of the data to be read from the texture (one of
 301     * BRW_REGISTER_TYPE_{UD,D,F}).
 302     */
 303    enum brw_reg_type texture_data_type;
 304
 305    /* True if the source image is W tiled.  If true, the surface state for the
 306     * source image must be configured as Y tiled, and tex_samples must be 0.
 307     */
 308    bool src_tiled_w;
 309
 310    /* True if the destination image is W tiled.  If true, the surface state
 311     * for the render target must be configured as Y tiled, and rt_samples must
 312     * be 0.
 313     */
 314    bool dst_tiled_w;
 315
 316    /* True if all source samples should be blended together to produce each
 317     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 318     * equal src_samples, and tex_samples must be nonzero.
 319     */
 320    bool blend;
 321
 322    /* True if the rectangle being sent through the rendering pipeline might be
 323     * larger than the destination rectangle, so the WM program should kill any
 324     * pixels that are outside the destination rectangle.
 325     */
 326    bool use_kill;
 327
 328    /**
 329     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 330     * than one sample per pixel.
 331     */
 332    bool persample_msaa_dispatch;
 333
 334    /* True for scaled blitting. */
 335    bool blit_scaled;
 336
 337    /* Scale factors between the pixel grid and the grid of samples. We're
 338     * using grid of samples for bilinear filetring in multisample scaled blits.
 339     */
 340    float x_scale;
 341    float y_scale;
 342
 343    /* True for blits with filter = GL_LINEAR. */
 344    bool bilinear_filter;
 345 };
 346
 347 class brw_blorp_blit_params : public brw_blorp_params
 348 {
 349 public:
 350    brw_blorp_blit_params(struct brw_context *brw,
 351                          struct intel_mipmap_tree *src_mt,
 352                          unsigned src_level, unsigned src_layer,
 353                          struct intel_mipmap_tree *dst_mt,
 354                          unsigned dst_level, unsigned dst_layer,
 355                          GLfloat src_x0, GLfloat src_y0,
 356                          GLfloat src_x1, GLfloat src_y1,
 357                          GLfloat dst_x0, GLfloat dst_y0,
 358                          GLfloat dst_x1, GLfloat dst_y1,
 359                          GLenum filter, bool mirror_x, bool mirror_y);
 360
 361    virtual uint32_t get_wm_prog(struct brw_context *brw,
 362                                 brw_blorp_prog_data **prog_data) const;
 363
 364 private:
 365    brw_blorp_blit_prog_key wm_prog_key;
 366 };
 367
 368 /**
 369  * \name BLORP internals
 370  * \{
 371  *
 372  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 373  */
 374
 375 void
 376 gen6_blorp_init(struct brw_context *brw);
 377
 378 void
 379 gen6_blorp_emit_state_base_address(struct brw_context *brw,
 380                                    const brw_blorp_params *params);
 381
 382 void
 383 gen6_blorp_emit_vertices(struct brw_context *brw,
 384                          const brw_blorp_params *params);
 385
 386 uint32_t
 387 gen6_blorp_emit_blend_state(struct brw_context *brw,
 388                             const brw_blorp_params *params);
 389
 390 uint32_t
 391 gen6_blorp_emit_cc_state(struct brw_context *brw,
 392                          const brw_blorp_params *params);
 393
 394 uint32_t
 395 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 396                              const brw_blorp_params *params);
 397
 398 void
 399 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 400                            const brw_blorp_params *params);
 401
 402 uint32_t
 403 gen6_blorp_emit_binding_table(struct brw_context *brw,
 404                               const brw_blorp_params *params,
 405                               uint32_t wm_surf_offset_renderbuffer,
 406                               uint32_t wm_surf_offset_texture);
 407
 408 uint32_t
 409 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 410                                     const brw_blorp_params *params);
 411
 412 void
 413 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 414                            const brw_blorp_params *params);
 415
 416 void
 417 gen6_blorp_emit_clip_disable(struct brw_context *brw,
 418                              const brw_blorp_params *params);
 419
 420 void
 421 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 422                                   const brw_blorp_params *params);
 423
 424 uint32_t
 425 gen6_blorp_emit_sampler_state(struct brw_context *brw,
 426                               const brw_blorp_params *params);
 427 /** \} */
 428
 429 #endif /* __cplusplus */