src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_context.h"
  29 #include "intel_mipmap_tree.h"
  30
  31 struct brw_context;
  32
  33 #ifdef __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 void
  38 brw_blorp_blit_miptrees(struct brw_context *brw,
  39                         struct intel_mipmap_tree *src_mt,
  40                         unsigned src_level, unsigned src_layer,
  41                         struct intel_mipmap_tree *dst_mt,
  42                         unsigned dst_level, unsigned dst_layer,
  43                         float src_x0, float src_y0,
  44                         float src_x1, float src_y1,
  45                         float dst_x0, float dst_y0,
  46                         float dst_x1, float dst_y1,
  47                         GLenum filter, bool mirror_x, bool mirror_y);
  48
  49 bool
  50 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
  51                       bool partial_clear);
  52
  53 void
  54 brw_blorp_resolve_color(struct brw_context *brw,
  55                         struct intel_mipmap_tree *mt);
  56
  57 #ifdef __cplusplus
  58 } /* end extern "C" */
  59
  60 /**
  61  * Binding table indices used by BLORP.
  62  */
  63 enum {
  64    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  65    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  66    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  67 };
  68
  69
  70 class brw_blorp_mip_info
  71 {
  72 public:
  73    brw_blorp_mip_info();
  74
  75    void set(struct intel_mipmap_tree *mt,
  76             unsigned int level, unsigned int layer);
  77
  78    struct intel_mipmap_tree *mt;
  79
  80    /**
  81     * The miplevel to use.
  82     */
  83    uint32_t level;
  84
  85    /**
  86     * The 2D layer within the miplevel. Combined, level and layer define the
  87     * 2D miptree slice to use.
  88     *
  89     * Note: if mt is a 2D multisample array texture on Gen7+ using
  90     * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
  91     * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
  92     * logical layer n corresponds to layer == 4*n.
  93     */
  94    uint32_t layer;
  95
  96    /**
  97     * Width of the miplevel to be used.  For surfaces using
  98     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  99     */
 100    uint32_t width;
 101
 102    /**
 103     * Height of the miplevel to be used.  For surfaces using
 104     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
 105     */
 106    uint32_t height;
 107
 108    /**
 109     * X offset within the surface to texture from (or render to).  For
 110     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 111     * pixels.
 112     */
 113    uint32_t x_offset;
 114
 115    /**
 116     * Y offset within the surface to texture from (or render to).  For
 117     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 118     * pixels.
 119     */
 120    uint32_t y_offset;
 121 };
 122
 123 class brw_blorp_surface_info : public brw_blorp_mip_info
 124 {
 125 public:
 126    brw_blorp_surface_info();
 127
 128    void set(struct brw_context *brw,
 129             struct intel_mipmap_tree *mt,
 130             unsigned int level, unsigned int layer,
 131             bool is_render_target);
 132
 133    uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
 134
 135    /* Setting this flag indicates that the buffer's contents are W-tiled
 136     * stencil data, but the surface state should be set up for Y tiled
 137     * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
 138     * support W tiling).
 139     *
 140     * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
 141     * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
 142     * pitch stored in the surface state will be multiplied by 2, and the
 143     * height will be halved.  Also, since W and Y tiles store their data in a
 144     * different order, the width and height will be rounded up to a multiple
 145     * of the tile size, to ensure that the WM program can access the full
 146     * width and height of the buffer.
 147     */
 148    bool map_stencil_as_y_tiled;
 149
 150    unsigned num_samples;
 151
 152    /* Setting this flag indicates that the surface should be set up in
 153     * ARYSPC_LOD0 mode.  Ignored prior to Gen7.
 154     */
 155    bool array_spacing_lod0;
 156
 157    /**
 158     * Format that should be used when setting up the surface state for this
 159     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
 160     */
 161    uint32_t brw_surfaceformat;
 162
 163    /**
 164     * For MSAA surfaces, MSAA layout that should be used when setting up the
 165     * surface state for this surface.
 166     */
 167    intel_msaa_layout msaa_layout;
 168 };
 169
 170
 171 struct brw_blorp_coord_transform_params
 172 {
 173    void setup(GLfloat src0, GLfloat src1, GLfloat dst0, GLfloat dst1,
 174               bool mirror);
 175
 176    float multiplier;
 177    float offset;
 178 };
 179
 180
 181 struct brw_blorp_wm_push_constants
 182 {
 183    uint32_t dst_x0;
 184    uint32_t dst_x1;
 185    uint32_t dst_y0;
 186    uint32_t dst_y1;
 187    /* Top right coordinates of the rectangular grid used for scaled blitting */
 188    float rect_grid_x1;
 189    float rect_grid_y1;
 190    brw_blorp_coord_transform_params x_transform;
 191    brw_blorp_coord_transform_params y_transform;
 192    /* Pad out to an integral number of registers */
 193    uint32_t pad[6];
 194 };
 195
 196 /* Every 32 bytes of push constant data constitutes one GEN register. */
 197 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
 198    sizeof(brw_blorp_wm_push_constants) / 32;
 199
 200 struct brw_blorp_prog_data
 201 {
 202    unsigned int first_curbe_grf;
 203
 204    /**
 205     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 206     * than one sample per pixel.
 207     */
 208    bool persample_msaa_dispatch;
 209 };
 210
 211
 212 enum gen7_fast_clear_op {
 213    GEN7_FAST_CLEAR_OP_NONE,
 214    GEN7_FAST_CLEAR_OP_FAST_CLEAR,
 215    GEN7_FAST_CLEAR_OP_RESOLVE,
 216 };
 217
 218
 219 class brw_blorp_params
 220 {
 221 public:
 222    brw_blorp_params();
 223
 224    virtual uint32_t get_wm_prog(struct brw_context *brw,
 225                                 brw_blorp_prog_data **prog_data) const = 0;
 226
 227    uint32_t x0;
 228    uint32_t y0;
 229    uint32_t x1;
 230    uint32_t y1;
 231    brw_blorp_mip_info depth;
 232    uint32_t depth_format;
 233    brw_blorp_surface_info src;
 234    brw_blorp_surface_info dst;
 235    enum gen6_hiz_op hiz_op;
 236    enum gen7_fast_clear_op fast_clear_op;
 237    bool use_wm_prog;
 238    brw_blorp_wm_push_constants wm_push_consts;
 239    bool color_write_disable[4];
 240 };
 241
 242
 243 void
 244 brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
 245
 246
 247 /**
 248  * Parameters for a HiZ or depth resolve operation.
 249  *
 250  * For an overview of HiZ ops, see the following sections of the Sandy Bridge
 251  * PRM, Volume 1, Part 2:
 252  *   - 7.5.3.1 Depth Buffer Clear
 253  *   - 7.5.3.2 Depth Buffer Resolve
 254  *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
 255  */
 256 class brw_hiz_op_params : public brw_blorp_params
 257 {
 258 public:
 259    brw_hiz_op_params(struct intel_mipmap_tree *mt,
 260                      unsigned int level, unsigned int layer,
 261                      gen6_hiz_op op);
 262
 263    virtual uint32_t get_wm_prog(struct brw_context *brw,
 264                                 brw_blorp_prog_data **prog_data) const;
 265 };
 266
 267 struct brw_blorp_blit_prog_key
 268 {
 269    /* Number of samples per pixel that have been configured in the surface
 270     * state for texturing from.
 271     */
 272    unsigned tex_samples;
 273
 274    /* MSAA layout that has been configured in the surface state for texturing
 275     * from.
 276     */
 277    intel_msaa_layout tex_layout;
 278
 279    /* Actual number of samples per pixel in the source image. */
 280    unsigned src_samples;
 281
 282    /* Actual MSAA layout used by the source image. */
 283    intel_msaa_layout src_layout;
 284
 285    /* Number of samples per pixel that have been configured in the render
 286     * target.
 287     */
 288    unsigned rt_samples;
 289
 290    /* MSAA layout that has been configured in the render target. */
 291    intel_msaa_layout rt_layout;
 292
 293    /* Actual number of samples per pixel in the destination image. */
 294    unsigned dst_samples;
 295
 296    /* Actual MSAA layout used by the destination image. */
 297    intel_msaa_layout dst_layout;
 298
 299    /* Type of the data to be read from the texture (one of
 300     * BRW_REGISTER_TYPE_{UD,D,F}).
 301     */
 302    unsigned texture_data_type;
 303
 304    /* True if the source image is W tiled.  If true, the surface state for the
 305     * source image must be configured as Y tiled, and tex_samples must be 0.
 306     */
 307    bool src_tiled_w;
 308
 309    /* True if the destination image is W tiled.  If true, the surface state
 310     * for the render target must be configured as Y tiled, and rt_samples must
 311     * be 0.
 312     */
 313    bool dst_tiled_w;
 314
 315    /* True if all source samples should be blended together to produce each
 316     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 317     * equal src_samples, and tex_samples must be nonzero.
 318     */
 319    bool blend;
 320
 321    /* True if the rectangle being sent through the rendering pipeline might be
 322     * larger than the destination rectangle, so the WM program should kill any
 323     * pixels that are outside the destination rectangle.
 324     */
 325    bool use_kill;
 326
 327    /**
 328     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 329     * than one sample per pixel.
 330     */
 331    bool persample_msaa_dispatch;
 332
 333    /* True for scaled blitting. */
 334    bool blit_scaled;
 335
 336    /* Scale factors between the pixel grid and the grid of samples. We're
 337     * using grid of samples for bilinear filetring in multisample scaled blits.
 338     */
 339    float x_scale;
 340    float y_scale;
 341
 342    /* True for blits with filter = GL_LINEAR. */
 343    bool bilinear_filter;
 344 };
 345
 346 class brw_blorp_blit_params : public brw_blorp_params
 347 {
 348 public:
 349    brw_blorp_blit_params(struct brw_context *brw,
 350                          struct intel_mipmap_tree *src_mt,
 351                          unsigned src_level, unsigned src_layer,
 352                          struct intel_mipmap_tree *dst_mt,
 353                          unsigned dst_level, unsigned dst_layer,
 354                          GLfloat src_x0, GLfloat src_y0,
 355                          GLfloat src_x1, GLfloat src_y1,
 356                          GLfloat dst_x0, GLfloat dst_y0,
 357                          GLfloat dst_x1, GLfloat dst_y1,
 358                          GLenum filter, bool mirror_x, bool mirror_y);
 359
 360    virtual uint32_t get_wm_prog(struct brw_context *brw,
 361                                 brw_blorp_prog_data **prog_data) const;
 362
 363 private:
 364    brw_blorp_blit_prog_key wm_prog_key;
 365 };
 366
 367 /**
 368  * \name BLORP internals
 369  * \{
 370  *
 371  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 372  */
 373
 374 void
 375 gen6_blorp_init(struct brw_context *brw);
 376
 377 void
 378 gen6_blorp_emit_state_base_address(struct brw_context *brw,
 379                                    const brw_blorp_params *params);
 380
 381 void
 382 gen6_blorp_emit_vertices(struct brw_context *brw,
 383                          const brw_blorp_params *params);
 384
 385 uint32_t
 386 gen6_blorp_emit_blend_state(struct brw_context *brw,
 387                             const brw_blorp_params *params);
 388
 389 uint32_t
 390 gen6_blorp_emit_cc_state(struct brw_context *brw,
 391                          const brw_blorp_params *params);
 392
 393 uint32_t
 394 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 395                              const brw_blorp_params *params);
 396
 397 void
 398 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 399                            const brw_blorp_params *params);
 400
 401 uint32_t
 402 gen6_blorp_emit_binding_table(struct brw_context *brw,
 403                               const brw_blorp_params *params,
 404                               uint32_t wm_surf_offset_renderbuffer,
 405                               uint32_t wm_surf_offset_texture);
 406
 407 uint32_t
 408 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 409                                     const brw_blorp_params *params);
 410
 411 void
 412 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 413                            const brw_blorp_params *params);
 414
 415 void
 416 gen6_blorp_emit_clip_disable(struct brw_context *brw,
 417                              const brw_blorp_params *params);
 418
 419 void
 420 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 421                                   const brw_blorp_params *params);
 422 /** \} */
 423
 424 #endif /* __cplusplus */