i965: Add function brw_blorp_blit_miptrees
[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp.h
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #pragma once
25
26 #include <stdint.h>
27
28 #include "brw_context.h"
29 #include "intel_mipmap_tree.h"
30
31 struct brw_context;
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 void
38 brw_blorp_blit_miptrees(struct intel_context *intel,
39 struct intel_mipmap_tree *src_mt,
40 struct intel_mipmap_tree *dst_mt,
41 int src_x0, int src_y0,
42 int dst_x0, int dst_y0,
43 int dst_x1, int dst_y1,
44 bool mirror_x, bool mirror_y);
45
46 #ifdef __cplusplus
47 } /* end extern "C" */
48
49 /**
50 * Binding table indices used by BLORP.
51 */
52 enum {
53 BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
54 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
55 BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
56 };
57
58
59 class brw_blorp_mip_info
60 {
61 public:
62 brw_blorp_mip_info();
63
64 void set(struct intel_mipmap_tree *mt,
65 unsigned int level, unsigned int layer);
66 void get_draw_offsets(uint32_t *draw_x, uint32_t *draw_y) const;
67
68 void get_miplevel_dims(uint32_t *width, uint32_t *height) const
69 {
70 *width = mt->level[level].width;
71 *height = mt->level[level].height;
72 }
73
74 struct intel_mipmap_tree *mt;
75 unsigned int level;
76 unsigned int layer;
77 };
78
79 class brw_blorp_surface_info : public brw_blorp_mip_info
80 {
81 public:
82 brw_blorp_surface_info();
83
84 void set(struct brw_context *brw,
85 struct intel_mipmap_tree *mt,
86 unsigned int level, unsigned int layer);
87
88 /* Setting this flag indicates that the buffer's contents are W-tiled
89 * stencil data, but the surface state should be set up for Y tiled
90 * MESA_FORMAT_R8 data (this is necessary because surface states don't
91 * support W tiling).
92 *
93 * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
94 * MESA_FORMAT_R8 data are 128 pixels wide by 32 pixels high, the width and
95 * pitch stored in the surface state will be multiplied by 2, and the
96 * height will be halved. Also, since W and Y tiles store their data in a
97 * different order, the width and height will be rounded up to a multiple
98 * of the tile size, to ensure that the WM program can access the full
99 * width and height of the buffer.
100 */
101 bool map_stencil_as_y_tiled;
102
103 unsigned num_samples;
104
105 /* Setting this flag indicates that the surface should be set up in
106 * ARYSPC_LOD0 mode. Ignored prior to Gen7.
107 */
108 bool array_spacing_lod0;
109
110 /**
111 * Format that should be used when setting up the surface state for this
112 * surface. Should correspond to one of the BRW_SURFACEFORMAT_* enums.
113 */
114 uint32_t brw_surfaceformat;
115
116 /**
117 * For MSAA surfaces, MSAA layout that should be used when setting up the
118 * surface state for this surface.
119 */
120 intel_msaa_layout msaa_layout;
121 };
122
123
124 struct brw_blorp_coord_transform_params
125 {
126 void setup(GLuint src0, GLuint dst0, GLuint dst1,
127 bool mirror);
128
129 int16_t multiplier;
130 int16_t offset;
131 };
132
133
134 struct brw_blorp_wm_push_constants
135 {
136 uint16_t dst_x0;
137 uint16_t dst_x1;
138 uint16_t dst_y0;
139 uint16_t dst_y1;
140 brw_blorp_coord_transform_params x_transform;
141 brw_blorp_coord_transform_params y_transform;
142
143 /* Pad out to an integral number of registers */
144 uint16_t pad[8];
145 };
146
147 /* Every 32 bytes of push constant data constitutes one GEN register. */
148 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
149 sizeof(brw_blorp_wm_push_constants) / 32;
150
151 struct brw_blorp_prog_data
152 {
153 unsigned int first_curbe_grf;
154
155 /**
156 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
157 * than one sample per pixel.
158 */
159 bool persample_msaa_dispatch;
160 };
161
162 class brw_blorp_params
163 {
164 public:
165 brw_blorp_params();
166
167 virtual uint32_t get_wm_prog(struct brw_context *brw,
168 brw_blorp_prog_data **prog_data) const = 0;
169
170 uint32_t x0;
171 uint32_t y0;
172 uint32_t x1;
173 uint32_t y1;
174 brw_blorp_mip_info depth;
175 uint32_t depth_format;
176 brw_blorp_surface_info src;
177 brw_blorp_surface_info dst;
178 enum gen6_hiz_op hiz_op;
179 unsigned num_samples;
180 bool use_wm_prog;
181 brw_blorp_wm_push_constants wm_push_consts;
182 };
183
184
185 void
186 brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params);
187
188
189 /**
190 * Parameters for a HiZ or depth resolve operation.
191 *
192 * For an overview of HiZ ops, see the following sections of the Sandy Bridge
193 * PRM, Volume 1, Part 2:
194 * - 7.5.3.1 Depth Buffer Clear
195 * - 7.5.3.2 Depth Buffer Resolve
196 * - 7.5.3.3 Hierarchical Depth Buffer Resolve
197 */
198 class brw_hiz_op_params : public brw_blorp_params
199 {
200 public:
201 brw_hiz_op_params(struct intel_mipmap_tree *mt,
202 unsigned int level, unsigned int layer,
203 gen6_hiz_op op);
204
205 virtual uint32_t get_wm_prog(struct brw_context *brw,
206 brw_blorp_prog_data **prog_data) const;
207 };
208
209 struct brw_blorp_blit_prog_key
210 {
211 /* Number of samples per pixel that have been configured in the surface
212 * state for texturing from.
213 */
214 unsigned tex_samples;
215
216 /* MSAA layout that has been configured in the surface state for texturing
217 * from.
218 */
219 intel_msaa_layout tex_layout;
220
221 /* Actual number of samples per pixel in the source image. */
222 unsigned src_samples;
223
224 /* Actual MSAA layout used by the source image. */
225 intel_msaa_layout src_layout;
226
227 /* Number of samples per pixel that have been configured in the render
228 * target.
229 */
230 unsigned rt_samples;
231
232 /* MSAA layout that has been configured in the render target. */
233 intel_msaa_layout rt_layout;
234
235 /* Actual number of samples per pixel in the destination image. */
236 unsigned dst_samples;
237
238 /* Actual MSAA layout used by the destination image. */
239 intel_msaa_layout dst_layout;
240
241 /* Type of the data to be read from the texture (one of
242 * BRW_REGISTER_TYPE_{UD,D,F}).
243 */
244 unsigned texture_data_type;
245
246 /* True if the source image is W tiled. If true, the surface state for the
247 * source image must be configured as Y tiled, and tex_samples must be 0.
248 */
249 bool src_tiled_w;
250
251 /* True if the destination image is W tiled. If true, the surface state
252 * for the render target must be configured as Y tiled, and rt_samples must
253 * be 0.
254 */
255 bool dst_tiled_w;
256
257 /* True if all source samples should be blended together to produce each
258 * destination pixel. If true, src_tiled_w must be false, tex_samples must
259 * equal src_samples, and tex_samples must be nonzero.
260 */
261 bool blend;
262
263 /* True if the rectangle being sent through the rendering pipeline might be
264 * larger than the destination rectangle, so the WM program should kill any
265 * pixels that are outside the destination rectangle.
266 */
267 bool use_kill;
268
269 /**
270 * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
271 * than one sample per pixel.
272 */
273 bool persample_msaa_dispatch;
274 };
275
276 class brw_blorp_blit_params : public brw_blorp_params
277 {
278 public:
279 brw_blorp_blit_params(struct brw_context *brw,
280 struct intel_mipmap_tree *src_mt,
281 struct intel_mipmap_tree *dst_mt,
282 GLuint src_x0, GLuint src_y0,
283 GLuint dst_x0, GLuint dst_y0,
284 GLuint width, GLuint height,
285 bool mirror_x, bool mirror_y);
286
287 virtual uint32_t get_wm_prog(struct brw_context *brw,
288 brw_blorp_prog_data **prog_data) const;
289
290 private:
291 brw_blorp_blit_prog_key wm_prog_key;
292 };
293
294 /**
295 * \name BLORP internals
296 * \{
297 *
298 * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
299 */
300
301 void
302 gen6_blorp_init(struct brw_context *brw);
303
304 void
305 gen6_blorp_compute_tile_masks(const brw_blorp_params *params,
306 uint32_t *tile_mask_x, uint32_t *tile_mask_y);
307
308 void
309 gen6_blorp_emit_batch_head(struct brw_context *brw,
310 const brw_blorp_params *params);
311
312 void
313 gen6_blorp_emit_state_base_address(struct brw_context *brw,
314 const brw_blorp_params *params);
315
316 void
317 gen6_blorp_emit_vertices(struct brw_context *brw,
318 const brw_blorp_params *params);
319
320 uint32_t
321 gen6_blorp_emit_blend_state(struct brw_context *brw,
322 const brw_blorp_params *params);
323
324 uint32_t
325 gen6_blorp_emit_cc_state(struct brw_context *brw,
326 const brw_blorp_params *params);
327
328 uint32_t
329 gen6_blorp_emit_wm_constants(struct brw_context *brw,
330 const brw_blorp_params *params);
331
332 void
333 gen6_blorp_emit_vs_disable(struct brw_context *brw,
334 const brw_blorp_params *params);
335
336 uint32_t
337 gen6_blorp_emit_binding_table(struct brw_context *brw,
338 const brw_blorp_params *params,
339 uint32_t wm_surf_offset_renderbuffer,
340 uint32_t wm_surf_offset_texture);
341
342 uint32_t
343 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
344 const brw_blorp_params *params);
345
346 void
347 gen6_blorp_emit_gs_disable(struct brw_context *brw,
348 const brw_blorp_params *params);
349
350 void
351 gen6_blorp_emit_clip_disable(struct brw_context *brw,
352 const brw_blorp_params *params);
353
354 void
355 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
356 const brw_blorp_params *params);
357 /** \} */
358
359 #endif /* __cplusplus */