src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_context.h"
  29 #include "intel_mipmap_tree.h"
  30
  31 struct brw_context;
  32
  33
  34 /**
  35  * Binding table indices used by BLORP.
  36  */
  37 enum {
  38    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  39    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  40    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  41 };
  42
  43
  44 class brw_blorp_mip_info
  45 {
  46 public:
  47    brw_blorp_mip_info();
  48
  49    void set(struct intel_mipmap_tree *mt,
  50             unsigned int level, unsigned int layer);
  51    void get_draw_offsets(uint32_t *draw_x, uint32_t *draw_y) const;
  52
  53    void get_miplevel_dims(uint32_t *width, uint32_t *height) const
  54    {
  55       *width = mt->level[level].width;
  56       *height = mt->level[level].height;
  57    }
  58
  59    struct intel_mipmap_tree *mt;
  60    unsigned int level;
  61    unsigned int layer;
  62 };
  63
  64 class brw_blorp_surface_info : public brw_blorp_mip_info
  65 {
  66 public:
  67    brw_blorp_surface_info();
  68
  69    void set(struct intel_mipmap_tree *mt,
  70             unsigned int level, unsigned int layer);
  71
  72    /* Setting this flag indicates that the buffer's contents are W-tiled
  73     * stencil data, but the surface state should be set up for Y tiled
  74     * MESA_FORMAT_R8 data (this is necessary because surface states don't
  75     * support W tiling).
  76     *
  77     * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
  78     * MESA_FORMAT_R8 data are 128 pixels wide by 32 pixels high, the width and
  79     * pitch stored in the surface state will be multiplied by 2, and the
  80     * height will be halved.  Also, since W and Y tiles store their data in a
  81     * different order, the width and height will be rounded up to a multiple
  82     * of the tile size, to ensure that the WM program can access the full
  83     * width and height of the buffer.
  84     */
  85    bool map_stencil_as_y_tiled;
  86
  87    unsigned num_samples;
  88
  89    /* Setting this flag indicates that the surface should be set up in
  90     * ARYSPC_LOD0 mode.  Ignored prior to Gen7.
  91     */
  92    bool array_spacing_lod0;
  93
  94    /**
  95     * Format that should be used when setting up the surface state for this
  96     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
  97     */
  98    uint32_t brw_surfaceformat;
  99 };
 100
 101
 102 struct brw_blorp_coord_transform_params
 103 {
 104    void setup(GLuint src0, GLuint dst0, GLuint dst1,
 105               bool mirror);
 106
 107    int16_t multiplier;
 108    int16_t offset;
 109 };
 110
 111
 112 struct brw_blorp_wm_push_constants
 113 {
 114    uint16_t dst_x0;
 115    uint16_t dst_x1;
 116    uint16_t dst_y0;
 117    uint16_t dst_y1;
 118    brw_blorp_coord_transform_params x_transform;
 119    brw_blorp_coord_transform_params y_transform;
 120
 121    /* Pad out to an integral number of registers */
 122    uint16_t pad[8];
 123 };
 124
 125 /* Every 32 bytes of push constant data constitutes one GEN register. */
 126 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
 127    sizeof(brw_blorp_wm_push_constants) / 32;
 128
 129 struct brw_blorp_prog_data
 130 {
 131    unsigned int first_curbe_grf;
 132
 133    /**
 134     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 135     * than one sample per pixel.
 136     */
 137    bool persample_msaa_dispatch;
 138 };
 139
 140 class brw_blorp_params
 141 {
 142 public:
 143    brw_blorp_params();
 144
 145    virtual uint32_t get_wm_prog(struct brw_context *brw,
 146                                 brw_blorp_prog_data **prog_data) const = 0;
 147
 148    uint32_t x0;
 149    uint32_t y0;
 150    uint32_t x1;
 151    uint32_t y1;
 152    brw_blorp_mip_info depth;
 153    uint32_t depth_format;
 154    brw_blorp_surface_info src;
 155    brw_blorp_surface_info dst;
 156    enum gen6_hiz_op hiz_op;
 157    unsigned num_samples;
 158    bool use_wm_prog;
 159    brw_blorp_wm_push_constants wm_push_consts;
 160 };
 161
 162
 163 void
 164 brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params);
 165
 166
 167 /**
 168  * Parameters for a HiZ or depth resolve operation.
 169  *
 170  * For an overview of HiZ ops, see the following sections of the Sandy Bridge
 171  * PRM, Volume 1, Part 2:
 172  *   - 7.5.3.1 Depth Buffer Clear
 173  *   - 7.5.3.2 Depth Buffer Resolve
 174  *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
 175  */
 176 class brw_hiz_op_params : public brw_blorp_params
 177 {
 178 public:
 179    brw_hiz_op_params(struct intel_mipmap_tree *mt,
 180                      unsigned int level, unsigned int layer,
 181                      gen6_hiz_op op);
 182
 183    virtual uint32_t get_wm_prog(struct brw_context *brw,
 184                                 brw_blorp_prog_data **prog_data) const;
 185 };
 186
 187 struct brw_blorp_blit_prog_key
 188 {
 189    /* Number of samples per pixel that have been configured in the surface
 190     * state for texturing from.
 191     */
 192    unsigned tex_samples;
 193
 194    /* Actual number of samples per pixel in the source image. */
 195    unsigned src_samples;
 196
 197    /* If src_samples > 0, whether or not the source image uses an interleaved
 198     * MSAA layout.  False if src_samples == 0.
 199     */
 200    bool src_interleaved;
 201
 202    /* Number of samples per pixel that have been configured in the render
 203     * target.
 204     */
 205    unsigned rt_samples;
 206
 207    /* Actual number of samples per pixel in the destination image. */
 208    unsigned dst_samples;
 209
 210    /* If dst_samples > 0, whether or not the destination image uses an
 211     * interleaved MSAA layout.  False if dst_samples == 0.
 212     */
 213    bool dst_interleaved;
 214
 215    /* True if the source image is W tiled.  If true, the surface state for the
 216     * source image must be configured as Y tiled, and tex_samples must be 0.
 217     */
 218    bool src_tiled_w;
 219
 220    /* True if the destination image is W tiled.  If true, the surface state
 221     * for the render target must be configured as Y tiled, and rt_samples must
 222     * be 0.
 223     */
 224    bool dst_tiled_w;
 225
 226    /* True if all source samples should be blended together to produce each
 227     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 228     * equal src_samples, and tex_samples must be nonzero.
 229     */
 230    bool blend;
 231
 232    /* True if the rectangle being sent through the rendering pipeline might be
 233     * larger than the destination rectangle, so the WM program should kill any
 234     * pixels that are outside the destination rectangle.
 235     */
 236    bool use_kill;
 237
 238    /**
 239     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 240     * than one sample per pixel.
 241     */
 242    bool persample_msaa_dispatch;
 243 };
 244
 245 class brw_blorp_blit_params : public brw_blorp_params
 246 {
 247 public:
 248    brw_blorp_blit_params(struct brw_context *brw,
 249                          struct intel_mipmap_tree *src_mt,
 250                          struct intel_mipmap_tree *dst_mt,
 251                          GLuint src_x0, GLuint src_y0,
 252                          GLuint dst_x0, GLuint dst_y0,
 253                          GLuint width, GLuint height,
 254                          bool mirror_x, bool mirror_y);
 255
 256    virtual uint32_t get_wm_prog(struct brw_context *brw,
 257                                 brw_blorp_prog_data **prog_data) const;
 258
 259 private:
 260    brw_blorp_blit_prog_key wm_prog_key;
 261 };
 262
 263 /**
 264  * \name BLORP internals
 265  * \{
 266  *
 267  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 268  */
 269
 270 void
 271 gen6_blorp_init(struct brw_context *brw);
 272
 273 void
 274 gen6_blorp_compute_tile_masks(const brw_blorp_params *params,
 275                               uint32_t *tile_mask_x, uint32_t *tile_mask_y);
 276
 277 void
 278 gen6_blorp_emit_batch_head(struct brw_context *brw,
 279                            const brw_blorp_params *params);
 280
 281 void
 282 gen6_blorp_emit_state_base_address(struct brw_context *brw,
 283                                    const brw_blorp_params *params);
 284
 285 void
 286 gen6_blorp_emit_vertices(struct brw_context *brw,
 287                          const brw_blorp_params *params);
 288
 289 uint32_t
 290 gen6_blorp_emit_blend_state(struct brw_context *brw,
 291                             const brw_blorp_params *params);
 292
 293 uint32_t
 294 gen6_blorp_emit_cc_state(struct brw_context *brw,
 295                          const brw_blorp_params *params);
 296
 297 uint32_t
 298 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 299                              const brw_blorp_params *params);
 300
 301 void
 302 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 303                            const brw_blorp_params *params);
 304
 305 uint32_t
 306 gen6_blorp_emit_binding_table(struct brw_context *brw,
 307                               const brw_blorp_params *params,
 308                               uint32_t wm_surf_offset_renderbuffer,
 309                               uint32_t wm_surf_offset_texture);
 310
 311 uint32_t
 312 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 313                                     const brw_blorp_params *params);
 314
 315 void
 316 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 317                            const brw_blorp_params *params);
 318
 319 void
 320 gen6_blorp_emit_clip_disable(struct brw_context *brw,
 321                              const brw_blorp_params *params);
 322
 323 void
 324 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 325                                   const brw_blorp_params *params);
 326 /** \} */