src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_reg.h"
  29 #include "intel_mipmap_tree.h"
  30
  31 struct brw_context;
  32
  33 #ifdef __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 void
  38 brw_blorp_blit_miptrees(struct brw_context *brw,
  39                         struct intel_mipmap_tree *src_mt,
  40                         unsigned src_level, unsigned src_layer,
  41                         mesa_format src_format,
  42                         struct intel_mipmap_tree *dst_mt,
  43                         unsigned dst_level, unsigned dst_layer,
  44                         mesa_format dst_format,
  45                         float src_x0, float src_y0,
  46                         float src_x1, float src_y1,
  47                         float dst_x0, float dst_y0,
  48                         float dst_x1, float dst_y1,
  49                         GLenum filter, bool mirror_x, bool mirror_y);
  50
  51 #ifdef __cplusplus
  52 } /* end extern "C" */
  53
  54 /**
  55  * Binding table indices used by BLORP.
  56  */
  57 enum {
  58    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  59    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  60    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  61 };
  62
  63
  64 class brw_blorp_mip_info
  65 {
  66 public:
  67    brw_blorp_mip_info();
  68
  69    void set(struct intel_mipmap_tree *mt,
  70             unsigned int level, unsigned int layer);
  71
  72    struct intel_mipmap_tree *mt;
  73
  74    /**
  75     * The miplevel to use.
  76     */
  77    uint32_t level;
  78
  79    /**
  80     * The 2D layer within the miplevel. Combined, level and layer define the
  81     * 2D miptree slice to use.
  82     *
  83     * Note: if mt is a 2D multisample array texture on Gen7+ using
  84     * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
  85     * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
  86     * logical layer n corresponds to layer == 4*n.
  87     */
  88    uint32_t layer;
  89
  90    /**
  91     * Width of the miplevel to be used.  For surfaces using
  92     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  93     */
  94    uint32_t width;
  95
  96    /**
  97     * Height of the miplevel to be used.  For surfaces using
  98     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  99     */
 100    uint32_t height;
 101
 102    /**
 103     * X offset within the surface to texture from (or render to).  For
 104     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 105     * pixels.
 106     */
 107    uint32_t x_offset;
 108
 109    /**
 110     * Y offset within the surface to texture from (or render to).  For
 111     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 112     * pixels.
 113     */
 114    uint32_t y_offset;
 115 };
 116
 117 class brw_blorp_surface_info : public brw_blorp_mip_info
 118 {
 119 public:
 120    brw_blorp_surface_info();
 121
 122    void set(struct brw_context *brw,
 123             struct intel_mipmap_tree *mt,
 124             unsigned int level, unsigned int layer,
 125             mesa_format format, bool is_render_target);
 126
 127    uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
 128
 129    /* Setting this flag indicates that the buffer's contents are W-tiled
 130     * stencil data, but the surface state should be set up for Y tiled
 131     * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
 132     * support W tiling).
 133     *
 134     * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
 135     * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
 136     * pitch stored in the surface state will be multiplied by 2, and the
 137     * height will be halved.  Also, since W and Y tiles store their data in a
 138     * different order, the width and height will be rounded up to a multiple
 139     * of the tile size, to ensure that the WM program can access the full
 140     * width and height of the buffer.
 141     */
 142    bool map_stencil_as_y_tiled;
 143
 144    unsigned num_samples;
 145
 146    /**
 147     * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
 148     * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
 149     *
 150     * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
 151     * prior to Gen7.
 152     */
 153    enum miptree_array_layout array_layout;
 154
 155    /**
 156     * Format that should be used when setting up the surface state for this
 157     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
 158     */
 159    uint32_t brw_surfaceformat;
 160
 161    /**
 162     * For MSAA surfaces, MSAA layout that should be used when setting up the
 163     * surface state for this surface.
 164     */
 165    intel_msaa_layout msaa_layout;
 166 };
 167
 168
 169 struct brw_blorp_coord_transform_params
 170 {
 171    void setup(GLfloat src0, GLfloat src1, GLfloat dst0, GLfloat dst1,
 172               bool mirror);
 173
 174    float multiplier;
 175    float offset;
 176 };
 177
 178
 179 struct brw_blorp_wm_push_constants
 180 {
 181    uint32_t dst_x0;
 182    uint32_t dst_x1;
 183    uint32_t dst_y0;
 184    uint32_t dst_y1;
 185    /* Top right coordinates of the rectangular grid used for scaled blitting */
 186    float rect_grid_x1;
 187    float rect_grid_y1;
 188    brw_blorp_coord_transform_params x_transform;
 189    brw_blorp_coord_transform_params y_transform;
 190    /* Pad out to an integral number of registers */
 191    uint32_t pad[6];
 192 };
 193
 194 /* Every 32 bytes of push constant data constitutes one GEN register. */
 195 const unsigned int BRW_BLORP_NUM_PUSH_CONST_REGS =
 196    sizeof(brw_blorp_wm_push_constants) / 32;
 197
 198 struct brw_blorp_prog_data
 199 {
 200    unsigned int first_curbe_grf;
 201
 202    /**
 203     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 204     * than one sample per pixel.
 205     */
 206    bool persample_msaa_dispatch;
 207 };
 208
 209
 210 class brw_blorp_params
 211 {
 212 public:
 213    brw_blorp_params(unsigned num_varyings = 0,
 214                     unsigned num_draw_buffers = 1,
 215                     unsigned num_layers = 1);
 216
 217    virtual uint32_t get_wm_prog(struct brw_context *brw,
 218                                 brw_blorp_prog_data **prog_data) const = 0;
 219
 220    uint32_t x0;
 221    uint32_t y0;
 222    uint32_t x1;
 223    uint32_t y1;
 224    brw_blorp_mip_info depth;
 225    uint32_t depth_format;
 226    brw_blorp_surface_info src;
 227    brw_blorp_surface_info dst;
 228    enum gen6_hiz_op hiz_op;
 229    bool use_wm_prog;
 230    brw_blorp_wm_push_constants wm_push_consts;
 231    const unsigned num_varyings;
 232    const unsigned num_draw_buffers;
 233    const unsigned num_layers;
 234 };
 235
 236
 237 void
 238 brw_blorp_exec(struct brw_context *brw, const brw_blorp_params *params);
 239
 240 void
 241 gen6_blorp_exec(struct brw_context *brw,
 242                 const brw_blorp_params *params);
 243
 244 void
 245 gen7_blorp_exec(struct brw_context *brw,
 246                 const brw_blorp_params *params);
 247
 248 /**
 249  * Parameters for a HiZ or depth resolve operation.
 250  *
 251  * For an overview of HiZ ops, see the following sections of the Sandy Bridge
 252  * PRM, Volume 1, Part 2:
 253  *   - 7.5.3.1 Depth Buffer Clear
 254  *   - 7.5.3.2 Depth Buffer Resolve
 255  *   - 7.5.3.3 Hierarchical Depth Buffer Resolve
 256  */
 257 class brw_hiz_op_params : public brw_blorp_params
 258 {
 259 public:
 260    brw_hiz_op_params(struct intel_mipmap_tree *mt,
 261                      unsigned int level, unsigned int layer,
 262                      gen6_hiz_op op);
 263
 264    virtual uint32_t get_wm_prog(struct brw_context *brw,
 265                                 brw_blorp_prog_data **prog_data) const;
 266 };
 267
 268 struct brw_blorp_blit_prog_key
 269 {
 270    /* Number of samples per pixel that have been configured in the surface
 271     * state for texturing from.
 272     */
 273    unsigned tex_samples;
 274
 275    /* MSAA layout that has been configured in the surface state for texturing
 276     * from.
 277     */
 278    intel_msaa_layout tex_layout;
 279
 280    /* Actual number of samples per pixel in the source image. */
 281    unsigned src_samples;
 282
 283    /* Actual MSAA layout used by the source image. */
 284    intel_msaa_layout src_layout;
 285
 286    /* Number of samples per pixel that have been configured in the render
 287     * target.
 288     */
 289    unsigned rt_samples;
 290
 291    /* MSAA layout that has been configured in the render target. */
 292    intel_msaa_layout rt_layout;
 293
 294    /* Actual number of samples per pixel in the destination image. */
 295    unsigned dst_samples;
 296
 297    /* Actual MSAA layout used by the destination image. */
 298    intel_msaa_layout dst_layout;
 299
 300    /* Type of the data to be read from the texture (one of
 301     * BRW_REGISTER_TYPE_{UD,D,F}).
 302     */
 303    enum brw_reg_type texture_data_type;
 304
 305    /* True if the source image is W tiled.  If true, the surface state for the
 306     * source image must be configured as Y tiled, and tex_samples must be 0.
 307     */
 308    bool src_tiled_w;
 309
 310    /* True if the destination image is W tiled.  If true, the surface state
 311     * for the render target must be configured as Y tiled, and rt_samples must
 312     * be 0.
 313     */
 314    bool dst_tiled_w;
 315
 316    /* True if all source samples should be blended together to produce each
 317     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 318     * equal src_samples, and tex_samples must be nonzero.
 319     */
 320    bool blend;
 321
 322    /* True if the rectangle being sent through the rendering pipeline might be
 323     * larger than the destination rectangle, so the WM program should kill any
 324     * pixels that are outside the destination rectangle.
 325     */
 326    bool use_kill;
 327
 328    /**
 329     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 330     * than one sample per pixel.
 331     */
 332    bool persample_msaa_dispatch;
 333
 334    /* True for scaled blitting. */
 335    bool blit_scaled;
 336
 337    /* Scale factors between the pixel grid and the grid of samples. We're
 338     * using grid of samples for bilinear filetring in multisample scaled blits.
 339     */
 340    float x_scale;
 341    float y_scale;
 342
 343    /* True for blits with filter = GL_LINEAR. */
 344    bool bilinear_filter;
 345 };
 346
 347 class brw_blorp_blit_params : public brw_blorp_params
 348 {
 349 public:
 350    brw_blorp_blit_params(struct brw_context *brw,
 351                          struct intel_mipmap_tree *src_mt,
 352                          unsigned src_level, unsigned src_layer,
 353                          mesa_format src_format,
 354                          struct intel_mipmap_tree *dst_mt,
 355                          unsigned dst_level, unsigned dst_layer,
 356                          mesa_format dst_format,
 357                          GLfloat src_x0, GLfloat src_y0,
 358                          GLfloat src_x1, GLfloat src_y1,
 359                          GLfloat dst_x0, GLfloat dst_y0,
 360                          GLfloat dst_x1, GLfloat dst_y1,
 361                          GLenum filter, bool mirror_x, bool mirror_y);
 362
 363    virtual uint32_t get_wm_prog(struct brw_context *brw,
 364                                 brw_blorp_prog_data **prog_data) const;
 365
 366 private:
 367    brw_blorp_blit_prog_key wm_prog_key;
 368 };
 369
 370 /**
 371  * \name BLORP internals
 372  * \{
 373  *
 374  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 375  */
 376
 377 void
 378 gen6_blorp_init(struct brw_context *brw);
 379
 380 void
 381 gen6_blorp_emit_state_base_address(struct brw_context *brw,
 382                                    const brw_blorp_params *params);
 383
 384 void
 385 gen6_blorp_emit_vertices(struct brw_context *brw,
 386                          const brw_blorp_params *params);
 387
 388 uint32_t
 389 gen6_blorp_emit_blend_state(struct brw_context *brw,
 390                             const brw_blorp_params *params);
 391
 392 uint32_t
 393 gen6_blorp_emit_cc_state(struct brw_context *brw);
 394
 395 uint32_t
 396 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 397                              const brw_blorp_params *params);
 398
 399 void
 400 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 401                            const brw_blorp_params *params);
 402
 403 uint32_t
 404 gen6_blorp_emit_binding_table(struct brw_context *brw,
 405                               uint32_t wm_surf_offset_renderbuffer,
 406                               uint32_t wm_surf_offset_texture);
 407
 408 uint32_t
 409 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 410                                     const brw_blorp_params *params);
 411
 412 void
 413 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 414                            const brw_blorp_params *params);
 415
 416 void
 417 gen6_blorp_emit_clip_disable(struct brw_context *brw);
 418
 419 void
 420 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 421                                   const brw_blorp_params *params);
 422
 423 uint32_t
 424 gen6_blorp_emit_sampler_state(struct brw_context *brw,
 425                               unsigned tex_filter, unsigned max_lod,
 426                               bool non_normalized_coords);
 427
 428 /** \} */
 429
 430 #endif /* __cplusplus */