src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_reg.h"
  29 #include "intel_mipmap_tree.h"
  30
  31 struct brw_context;
  32 struct brw_wm_prog_key;
  33
  34 #ifdef __cplusplus
  35 extern "C" {
  36 #endif
  37
  38 void
  39 brw_blorp_blit_miptrees(struct brw_context *brw,
  40                         struct intel_mipmap_tree *src_mt,
  41                         unsigned src_level, unsigned src_layer,
  42                         mesa_format src_format, int src_swizzle,
  43                         struct intel_mipmap_tree *dst_mt,
  44                         unsigned dst_level, unsigned dst_layer,
  45                         mesa_format dst_format,
  46                         float src_x0, float src_y0,
  47                         float src_x1, float src_y1,
  48                         float dst_x0, float dst_y0,
  49                         float dst_x1, float dst_y1,
  50                         GLenum filter, bool mirror_x, bool mirror_y,
  51                         bool decode_srgb, bool encode_srgb);
  52
  53 bool
  54 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
  55                       GLbitfield mask, bool partial_clear, bool encode_srgb);
  56
  57 void
  58 brw_blorp_resolve_color(struct brw_context *brw,
  59                         struct intel_mipmap_tree *mt);
  60
  61 /**
  62  * Binding table indices used by BLORP.
  63  */
  64 enum {
  65    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  66    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  67    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  68 };
  69
  70 struct brw_blorp_surface_info
  71 {
  72    struct intel_mipmap_tree *mt;
  73
  74    struct isl_surf surf;
  75
  76    struct isl_surf aux_surf;
  77    enum isl_aux_usage aux_usage;
  78
  79    /**
  80     * The miplevel to use.
  81     */
  82    uint32_t level;
  83
  84    /**
  85     * The 2D layer within the miplevel. Combined, level and layer define the
  86     * 2D miptree slice to use.
  87     *
  88     * Note: if mt is a 2D multisample array texture on Gen7+ using
  89     * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
  90     * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
  91     * logical layer n corresponds to layer == 4*n.
  92     */
  93    uint32_t layer;
  94
  95    /**
  96     * Width of the miplevel to be used.  For surfaces using
  97     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  98     */
  99    uint32_t width;
 100
 101    /**
 102     * Height of the miplevel to be used.  For surfaces using
 103     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
 104     */
 105    uint32_t height;
 106
 107    /**
 108     * X offset within the surface to texture from (or render to).  For
 109     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 110     * pixels.
 111     */
 112    uint32_t x_offset;
 113
 114    /**
 115     * Y offset within the surface to texture from (or render to).  For
 116     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 117     * pixels.
 118     */
 119    uint32_t y_offset;
 120
 121    /**
 122     * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
 123     * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
 124     *
 125     * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
 126     * prior to Gen7.
 127     */
 128    enum miptree_array_layout array_layout;
 129
 130    /**
 131     * Format that should be used when setting up the surface state for this
 132     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
 133     */
 134    uint32_t brw_surfaceformat;
 135
 136    /**
 137     * For MSAA surfaces, MSAA layout that should be used when setting up the
 138     * surface state for this surface.
 139     */
 140    enum intel_msaa_layout msaa_layout;
 141
 142    /**
 143     * In order to support cases where RGBA format is backing client requested
 144     * RGB, one needs to have means to force alpha channel to one when user
 145     * requested RGB surface is used as blit source. This is possible by
 146     * setting source swizzle for the texture surface.
 147     */
 148    int swizzle;
 149 };
 150
 151 void
 152 brw_blorp_surface_info_init(struct brw_context *brw,
 153                             struct brw_blorp_surface_info *info,
 154                             struct intel_mipmap_tree *mt,
 155                             unsigned int level, unsigned int layer,
 156                             mesa_format format, bool is_render_target);
 157
 158
 159 struct brw_blorp_coord_transform
 160 {
 161    float multiplier;
 162    float offset;
 163 };
 164
 165 /**
 166  * Bounding rectangle telling pixel discard which pixels are not to be
 167  * touched. This is needed in when surfaces are configured as something else
 168  * what they really are:
 169  *
 170  *    - writing W-tiled stencil as Y-tiled
 171  *    - writing interleaved multisampled as single sampled.
 172  *
 173  * See blorp_nir_discard_if_outside_rect().
 174  */
 175 struct brw_blorp_discard_rect
 176 {
 177    uint32_t x0;
 178    uint32_t x1;
 179    uint32_t y0;
 180    uint32_t y1;
 181 };
 182
 183 /**
 184  * Grid needed for blended and scaled blits of integer formats, see
 185  * blorp_nir_manual_blend_bilinear().
 186  */
 187 struct brw_blorp_rect_grid
 188 {
 189    float x1;
 190    float y1;
 191    float pad[2];
 192 };
 193
 194 struct brw_blorp_wm_inputs
 195 {
 196    struct brw_blorp_discard_rect discard_rect;
 197    struct brw_blorp_rect_grid rect_grid;
 198    struct brw_blorp_coord_transform coord_transform[2];
 199
 200    /* Minimum layer setting works for all the textures types but texture_3d
 201     * for which the setting has no effect. Use the z-coordinate instead.
 202     */
 203    uint32_t src_z;
 204
 205    /* Pad out to an integral number of registers */
 206    uint32_t pad[3];
 207 };
 208
 209 struct brw_blorp_prog_data
 210 {
 211    bool dispatch_8;
 212    bool dispatch_16;
 213
 214    uint8_t first_curbe_grf_0;
 215    uint8_t first_curbe_grf_2;
 216
 217    uint32_t ksp_offset_2;
 218
 219    /**
 220     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 221     * than one sample per pixel.
 222     */
 223    bool persample_msaa_dispatch;
 224
 225    /**
 226     * Mask of which FS inputs are marked flat by the shader source.  This is
 227     * needed for setting up 3DSTATE_SF/SBE.
 228     */
 229    uint32_t flat_inputs;
 230    unsigned num_varying_inputs;
 231    GLbitfield64 inputs_read;
 232 };
 233
 234 static inline unsigned
 235 brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
 236 {
 237    if (prog_data == NULL)
 238       return 1;
 239
 240    /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
 241     *
 242     * read_length = ceiling((max_source_attr+1)/2)
 243     */
 244    return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
 245 }
 246
 247 struct brw_blorp_params
 248 {
 249    uint32_t x0;
 250    uint32_t y0;
 251    uint32_t x1;
 252    uint32_t y1;
 253    struct brw_blorp_surface_info depth;
 254    uint32_t depth_format;
 255    struct brw_blorp_surface_info src;
 256    struct brw_blorp_surface_info dst;
 257    enum gen6_hiz_op hiz_op;
 258    union {
 259       unsigned fast_clear_op;
 260       unsigned resolve_type;
 261    };
 262    bool color_write_disable[4];
 263    struct brw_blorp_wm_inputs wm_inputs;
 264    unsigned num_draw_buffers;
 265    unsigned num_layers;
 266    uint32_t wm_prog_kernel;
 267    struct brw_blorp_prog_data *wm_prog_data;
 268 };
 269
 270 void
 271 brw_blorp_params_init(struct brw_blorp_params *params);
 272
 273 void
 274 brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 275
 276 void
 277 gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
 278                     unsigned level, unsigned layer, enum gen6_hiz_op op);
 279
 280 void
 281 gen6_blorp_exec(struct brw_context *brw,
 282                 const struct brw_blorp_params *params);
 283
 284 void
 285 gen7_blorp_exec(struct brw_context *brw,
 286                 const struct brw_blorp_params *params);
 287
 288 void
 289 gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 290
 291 struct brw_blorp_blit_prog_key
 292 {
 293    /* Number of samples per pixel that have been configured in the surface
 294     * state for texturing from.
 295     */
 296    unsigned tex_samples;
 297
 298    /* MSAA layout that has been configured in the surface state for texturing
 299     * from.
 300     */
 301    enum intel_msaa_layout tex_layout;
 302
 303    enum isl_aux_usage tex_aux_usage;
 304
 305    /* Actual number of samples per pixel in the source image. */
 306    unsigned src_samples;
 307
 308    /* Actual MSAA layout used by the source image. */
 309    enum intel_msaa_layout src_layout;
 310
 311    /* Number of samples per pixel that have been configured in the render
 312     * target.
 313     */
 314    unsigned rt_samples;
 315
 316    /* MSAA layout that has been configured in the render target. */
 317    enum intel_msaa_layout rt_layout;
 318
 319    /* Actual number of samples per pixel in the destination image. */
 320    unsigned dst_samples;
 321
 322    /* Actual MSAA layout used by the destination image. */
 323    enum intel_msaa_layout dst_layout;
 324
 325    /* Type of the data to be read from the texture (one of
 326     * BRW_REGISTER_TYPE_{UD,D,F}).
 327     */
 328    enum brw_reg_type texture_data_type;
 329
 330    /* True if the source image is W tiled.  If true, the surface state for the
 331     * source image must be configured as Y tiled, and tex_samples must be 0.
 332     */
 333    bool src_tiled_w;
 334
 335    /* True if the destination image is W tiled.  If true, the surface state
 336     * for the render target must be configured as Y tiled, and rt_samples must
 337     * be 0.
 338     */
 339    bool dst_tiled_w;
 340
 341    /* True if all source samples should be blended together to produce each
 342     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 343     * equal src_samples, and tex_samples must be nonzero.
 344     */
 345    bool blend;
 346
 347    /* True if the rectangle being sent through the rendering pipeline might be
 348     * larger than the destination rectangle, so the WM program should kill any
 349     * pixels that are outside the destination rectangle.
 350     */
 351    bool use_kill;
 352
 353    /**
 354     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 355     * than one sample per pixel.
 356     */
 357    bool persample_msaa_dispatch;
 358
 359    /* True for scaled blitting. */
 360    bool blit_scaled;
 361
 362    /* Scale factors between the pixel grid and the grid of samples. We're
 363     * using grid of samples for bilinear filetring in multisample scaled blits.
 364     */
 365    float x_scale;
 366    float y_scale;
 367
 368    /* True for blits with filter = GL_LINEAR. */
 369    bool bilinear_filter;
 370 };
 371
 372 /**
 373  * \name BLORP internals
 374  * \{
 375  *
 376  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 377  */
 378
 379 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
 380
 381 const unsigned *
 382 brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
 383                              const struct brw_wm_prog_key *wm_key,
 384                              bool use_repclear,
 385                              struct brw_blorp_prog_data *prog_data,
 386                              unsigned *program_size);
 387
 388 uint32_t
 389 brw_blorp_emit_surface_state(struct brw_context *brw,
 390                              const struct brw_blorp_surface_info *surface,
 391                              uint32_t read_domains, uint32_t write_domain,
 392                              bool is_render_target);
 393
 394 void
 395 gen6_blorp_init(struct brw_context *brw);
 396
 397 void
 398 gen6_blorp_emit_vertices(struct brw_context *brw,
 399                          const struct brw_blorp_params *params);
 400
 401 uint32_t
 402 gen6_blorp_emit_blend_state(struct brw_context *brw,
 403                             const struct brw_blorp_params *params);
 404
 405 uint32_t
 406 gen6_blorp_emit_cc_state(struct brw_context *brw);
 407
 408 uint32_t
 409 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 410                              const struct brw_blorp_params *params);
 411
 412 void
 413 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 414                            const struct brw_blorp_params *params);
 415
 416 uint32_t
 417 gen6_blorp_emit_binding_table(struct brw_context *brw,
 418                               uint32_t wm_surf_offset_renderbuffer,
 419                               uint32_t wm_surf_offset_texture);
 420
 421 uint32_t
 422 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 423                                     const struct brw_blorp_params *params);
 424
 425 void
 426 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 427                            const struct brw_blorp_params *params);
 428
 429 void
 430 gen6_blorp_emit_clip_disable(struct brw_context *brw);
 431
 432 void
 433 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 434                                   const struct brw_blorp_params *params);
 435
 436 uint32_t
 437 gen6_blorp_emit_sampler_state(struct brw_context *brw,
 438                               unsigned tex_filter, unsigned max_lod,
 439                               bool non_normalized_coords);
 440 void
 441 gen7_blorp_emit_urb_config(struct brw_context *brw,
 442                            const struct brw_blorp_params *params);
 443
 444 void
 445 gen7_blorp_emit_blend_state_pointer(struct brw_context *brw,
 446                                     uint32_t cc_blend_state_offset);
 447
 448 void
 449 gen7_blorp_emit_cc_state_pointer(struct brw_context *brw,
 450                                  uint32_t cc_state_offset);
 451
 452 void
 453 gen7_blorp_emit_cc_viewport(struct brw_context *brw);
 454
 455 void
 456 gen7_blorp_emit_te_disable(struct brw_context *brw);
 457
 458 void
 459 gen7_blorp_emit_binding_table_pointers_ps(struct brw_context *brw,
 460                                           uint32_t wm_bind_bo_offset);
 461
 462 void
 463 gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw,
 464                                           uint32_t sampler_offset);
 465
 466 void
 467 gen7_blorp_emit_clear_params(struct brw_context *brw,
 468                              const struct brw_blorp_params *params);
 469
 470 void
 471 gen7_blorp_emit_constant_ps(struct brw_context *brw,
 472                             uint32_t wm_push_const_offset);
 473
 474 void
 475 gen7_blorp_emit_constant_ps_disable(struct brw_context *brw);
 476
 477 void
 478 gen7_blorp_emit_primitive(struct brw_context *brw,
 479                           const struct brw_blorp_params *params);
 480
 481 /** \} */
 482
 483 #ifdef __cplusplus
 484 } /* end extern "C" */
 485 #endif /* __cplusplus */