src/mesa/drivers/dri/i965/brw_blorp.h

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include <stdint.h>
  27
  28 #include "brw_reg.h"
  29 #include "intel_mipmap_tree.h"
  30
  31 struct brw_context;
  32 struct brw_wm_prog_key;
  33
  34 #ifdef __cplusplus
  35 extern "C" {
  36 #endif
  37
  38 void
  39 brw_blorp_blit_miptrees(struct brw_context *brw,
  40                         struct intel_mipmap_tree *src_mt,
  41                         unsigned src_level, unsigned src_layer,
  42                         mesa_format src_format, int src_swizzle,
  43                         struct intel_mipmap_tree *dst_mt,
  44                         unsigned dst_level, unsigned dst_layer,
  45                         mesa_format dst_format,
  46                         float src_x0, float src_y0,
  47                         float src_x1, float src_y1,
  48                         float dst_x0, float dst_y0,
  49                         float dst_x1, float dst_y1,
  50                         GLenum filter, bool mirror_x, bool mirror_y,
  51                         bool decode_srgb, bool encode_srgb);
  52
  53 bool
  54 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
  55                       GLbitfield mask, bool partial_clear, bool encode_srgb);
  56
  57 void
  58 brw_blorp_resolve_color(struct brw_context *brw,
  59                         struct intel_mipmap_tree *mt);
  60
  61 /**
  62  * Binding table indices used by BLORP.
  63  */
  64 enum {
  65    BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
  66    BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
  67    BRW_BLORP_NUM_BINDING_TABLE_ENTRIES
  68 };
  69
  70 struct brw_blorp_surface_info
  71 {
  72    struct intel_mipmap_tree *mt;
  73
  74    /**
  75     * The miplevel to use.
  76     */
  77    uint32_t level;
  78
  79    /**
  80     * The 2D layer within the miplevel. Combined, level and layer define the
  81     * 2D miptree slice to use.
  82     *
  83     * Note: if mt is a 2D multisample array texture on Gen7+ using
  84     * INTEL_MSAA_LAYOUT_UMS or INTEL_MSAA_LAYOUT_CMS, layer is the physical
  85     * layer holding sample 0.  So, for example, if mt->num_samples == 4, then
  86     * logical layer n corresponds to layer == 4*n.
  87     */
  88    uint32_t layer;
  89
  90    /**
  91     * Width of the miplevel to be used.  For surfaces using
  92     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  93     */
  94    uint32_t width;
  95
  96    /**
  97     * Height of the miplevel to be used.  For surfaces using
  98     * INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not pixels.
  99     */
 100    uint32_t height;
 101
 102    /**
 103     * X offset within the surface to texture from (or render to).  For
 104     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 105     * pixels.
 106     */
 107    uint32_t x_offset;
 108
 109    /**
 110     * Y offset within the surface to texture from (or render to).  For
 111     * surfaces using INTEL_MSAA_LAYOUT_IMS, this is measured in samples, not
 112     * pixels.
 113     */
 114    uint32_t y_offset;
 115
 116    /* Setting this flag indicates that the buffer's contents are W-tiled
 117     * stencil data, but the surface state should be set up for Y tiled
 118     * MESA_FORMAT_R_UNORM8 data (this is necessary because surface states don't
 119     * support W tiling).
 120     *
 121     * Since W tiles are 64 pixels wide by 64 pixels high, whereas Y tiles of
 122     * MESA_FORMAT_R_UNORM8 data are 128 pixels wide by 32 pixels high, the width and
 123     * pitch stored in the surface state will be multiplied by 2, and the
 124     * height will be halved.  Also, since W and Y tiles store their data in a
 125     * different order, the width and height will be rounded up to a multiple
 126     * of the tile size, to ensure that the WM program can access the full
 127     * width and height of the buffer.
 128     */
 129    bool map_stencil_as_y_tiled;
 130
 131    unsigned num_samples;
 132
 133    /**
 134     * Indicates if we use the standard miptree layout (ALL_LOD_IN_EACH_SLICE),
 135     * or if we tightly pack array slices at each LOD (ALL_SLICES_AT_EACH_LOD).
 136     *
 137     * If ALL_SLICES_AT_EACH_LOD is set, then ARYSPC_LOD0 can be used. Ignored
 138     * prior to Gen7.
 139     */
 140    enum miptree_array_layout array_layout;
 141
 142    /**
 143     * Format that should be used when setting up the surface state for this
 144     * surface.  Should correspond to one of the BRW_SURFACEFORMAT_* enums.
 145     */
 146    uint32_t brw_surfaceformat;
 147
 148    /**
 149     * For MSAA surfaces, MSAA layout that should be used when setting up the
 150     * surface state for this surface.
 151     */
 152    enum intel_msaa_layout msaa_layout;
 153
 154    /**
 155     * In order to support cases where RGBA format is backing client requested
 156     * RGB, one needs to have means to force alpha channel to one when user
 157     * requested RGB surface is used as blit source. This is possible by
 158     * setting source swizzle for the texture surface.
 159     */
 160    int swizzle;
 161 };
 162
 163 void
 164 brw_blorp_surface_info_init(struct brw_context *brw,
 165                             struct brw_blorp_surface_info *info,
 166                             struct intel_mipmap_tree *mt,
 167                             unsigned int level, unsigned int layer,
 168                             mesa_format format, bool is_render_target);
 169
 170 uint32_t
 171 brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info,
 172                                uint32_t *tile_x, uint32_t *tile_y);
 173
 174
 175
 176 struct brw_blorp_coord_transform
 177 {
 178    float multiplier;
 179    float offset;
 180 };
 181
 182 /**
 183  * Bounding rectangle telling pixel discard which pixels are not to be
 184  * touched. This is needed in when surfaces are configured as something else
 185  * what they really are:
 186  *
 187  *    - writing W-tiled stencil as Y-tiled
 188  *    - writing interleaved multisampled as single sampled.
 189  *
 190  * See blorp_nir_discard_if_outside_rect().
 191  */
 192 struct brw_blorp_discard_rect
 193 {
 194    uint32_t x0;
 195    uint32_t x1;
 196    uint32_t y0;
 197    uint32_t y1;
 198 };
 199
 200 /**
 201  * Grid needed for blended and scaled blits of integer formats, see
 202  * blorp_nir_manual_blend_bilinear().
 203  */
 204 struct brw_blorp_rect_grid
 205 {
 206    float x1;
 207    float y1;
 208    float pad[2];
 209 };
 210
 211 struct brw_blorp_wm_inputs
 212 {
 213    struct brw_blorp_discard_rect discard_rect;
 214    struct brw_blorp_rect_grid rect_grid;
 215    struct brw_blorp_coord_transform coord_transform[2];
 216
 217    /* Minimum layer setting works for all the textures types but texture_3d
 218     * for which the setting has no effect. Use the z-coordinate instead.
 219     */
 220    uint32_t src_z;
 221
 222    /* Pad out to an integral number of registers */
 223    uint32_t pad[3];
 224 };
 225
 226 struct brw_blorp_prog_data
 227 {
 228    bool dispatch_8;
 229    bool dispatch_16;
 230
 231    uint8_t first_curbe_grf_0;
 232    uint8_t first_curbe_grf_2;
 233
 234    uint32_t ksp_offset_2;
 235
 236    /**
 237     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 238     * than one sample per pixel.
 239     */
 240    bool persample_msaa_dispatch;
 241
 242    /**
 243     * Mask of which FS inputs are marked flat by the shader source.  This is
 244     * needed for setting up 3DSTATE_SF/SBE.
 245     */
 246    uint32_t flat_inputs;
 247    unsigned num_varying_inputs;
 248    GLbitfield64 inputs_read;
 249 };
 250
 251 static inline unsigned
 252 brw_blorp_get_urb_length(const struct brw_blorp_prog_data *prog_data)
 253 {
 254    if (prog_data == NULL)
 255       return 1;
 256
 257    /* From the BSpec: 3D Pipeline - Strips and Fans - 3DSTATE_SBE
 258     *
 259     * read_length = ceiling((max_source_attr+1)/2)
 260     */
 261    return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
 262 }
 263
 264 struct brw_blorp_params
 265 {
 266    uint32_t x0;
 267    uint32_t y0;
 268    uint32_t x1;
 269    uint32_t y1;
 270    struct brw_blorp_surface_info depth;
 271    uint32_t depth_format;
 272    struct brw_blorp_surface_info src;
 273    struct brw_blorp_surface_info dst;
 274    enum gen6_hiz_op hiz_op;
 275    union {
 276       unsigned fast_clear_op;
 277       unsigned resolve_type;
 278    };
 279    bool color_write_disable[4];
 280    struct brw_blorp_wm_inputs wm_inputs;
 281    unsigned num_draw_buffers;
 282    unsigned num_layers;
 283    uint32_t wm_prog_kernel;
 284    struct brw_blorp_prog_data *wm_prog_data;
 285 };
 286
 287 void
 288 brw_blorp_params_init(struct brw_blorp_params *params);
 289
 290 void
 291 brw_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 292
 293 void
 294 gen6_blorp_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt,
 295                     unsigned level, unsigned layer, enum gen6_hiz_op op);
 296
 297 void
 298 gen6_blorp_exec(struct brw_context *brw,
 299                 const struct brw_blorp_params *params);
 300
 301 void
 302 gen7_blorp_exec(struct brw_context *brw,
 303                 const struct brw_blorp_params *params);
 304
 305 void
 306 gen8_blorp_exec(struct brw_context *brw, const struct brw_blorp_params *params);
 307
 308 struct brw_blorp_blit_prog_key
 309 {
 310    /* Number of samples per pixel that have been configured in the surface
 311     * state for texturing from.
 312     */
 313    unsigned tex_samples;
 314
 315    /* MSAA layout that has been configured in the surface state for texturing
 316     * from.
 317     */
 318    enum intel_msaa_layout tex_layout;
 319
 320    /* Actual number of samples per pixel in the source image. */
 321    unsigned src_samples;
 322
 323    /* Actual MSAA layout used by the source image. */
 324    enum intel_msaa_layout src_layout;
 325
 326    /* Number of samples per pixel that have been configured in the render
 327     * target.
 328     */
 329    unsigned rt_samples;
 330
 331    /* MSAA layout that has been configured in the render target. */
 332    enum intel_msaa_layout rt_layout;
 333
 334    /* Actual number of samples per pixel in the destination image. */
 335    unsigned dst_samples;
 336
 337    /* Actual MSAA layout used by the destination image. */
 338    enum intel_msaa_layout dst_layout;
 339
 340    /* Type of the data to be read from the texture (one of
 341     * BRW_REGISTER_TYPE_{UD,D,F}).
 342     */
 343    enum brw_reg_type texture_data_type;
 344
 345    /* True if the source image is W tiled.  If true, the surface state for the
 346     * source image must be configured as Y tiled, and tex_samples must be 0.
 347     */
 348    bool src_tiled_w;
 349
 350    /* True if the destination image is W tiled.  If true, the surface state
 351     * for the render target must be configured as Y tiled, and rt_samples must
 352     * be 0.
 353     */
 354    bool dst_tiled_w;
 355
 356    /* True if all source samples should be blended together to produce each
 357     * destination pixel.  If true, src_tiled_w must be false, tex_samples must
 358     * equal src_samples, and tex_samples must be nonzero.
 359     */
 360    bool blend;
 361
 362    /* True if the rectangle being sent through the rendering pipeline might be
 363     * larger than the destination rectangle, so the WM program should kill any
 364     * pixels that are outside the destination rectangle.
 365     */
 366    bool use_kill;
 367
 368    /**
 369     * True if the WM program should be run in MSDISPMODE_PERSAMPLE with more
 370     * than one sample per pixel.
 371     */
 372    bool persample_msaa_dispatch;
 373
 374    /* True for scaled blitting. */
 375    bool blit_scaled;
 376
 377    /* Scale factors between the pixel grid and the grid of samples. We're
 378     * using grid of samples for bilinear filetring in multisample scaled blits.
 379     */
 380    float x_scale;
 381    float y_scale;
 382
 383    /* True for blits with filter = GL_LINEAR. */
 384    bool bilinear_filter;
 385 };
 386
 387 /**
 388  * \name BLORP internals
 389  * \{
 390  *
 391  * Used internally by gen6_blorp_exec() and gen7_blorp_exec().
 392  */
 393
 394 void brw_blorp_init_wm_prog_key(struct brw_wm_prog_key *wm_key);
 395
 396 const unsigned *
 397 brw_blorp_compile_nir_shader(struct brw_context *brw, struct nir_shader *nir,
 398                              const struct brw_wm_prog_key *wm_key,
 399                              bool use_repclear,
 400                              struct brw_blorp_prog_data *prog_data,
 401                              unsigned *program_size);
 402
 403 void
 404 gen6_blorp_init(struct brw_context *brw);
 405
 406 void
 407 gen6_blorp_emit_vertices(struct brw_context *brw,
 408                          const struct brw_blorp_params *params);
 409
 410 uint32_t
 411 gen6_blorp_emit_blend_state(struct brw_context *brw,
 412                             const struct brw_blorp_params *params);
 413
 414 uint32_t
 415 gen6_blorp_emit_cc_state(struct brw_context *brw);
 416
 417 uint32_t
 418 gen6_blorp_emit_wm_constants(struct brw_context *brw,
 419                              const struct brw_blorp_params *params);
 420
 421 void
 422 gen6_blorp_emit_vs_disable(struct brw_context *brw,
 423                            const struct brw_blorp_params *params);
 424
 425 uint32_t
 426 gen6_blorp_emit_binding_table(struct brw_context *brw,
 427                               uint32_t wm_surf_offset_renderbuffer,
 428                               uint32_t wm_surf_offset_texture);
 429
 430 uint32_t
 431 gen6_blorp_emit_depth_stencil_state(struct brw_context *brw,
 432                                     const struct brw_blorp_params *params);
 433
 434 void
 435 gen6_blorp_emit_gs_disable(struct brw_context *brw,
 436                            const struct brw_blorp_params *params);
 437
 438 void
 439 gen6_blorp_emit_clip_disable(struct brw_context *brw);
 440
 441 void
 442 gen6_blorp_emit_drawing_rectangle(struct brw_context *brw,
 443                                   const struct brw_blorp_params *params);
 444
 445 uint32_t
 446 gen6_blorp_emit_sampler_state(struct brw_context *brw,
 447                               unsigned tex_filter, unsigned max_lod,
 448                               bool non_normalized_coords);
 449 void
 450 gen7_blorp_emit_urb_config(struct brw_context *brw,
 451                            const struct brw_blorp_params *params);
 452
 453 void
 454 gen7_blorp_emit_blend_state_pointer(struct brw_context *brw,
 455                                     uint32_t cc_blend_state_offset);
 456
 457 void
 458 gen7_blorp_emit_cc_state_pointer(struct brw_context *brw,
 459                                  uint32_t cc_state_offset);
 460
 461 void
 462 gen7_blorp_emit_cc_viewport(struct brw_context *brw);
 463
 464 void
 465 gen7_blorp_emit_te_disable(struct brw_context *brw);
 466
 467 void
 468 gen7_blorp_emit_binding_table_pointers_ps(struct brw_context *brw,
 469                                           uint32_t wm_bind_bo_offset);
 470
 471 void
 472 gen7_blorp_emit_sampler_state_pointers_ps(struct brw_context *brw,
 473                                           uint32_t sampler_offset);
 474
 475 void
 476 gen7_blorp_emit_clear_params(struct brw_context *brw,
 477                              const struct brw_blorp_params *params);
 478
 479 void
 480 gen7_blorp_emit_constant_ps(struct brw_context *brw,
 481                             uint32_t wm_push_const_offset);
 482
 483 void
 484 gen7_blorp_emit_constant_ps_disable(struct brw_context *brw);
 485
 486 void
 487 gen7_blorp_emit_primitive(struct brw_context *brw,
 488                           const struct brw_blorp_params *params);
 489
 490 /** \} */
 491
 492 #ifdef __cplusplus
 493 } /* end extern "C" */
 494 #endif /* __cplusplus */