2 * Copyright © 2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "main/teximage.h"
26 #include "glsl/ralloc.h"
28 #include "intel_fbo.h"
30 #include "brw_blorp.h"
31 #include "brw_context.h"
33 #include "brw_state.h"
37 * Helper function for handling mirror image blits.
39 * If coord0 > coord1, swap them and invert the "mirror" boolean.
42 fixup_mirroring(bool &mirror
, GLint
&coord0
, GLint
&coord1
)
44 if (coord0
> coord1
) {
54 * Adjust {src,dst}_x{0,1} to account for clipping and scissoring of
55 * destination coordinates.
57 * Return true if there is still blitting to do, false if all pixels got
58 * rejected by the clip and/or scissor.
60 * For clarity, the nomenclature of this function assumes we are clipping and
61 * scissoring the X coordinate; the exact same logic applies for Y
64 * Note: this function may also be used to account for clipping of source
65 * coordinates, by swapping the roles of src and dst.
68 clip_or_scissor(bool mirror
, GLint
&src_x0
, GLint
&src_x1
, GLint
&dst_x0
,
69 GLint
&dst_x1
, GLint fb_xmin
, GLint fb_xmax
)
71 /* If we are going to scissor everything away, stop. */
72 if (!(fb_xmin
< fb_xmax
&&
79 /* Clip the destination rectangle, and keep track of how many pixels we
80 * clipped off of the left and right sides of it.
82 GLint pixels_clipped_left
= 0;
83 GLint pixels_clipped_right
= 0;
84 if (dst_x0
< fb_xmin
) {
85 pixels_clipped_left
= fb_xmin
- dst_x0
;
88 if (fb_xmax
< dst_x1
) {
89 pixels_clipped_right
= dst_x1
- fb_xmax
;
93 /* If we are mirrored, then before applying pixels_clipped_{left,right} to
94 * the source coordinates, we need to flip them to account for the
98 GLint tmp
= pixels_clipped_left
;
99 pixels_clipped_left
= pixels_clipped_right
;
100 pixels_clipped_right
= tmp
;
103 /* Adjust the source rectangle to remove the pixels corresponding to those
104 * that were clipped/scissored out of the destination rectangle.
106 src_x0
+= pixels_clipped_left
;
107 src_x1
-= pixels_clipped_right
;
114 try_blorp_blit(struct intel_context
*intel
,
115 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
116 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
117 GLenum filter
, GLbitfield buffer_bit
)
119 struct gl_context
*ctx
= &intel
->ctx
;
121 /* Sync up the state of window system buffers. We need to do this before
122 * we go looking for the buffers.
124 intel_prepare_render(intel
);
127 const struct gl_framebuffer
*read_fb
= ctx
->ReadBuffer
;
128 const struct gl_framebuffer
*draw_fb
= ctx
->DrawBuffer
;
129 struct gl_renderbuffer
*src_rb
;
130 struct gl_renderbuffer
*dst_rb
;
131 switch (buffer_bit
) {
132 case GL_COLOR_BUFFER_BIT
:
133 src_rb
= read_fb
->_ColorReadBuffer
;
136 draw_fb
->_ColorDrawBufferIndexes
[0]].Renderbuffer
;
138 case GL_DEPTH_BUFFER_BIT
:
139 src_rb
= read_fb
->Attachment
[BUFFER_DEPTH
].Renderbuffer
;
140 dst_rb
= draw_fb
->Attachment
[BUFFER_DEPTH
].Renderbuffer
;
142 case GL_STENCIL_BUFFER_BIT
:
143 src_rb
= read_fb
->Attachment
[BUFFER_STENCIL
].Renderbuffer
;
144 dst_rb
= draw_fb
->Attachment
[BUFFER_STENCIL
].Renderbuffer
;
150 /* Validate source */
151 if (!src_rb
) return false;
152 struct intel_renderbuffer
*src_irb
= intel_renderbuffer(src_rb
);
153 struct intel_mipmap_tree
*src_mt
= src_irb
->mt
;
154 if (!src_mt
) return false;
155 if (buffer_bit
== GL_STENCIL_BUFFER_BIT
&& src_mt
->stencil_mt
)
156 src_mt
= src_mt
->stencil_mt
;
158 /* Validate destination */
159 if (!dst_rb
) return false;
160 struct intel_renderbuffer
*dst_irb
= intel_renderbuffer(dst_rb
);
161 struct intel_mipmap_tree
*dst_mt
= dst_irb
->mt
;
162 if (!dst_mt
) return false;
163 if (buffer_bit
== GL_STENCIL_BUFFER_BIT
&& dst_mt
->stencil_mt
)
164 dst_mt
= dst_mt
->stencil_mt
;
166 /* Blorp blits can't translate from one format to another. For that we'll
167 * have to fall back to the meta-op blit. Note: the meta-op blit doesn't
168 * support multisampled blits, but fortunately this is ok because
169 * multisampled blits require identical source and destination formats.
171 if (src_mt
->format
!= dst_mt
->format
)
174 /* Account for the fact that in the system framebuffer, the origin is at
177 if (read_fb
->Name
== 0) {
178 srcY0
= read_fb
->Height
- srcY0
;
179 srcY1
= read_fb
->Height
- srcY1
;
181 if (draw_fb
->Name
== 0) {
182 dstY0
= draw_fb
->Height
- dstY0
;
183 dstY1
= draw_fb
->Height
- dstY1
;
186 /* Detect if the blit needs to be mirrored */
187 bool mirror_x
= false, mirror_y
= false;
188 fixup_mirroring(mirror_x
, srcX0
, srcX1
);
189 fixup_mirroring(mirror_x
, dstX0
, dstX1
);
190 fixup_mirroring(mirror_y
, srcY0
, srcY1
);
191 fixup_mirroring(mirror_y
, dstY0
, dstY1
);
193 /* Make sure width and height match */
194 GLsizei width
= srcX1
- srcX0
;
195 GLsizei height
= srcY1
- srcY0
;
196 if (width
!= dstX1
- dstX0
) return false;
197 if (height
!= dstY1
- dstY0
) return false;
199 /* If the destination rectangle needs to be clipped or scissored, do so.
201 if (!(clip_or_scissor(mirror_x
, srcX0
, srcX1
, dstX0
, dstX1
,
202 draw_fb
->_Xmin
, draw_fb
->_Xmax
) &&
203 clip_or_scissor(mirror_y
, srcY0
, srcY1
, dstY0
, dstY1
,
204 draw_fb
->_Ymin
, draw_fb
->_Ymax
))) {
205 /* Everything got clipped/scissored away, so the blit was successful. */
209 /* If the source rectangle needs to be clipped or scissored, do so. */
210 if (!(clip_or_scissor(mirror_x
, dstX0
, dstX1
, srcX0
, srcX1
,
211 0, read_fb
->Width
) &&
212 clip_or_scissor(mirror_y
, dstY0
, dstY1
, srcY0
, srcY1
,
213 0, read_fb
->Height
))) {
214 /* Everything got clipped/scissored away, so the blit was successful. */
218 /* Get ready to blit. This includes depth resolving the src and dst
219 * buffers if necessary.
221 intel_renderbuffer_resolve_depth(intel
, src_irb
);
222 intel_renderbuffer_resolve_depth(intel
, dst_irb
);
225 brw_blorp_blit_params
params(brw_context(ctx
), src_mt
, dst_mt
,
226 srcX0
, srcY0
, dstX0
, dstY0
, dstX1
, dstY1
,
228 brw_blorp_exec(intel
, ¶ms
);
230 /* Mark the dst buffer as needing a HiZ resolve if necessary. */
231 intel_renderbuffer_set_needs_hiz_resolve(dst_irb
);
237 brw_blorp_framebuffer(struct intel_context
*intel
,
238 GLint srcX0
, GLint srcY0
, GLint srcX1
, GLint srcY1
,
239 GLint dstX0
, GLint dstY0
, GLint dstX1
, GLint dstY1
,
240 GLbitfield mask
, GLenum filter
)
242 /* BLORP is not supported before Gen6. */
246 static GLbitfield buffer_bits
[] = {
249 GL_STENCIL_BUFFER_BIT
,
252 for (unsigned int i
= 0; i
< ARRAY_SIZE(buffer_bits
); ++i
) {
253 if ((mask
& buffer_bits
[i
]) &&
254 try_blorp_blit(intel
,
255 srcX0
, srcY0
, srcX1
, srcY1
,
256 dstX0
, dstY0
, dstX1
, dstY1
,
257 filter
, buffer_bits
[i
])) {
258 mask
&= ~buffer_bits
[i
];
267 * Enum to specify the order of arguments in a sampler message
269 enum sampler_message_arg
271 SAMPLER_MESSAGE_ARG_U_FLOAT
,
272 SAMPLER_MESSAGE_ARG_V_FLOAT
,
273 SAMPLER_MESSAGE_ARG_U_INT
,
274 SAMPLER_MESSAGE_ARG_V_INT
,
275 SAMPLER_MESSAGE_ARG_SI_INT
,
276 SAMPLER_MESSAGE_ARG_ZERO_INT
,
280 * Generator for WM programs used in BLORP blits.
282 * The bulk of the work done by the WM program is to wrap and unwrap the
283 * coordinate transformations used by the hardware to store surfaces in
284 * memory. The hardware transforms a pixel location (X, Y, S) (where S is the
285 * sample index for a multisampled surface) to a memory offset by the
286 * following formulas:
288 * offset = tile(tiling_format, encode_msaa(num_samples, layout, X, Y, S))
289 * (X, Y, S) = decode_msaa(num_samples, layout, detile(tiling_format, offset))
291 * For a single-sampled surface, or for a multisampled surface that stores
292 * each sample in a different array slice, encode_msaa() and decode_msaa are
293 * the identity function:
295 * encode_msaa(1, N/A, X, Y, 0) = (X, Y, 0)
296 * decode_msaa(1, N/A, X, Y, 0) = (X, Y, 0)
297 * encode_msaa(n, sliced, X, Y, S) = (X, Y, S)
298 * decode_msaa(n, sliced, X, Y, S) = (X, Y, S)
300 * For a 4x interleaved multisampled surface, encode_msaa() embeds the sample
301 * number into bit 1 of the X and Y coordinates:
303 * encode_msaa(4, interleaved, X, Y, S) = (X', Y', 0)
304 * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
305 * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1)
306 * decode_msaa(4, interleaved, X, Y, 0) = (X', Y', S)
307 * where X' = (X & ~0b11) >> 1 | (X & 0b1)
308 * Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
309 * S = (Y & 0b10) | (X & 0b10) >> 1
311 * For X tiling, tile() combines together the low-order bits of the X and Y
312 * coordinates in the pattern 0byyyxxxxxxxxx, creating 4k tiles that are 512
313 * bytes wide and 8 rows high:
315 * tile(x_tiled, X, Y, S) = A
316 * where A = tile_num << 12 | offset
317 * tile_num = (Y' >> 3) * tile_pitch + (X' >> 9)
318 * offset = (Y' & 0b111) << 9
319 * | (X & 0b111111111)
321 * Y' = Y + S * qpitch
322 * detile(x_tiled, A) = (X, Y, S)
326 * Y' = (tile_num / tile_pitch) << 3
327 * | (A & 0b111000000000) >> 9
328 * X' = (tile_num % tile_pitch) << 9
329 * | (A & 0b111111111)
331 * (In all tiling formulas, cpp is the number of bytes occupied by a single
332 * sample ("chars per pixel"), tile_pitch is the number of 4k tiles required
333 * to fill the width of the surface, and qpitch is the spacing (in rows)
334 * between array slices).
336 * For Y tiling, tile() combines together the low-order bits of the X and Y
337 * coordinates in the pattern 0bxxxyyyyyxxxx, creating 4k tiles that are 128
338 * bytes wide and 32 rows high:
340 * tile(y_tiled, X, Y, S) = A
341 * where A = tile_num << 12 | offset
342 * tile_num = (Y' >> 5) * tile_pitch + (X' >> 7)
343 * offset = (X' & 0b1110000) << 5
344 * | (Y' & 0b11111) << 4
347 * Y' = Y + S * qpitch
348 * detile(y_tiled, A) = (X, Y, S)
352 * Y' = (tile_num / tile_pitch) << 5
353 * | (A & 0b111110000) >> 4
354 * X' = (tile_num % tile_pitch) << 7
355 * | (A & 0b111000000000) >> 5
358 * For W tiling, tile() combines together the low-order bits of the X and Y
359 * coordinates in the pattern 0bxxxyyyyxyxyx, creating 4k tiles that are 64
360 * bytes wide and 64 rows high (note that W tiling is only used for stencil
361 * buffers, which always have cpp = 1 and S=0):
363 * tile(w_tiled, X, Y, S) = A
364 * where A = tile_num << 12 | offset
365 * tile_num = (Y' >> 6) * tile_pitch + (X' >> 6)
366 * offset = (X' & 0b111000) << 6
367 * | (Y' & 0b111100) << 3
368 * | (X' & 0b100) << 2
374 * Y' = Y + S * qpitch
375 * detile(w_tiled, A) = (X, Y, S)
376 * where X = X' / cpp = X'
377 * Y = Y' % qpitch = Y'
379 * Y' = (tile_num / tile_pitch) << 6
380 * | (A & 0b111100000) >> 3
381 * | (A & 0b1000) >> 2
383 * X' = (tile_num % tile_pitch) << 6
384 * | (A & 0b111000000000) >> 6
385 * | (A & 0b10000) >> 2
389 * Finally, for a non-tiled surface, tile() simply combines together the X and
390 * Y coordinates in the natural way:
392 * tile(untiled, X, Y, S) = A
393 * where A = Y * pitch + X'
395 * Y' = Y + S * qpitch
396 * detile(untiled, A) = (X, Y, S)
403 * (In these formulas, pitch is the number of bytes occupied by a single row
406 class brw_blorp_blit_program
409 brw_blorp_blit_program(struct brw_context
*brw
,
410 const brw_blorp_blit_prog_key
*key
);
411 ~brw_blorp_blit_program();
413 const GLuint
*compile(struct brw_context
*brw
, GLuint
*program_size
);
415 brw_blorp_prog_data prog_data
;
419 void alloc_push_const_regs(int base_reg
);
420 void compute_frag_coords();
421 void translate_tiling(bool old_tiled_w
, bool new_tiled_w
);
422 void encode_msaa(unsigned num_samples
, bool interleaved
);
423 void decode_msaa(unsigned num_samples
, bool interleaved
);
424 void kill_if_outside_dst_rect();
425 void translate_dst_to_src();
426 void single_to_blend();
428 void sample(struct brw_reg dst
);
429 void texel_fetch(struct brw_reg dst
);
430 void expand_to_32_bits(struct brw_reg src
, struct brw_reg dst
);
431 void texture_lookup(struct brw_reg dst
, GLuint msg_type
,
432 const sampler_message_arg
*args
, int num_args
);
433 void render_target_write();
436 struct brw_context
*brw
;
437 const brw_blorp_blit_prog_key
*key
;
438 struct brw_compile func
;
440 /* Thread dispatch header */
443 /* Pixel X/Y coordinates (always in R1). */
447 struct brw_reg dst_x0
;
448 struct brw_reg dst_x1
;
449 struct brw_reg dst_y0
;
450 struct brw_reg dst_y1
;
452 struct brw_reg multiplier
;
453 struct brw_reg offset
;
454 } x_transform
, y_transform
;
456 /* Data to be written to render target (4 vec16's) */
457 struct brw_reg result
;
459 /* Auxiliary storage for data returned by a sampling operation when
460 * blending (4 vec16's)
462 struct brw_reg texture_data
;
464 /* X coordinates. We have two of them so that we can perform coordinate
465 * transformations easily.
467 struct brw_reg x_coords
[2];
469 /* Y coordinates. We have two of them so that we can perform coordinate
470 * transformations easily.
472 struct brw_reg y_coords
[2];
474 /* Which element of x_coords and y_coords is currently in use.
478 /* True if, at the point in the program currently being compiled, the
479 * sample index is known to be zero.
483 /* Register storing the sample index when s_is_zero is false. */
484 struct brw_reg sample_index
;
490 /* MRF used for sampling and render target writes */
494 brw_blorp_blit_program::brw_blorp_blit_program(
495 struct brw_context
*brw
,
496 const brw_blorp_blit_prog_key
*key
)
497 : mem_ctx(ralloc_context(NULL
)),
501 brw_init_compile(brw
, &func
, mem_ctx
);
504 brw_blorp_blit_program::~brw_blorp_blit_program()
506 ralloc_free(mem_ctx
);
510 brw_blorp_blit_program::compile(struct brw_context
*brw
,
511 GLuint
*program_size
)
514 if (key
->dst_tiled_w
&& key
->rt_samples
> 0) {
515 /* If the destination image is W tiled and multisampled, then the thread
516 * must be dispatched once per sample, not once per pixel. This is
517 * necessary because after conversion between W and Y tiling, there's no
518 * guarantee that all samples corresponding to a single pixel will still
521 assert(key
->persample_msaa_dispatch
);
525 /* We are blending, which means we won't have an opportunity to
526 * translate the tiling and sample count for the texture surface. So
527 * the surface state for the texture must be configured with the correct
528 * tiling and sample count.
530 assert(!key
->src_tiled_w
);
531 assert(key
->tex_samples
== key
->src_samples
);
532 assert(key
->tex_interleaved
== key
->src_interleaved
);
533 assert(key
->tex_samples
> 0);
536 if (key
->persample_msaa_dispatch
) {
537 /* It only makes sense to do persample dispatch if the render target is
538 * configured as multisampled.
540 assert(key
->rt_samples
> 0);
543 /* Interleaved only makes sense on MSAA surfaces */
544 if (key
->tex_interleaved
) assert(key
->tex_samples
> 0);
545 if (key
->src_interleaved
) assert(key
->src_samples
> 0);
546 if (key
->dst_interleaved
) assert(key
->dst_samples
> 0);
548 /* Set up prog_data */
549 memset(&prog_data
, 0, sizeof(prog_data
));
550 prog_data
.persample_msaa_dispatch
= key
->persample_msaa_dispatch
;
552 brw_set_compression_control(&func
, BRW_COMPRESSION_NONE
);
555 compute_frag_coords();
557 /* Render target and texture hardware don't support W tiling. */
558 const bool rt_tiled_w
= false;
559 const bool tex_tiled_w
= false;
561 /* The address that data will be written to is determined by the
562 * coordinates supplied to the WM thread and the tiling and sample count of
563 * the render target, according to the formula:
565 * (X, Y, S) = decode_msaa(rt_samples, detile(rt_tiling, offset))
567 * If the actual tiling and sample count of the destination surface are not
568 * the same as the configuration of the render target, then these
569 * coordinates are wrong and we have to adjust them to compensate for the
572 if (rt_tiled_w
!= key
->dst_tiled_w
||
573 key
->rt_samples
!= key
->dst_samples
||
574 key
->rt_interleaved
!= key
->dst_interleaved
) {
575 encode_msaa(key
->rt_samples
, key
->rt_interleaved
);
576 /* Now (X, Y, S) = detile(rt_tiling, offset) */
577 translate_tiling(rt_tiled_w
, key
->dst_tiled_w
);
578 /* Now (X, Y, S) = detile(dst_tiling, offset) */
579 decode_msaa(key
->dst_samples
, key
->dst_interleaved
);
582 /* Now (X, Y, S) = decode_msaa(dst_samples, detile(dst_tiling, offset)).
584 * That is: X, Y and S now contain the true coordinates and sample index of
585 * the data that the WM thread should output.
587 * If we need to kill pixels that are outside the destination rectangle,
588 * now is the time to do it.
592 kill_if_outside_dst_rect();
594 /* Next, apply a translation to obtain coordinates in the source image. */
595 translate_dst_to_src();
597 /* If the source image is not multisampled, then we want to fetch sample
598 * number 0, because that's the only sample there is.
600 if (key
->src_samples
== 0)
603 /* X, Y, and S are now the coordinates of the pixel in the source image
604 * that we want to texture from. Exception: if we are blending, then S is
605 * irrelevant, because we are going to fetch all samples.
608 if (brw
->intel
.gen
== 6) {
609 /* Gen6 hardware an automatically blend using the SAMPLE message */
613 /* Gen7+ hardware doesn't automaticaly blend. */
617 /* We aren't blending, which means we just want to fetch a single sample
618 * from the source surface. The address that we want to fetch from is
619 * related to the X, Y and S values according to the formula:
621 * (X, Y, S) = decode_msaa(src_samples, detile(src_tiling, offset)).
623 * If the actual tiling and sample count of the source surface are not
624 * the same as the configuration of the texture, then we need to adjust
625 * the coordinates to compensate for the difference.
627 if (tex_tiled_w
!= key
->src_tiled_w
||
628 key
->tex_samples
!= key
->src_samples
||
629 key
->tex_interleaved
!= key
->src_interleaved
) {
630 encode_msaa(key
->src_samples
, key
->src_interleaved
);
631 /* Now (X, Y, S) = detile(src_tiling, offset) */
632 translate_tiling(key
->src_tiled_w
, tex_tiled_w
);
633 /* Now (X, Y, S) = detile(tex_tiling, offset) */
634 decode_msaa(key
->tex_samples
, key
->tex_interleaved
);
637 /* Now (X, Y, S) = decode_msaa(tex_samples, detile(tex_tiling, offset)).
639 * In other words: X, Y, and S now contain values which, when passed to
640 * the texturing unit, will cause data to be read from the correct
641 * memory location. So we can fetch the texel now.
646 /* Finally, write the fetched (or blended) value to the render target and
647 * terminate the thread.
649 render_target_write();
650 return brw_get_program(&func
, program_size
);
654 brw_blorp_blit_program::alloc_push_const_regs(int base_reg
)
656 #define CONST_LOC(name) offsetof(brw_blorp_wm_push_constants, name)
657 #define ALLOC_REG(name) \
659 brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, base_reg, CONST_LOC(name) / 2)
665 ALLOC_REG(x_transform
.multiplier
);
666 ALLOC_REG(x_transform
.offset
);
667 ALLOC_REG(y_transform
.multiplier
);
668 ALLOC_REG(y_transform
.offset
);
674 brw_blorp_blit_program::alloc_regs()
677 this->R0
= retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
);
678 this->R1
= retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
);
679 prog_data
.first_curbe_grf
= reg
;
680 alloc_push_const_regs(reg
);
681 reg
+= BRW_BLORP_NUM_PUSH_CONST_REGS
;
682 this->result
= vec16(brw_vec8_grf(reg
, 0)); reg
+= 8;
683 this->texture_data
= vec16(brw_vec8_grf(reg
, 0)); reg
+= 8;
684 for (int i
= 0; i
< 2; ++i
) {
686 = vec16(retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
));
688 = vec16(retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
));
690 this->xy_coord_index
= 0;
692 = vec16(retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
));
693 this->t1
= vec16(retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
));
694 this->t2
= vec16(retype(brw_vec8_grf(reg
++, 0), BRW_REGISTER_TYPE_UW
));
697 this->base_mrf
= mrf
;
700 /* In the code that follows, X and Y can be used to quickly refer to the
701 * active elements of x_coords and y_coords, and Xp and Yp ("X prime" and "Y
702 * prime") to the inactive elements.
704 * S can be used to quickly refer to sample_index.
706 #define X x_coords[xy_coord_index]
707 #define Y y_coords[xy_coord_index]
708 #define Xp x_coords[!xy_coord_index]
709 #define Yp y_coords[!xy_coord_index]
710 #define S sample_index
712 /* Quickly swap the roles of (X, Y) and (Xp, Yp). Saves us from having to do
713 * MOVs to transfor (Xp, Yp) to (X, Y) after a coordinate transformation.
715 #define SWAP_XY_AND_XPYP() xy_coord_index = !xy_coord_index;
718 * Emit code to compute the X and Y coordinates of the pixels being rendered
719 * by this WM invocation.
721 * Assuming the render target is set up for Y tiling, these (X, Y) values are
722 * related to the address offset where outputs will be written by the formula:
724 * (X, Y, S) = decode_msaa(detile(offset)).
726 * (See brw_blorp_blit_program).
729 brw_blorp_blit_program::compute_frag_coords()
731 /* R1.2[15:0] = X coordinate of upper left pixel of subspan 0 (pixel 0)
732 * R1.3[15:0] = X coordinate of upper left pixel of subspan 1 (pixel 4)
733 * R1.4[15:0] = X coordinate of upper left pixel of subspan 2 (pixel 8)
734 * R1.5[15:0] = X coordinate of upper left pixel of subspan 3 (pixel 12)
736 * Pixels within a subspan are laid out in this arrangement:
740 * So, to compute the coordinates of each pixel, we need to read every 2nd
741 * 16-bit value (vstride=2) from R1, starting at the 4th 16-bit value
742 * (suboffset=4), and duplicate each value 4 times (hstride=0, width=4).
743 * In other words, the data we want to access is R1.4<2;4,0>UW.
745 * Then, we need to add the repeating sequence (0, 1, 0, 1, ...) to the
746 * result, since pixels n+1 and n+3 are in the right half of the subspan.
748 brw_ADD(&func
, X
, stride(suboffset(R1
, 4), 2, 4, 0), brw_imm_v(0x10101010));
750 /* Similarly, Y coordinates for subspans come from R1.2[31:16] through
751 * R1.5[31:16], so to get pixel Y coordinates we need to start at the 5th
752 * 16-bit value instead of the 4th (R1.5<2;4,0>UW instead of
755 * And we need to add the repeating sequence (0, 0, 1, 1, ...), since
756 * pixels n+2 and n+3 are in the bottom half of the subspan.
758 brw_ADD(&func
, Y
, stride(suboffset(R1
, 5), 2, 4, 0), brw_imm_v(0x11001100));
760 if (key
->persample_msaa_dispatch
) {
761 /* The WM will be run in MSDISPMODE_PERSAMPLE with num_samples > 0.
762 * Therefore, subspan 0 will represent sample 0, subspan 1 will
763 * represent sample 1, and so on.
765 * So we need to populate S with the sequence (0, 0, 0, 0, 1, 1, 1, 1,
766 * 2, 2, 2, 2, 3, 3, 3, 3). The easiest way to do this is to populate a
767 * temporary variable with the sequence (0, 1, 2, 3), and then copy from
768 * it using vstride=1, width=4, hstride=0.
770 * TODO: implement the necessary calculation for 8x multisampling.
772 brw_MOV(&func
, t1
, brw_imm_v(0x3210));
773 brw_MOV(&func
, S
, stride(t1
, 1, 4, 0));
776 /* Either the destination surface is single-sampled, or the WM will be
777 * run in MSDISPMODE_PERPIXEL (which causes a single fragment dispatch
778 * per pixel). In either case, it's not meaningful to compute a sample
779 * value. Just set it to 0.
786 * Emit code to compensate for the difference between Y and W tiling.
788 * This code modifies the X and Y coordinates according to the formula:
790 * (X', Y', S') = detile(new_tiling, tile(old_tiling, X, Y, S))
792 * (See brw_blorp_blit_program).
794 * It can only translate between W and Y tiling, so new_tiling and old_tiling
795 * are booleans where true represents W tiling and false represents Y tiling.
798 brw_blorp_blit_program::translate_tiling(bool old_tiled_w
, bool new_tiled_w
)
800 if (old_tiled_w
== new_tiled_w
)
803 /* In the code that follows, we can safely assume that S = 0, because W
804 * tiling formats always use interleaved encoding.
809 /* Given X and Y coordinates that describe an address using Y tiling,
810 * translate to the X and Y coordinates that describe the same address
813 * If we break down the low order bits of X and Y, using a
814 * single letter to represent each low-order bit:
816 * X = A << 7 | 0bBCDEFGH
817 * Y = J << 5 | 0bKLMNP (1)
819 * Then we can apply the Y tiling formula to see the memory offset being
822 * offset = (J * tile_pitch + A) << 12 | 0bBCDKLMNPEFGH (2)
824 * If we apply the W detiling formula to this memory location, that the
825 * corresponding X' and Y' coordinates are:
827 * X' = A << 6 | 0bBCDPFH (3)
828 * Y' = J << 6 | 0bKLMNEG
830 * Combining (1) and (3), we see that to transform (X, Y) to (X', Y'),
831 * we need to make the following computation:
833 * X' = (X & ~0b1011) >> 1 | (Y & 0b1) << 2 | X & 0b1 (4)
834 * Y' = (Y & ~0b1) << 1 | (X & 0b1000) >> 2 | (X & 0b10) >> 1
836 brw_AND(&func
, t1
, X
, brw_imm_uw(0xfff4)); /* X & ~0b1011 */
837 brw_SHR(&func
, t1
, t1
, brw_imm_uw(1)); /* (X & ~0b1011) >> 1 */
838 brw_AND(&func
, t2
, Y
, brw_imm_uw(1)); /* Y & 0b1 */
839 brw_SHL(&func
, t2
, t2
, brw_imm_uw(2)); /* (Y & 0b1) << 2 */
840 brw_OR(&func
, t1
, t1
, t2
); /* (X & ~0b1011) >> 1 | (Y & 0b1) << 2 */
841 brw_AND(&func
, t2
, X
, brw_imm_uw(1)); /* X & 0b1 */
842 brw_OR(&func
, Xp
, t1
, t2
);
843 brw_AND(&func
, t1
, Y
, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
844 brw_SHL(&func
, t1
, t1
, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
845 brw_AND(&func
, t2
, X
, brw_imm_uw(8)); /* X & 0b1000 */
846 brw_SHR(&func
, t2
, t2
, brw_imm_uw(2)); /* (X & 0b1000) >> 2 */
847 brw_OR(&func
, t1
, t1
, t2
); /* (Y & ~0b1) << 1 | (X & 0b1000) >> 2 */
848 brw_AND(&func
, t2
, X
, brw_imm_uw(2)); /* X & 0b10 */
849 brw_SHR(&func
, t2
, t2
, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
850 brw_OR(&func
, Yp
, t1
, t2
);
853 /* Applying the same logic as above, but in reverse, we obtain the
856 * X' = (X & ~0b101) << 1 | (Y & 0b10) << 2 | (Y & 0b1) << 1 | X & 0b1
857 * Y' = (Y & ~0b11) >> 1 | (X & 0b100) >> 2
859 brw_AND(&func
, t1
, X
, brw_imm_uw(0xfffa)); /* X & ~0b101 */
860 brw_SHL(&func
, t1
, t1
, brw_imm_uw(1)); /* (X & ~0b101) << 1 */
861 brw_AND(&func
, t2
, Y
, brw_imm_uw(2)); /* Y & 0b10 */
862 brw_SHL(&func
, t2
, t2
, brw_imm_uw(2)); /* (Y & 0b10) << 2 */
863 brw_OR(&func
, t1
, t1
, t2
); /* (X & ~0b101) << 1 | (Y & 0b10) << 2 */
864 brw_AND(&func
, t2
, Y
, brw_imm_uw(1)); /* Y & 0b1 */
865 brw_SHL(&func
, t2
, t2
, brw_imm_uw(1)); /* (Y & 0b1) << 1 */
866 brw_OR(&func
, t1
, t1
, t2
); /* (X & ~0b101) << 1 | (Y & 0b10) << 2
868 brw_AND(&func
, t2
, X
, brw_imm_uw(1)); /* X & 0b1 */
869 brw_OR(&func
, Xp
, t1
, t2
);
870 brw_AND(&func
, t1
, Y
, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
871 brw_SHR(&func
, t1
, t1
, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
872 brw_AND(&func
, t2
, X
, brw_imm_uw(4)); /* X & 0b100 */
873 brw_SHR(&func
, t2
, t2
, brw_imm_uw(2)); /* (X & 0b100) >> 2 */
874 brw_OR(&func
, Yp
, t1
, t2
);
880 * Emit code to compensate for the difference between MSAA and non-MSAA
883 * This code modifies the X and Y coordinates according to the formula:
885 * (X', Y', S') = encode_msaa_4x(X, Y, S)
887 * (See brw_blorp_blit_program).
890 brw_blorp_blit_program::encode_msaa(unsigned num_samples
, bool interleaved
)
892 if (num_samples
== 0) {
893 /* No translation necessary, and S should already be zero. */
895 } else if (!interleaved
) {
896 /* No translation necessary. */
898 /* encode_msaa(4, interleaved, X, Y, S) = (X', Y', 0)
899 * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
900 * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1)
902 brw_AND(&func
, t1
, X
, brw_imm_uw(0xfffe)); /* X & ~0b1 */
904 brw_AND(&func
, t2
, S
, brw_imm_uw(1)); /* S & 0b1 */
905 brw_OR(&func
, t1
, t1
, t2
); /* (X & ~0b1) | (S & 0b1) */
907 brw_SHL(&func
, t1
, t1
, brw_imm_uw(1)); /* (X & ~0b1) << 1
909 brw_AND(&func
, t2
, X
, brw_imm_uw(1)); /* X & 0b1 */
910 brw_OR(&func
, Xp
, t1
, t2
);
911 brw_AND(&func
, t1
, Y
, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
912 brw_SHL(&func
, t1
, t1
, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
914 brw_AND(&func
, t2
, S
, brw_imm_uw(2)); /* S & 0b10 */
915 brw_OR(&func
, t1
, t1
, t2
); /* (Y & ~0b1) << 1 | (S & 0b10) */
917 brw_AND(&func
, t2
, Y
, brw_imm_uw(1));
918 brw_OR(&func
, Yp
, t1
, t2
);
925 * Emit code to compensate for the difference between MSAA and non-MSAA
928 * This code modifies the X and Y coordinates according to the formula:
930 * (X', Y', S) = decode_msaa(num_samples, X, Y, S)
932 * (See brw_blorp_blit_program).
935 brw_blorp_blit_program::decode_msaa(unsigned num_samples
, bool interleaved
)
937 if (num_samples
== 0) {
938 /* No translation necessary, and S should already be zero. */
940 } else if (!interleaved
) {
941 /* No translation necessary. */
943 /* decode_msaa(4, interleaved, X, Y, 0) = (X', Y', S)
944 * where X' = (X & ~0b11) >> 1 | (X & 0b1)
945 * Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
946 * S = (Y & 0b10) | (X & 0b10) >> 1
949 brw_AND(&func
, t1
, X
, brw_imm_uw(0xfffc)); /* X & ~0b11 */
950 brw_SHR(&func
, t1
, t1
, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
951 brw_AND(&func
, t2
, X
, brw_imm_uw(1)); /* X & 0b1 */
952 brw_OR(&func
, Xp
, t1
, t2
);
953 brw_AND(&func
, t1
, Y
, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
954 brw_SHR(&func
, t1
, t1
, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
955 brw_AND(&func
, t2
, Y
, brw_imm_uw(1)); /* Y & 0b1 */
956 brw_OR(&func
, Yp
, t1
, t2
);
957 brw_AND(&func
, t1
, Y
, brw_imm_uw(2)); /* Y & 0b10 */
958 brw_AND(&func
, t2
, X
, brw_imm_uw(2)); /* X & 0b10 */
959 brw_SHR(&func
, t2
, t2
, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
960 brw_OR(&func
, S
, t1
, t2
);
967 * Emit code that kills pixels whose X and Y coordinates are outside the
968 * boundary of the rectangle defined by the push constants (dst_x0, dst_y0,
972 brw_blorp_blit_program::kill_if_outside_dst_rect()
974 struct brw_reg f0
= brw_flag_reg();
975 struct brw_reg g1
= retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW
);
976 struct brw_reg null16
= vec16(retype(brw_null_reg(), BRW_REGISTER_TYPE_UW
));
978 brw_CMP(&func
, null16
, BRW_CONDITIONAL_GE
, X
, dst_x0
);
979 brw_CMP(&func
, null16
, BRW_CONDITIONAL_GE
, Y
, dst_y0
);
980 brw_CMP(&func
, null16
, BRW_CONDITIONAL_L
, X
, dst_x1
);
981 brw_CMP(&func
, null16
, BRW_CONDITIONAL_L
, Y
, dst_y1
);
983 brw_set_predicate_control(&func
, BRW_PREDICATE_NONE
);
984 brw_push_insn_state(&func
);
985 brw_set_mask_control(&func
, BRW_MASK_DISABLE
);
986 brw_AND(&func
, g1
, f0
, g1
);
987 brw_pop_insn_state(&func
);
991 * Emit code to translate from destination (X, Y) coordinates to source (X, Y)
995 brw_blorp_blit_program::translate_dst_to_src()
997 brw_MUL(&func
, Xp
, X
, x_transform
.multiplier
);
998 brw_MUL(&func
, Yp
, Y
, y_transform
.multiplier
);
999 brw_ADD(&func
, Xp
, Xp
, x_transform
.offset
);
1000 brw_ADD(&func
, Yp
, Yp
, y_transform
.offset
);
1005 * Emit code to transform the X and Y coordinates as needed for blending
1006 * together the different samples in an MSAA texture.
1009 brw_blorp_blit_program::single_to_blend()
1011 /* When looking up samples in an MSAA texture using the SAMPLE message,
1012 * Gen6 requires the texture coordinates to be odd integers (so that they
1013 * correspond to the center of a 2x2 block representing the four samples
1014 * that maxe up a pixel). So we need to multiply our X and Y coordinates
1015 * each by 2 and then add 1.
1017 brw_SHL(&func
, t1
, X
, brw_imm_w(1));
1018 brw_SHL(&func
, t2
, Y
, brw_imm_w(1));
1019 brw_ADD(&func
, Xp
, t1
, brw_imm_w(1));
1020 brw_ADD(&func
, Yp
, t2
, brw_imm_w(1));
1025 brw_blorp_blit_program::manual_blend()
1027 /* TODO: support num_samples != 4 */
1028 const int num_samples
= 4;
1030 /* Gather sample 0 data first */
1032 texel_fetch(result
);
1034 /* Gather data for remaining samples and accumulate it into result. */
1036 for (int i
= 1; i
< num_samples
; ++i
) {
1037 brw_MOV(&func
, S
, brw_imm_uw(i
));
1038 texel_fetch(texture_data
);
1040 /* TODO: should use a smaller loop bound for non-RGBA formats */
1041 for (int j
= 0; j
< 4; ++j
) {
1042 brw_ADD(&func
, offset(result
, 2*j
), offset(vec8(result
), 2*j
),
1043 offset(vec8(texture_data
), 2*j
));
1047 /* Scale the result down by a factor of num_samples */
1048 /* TODO: should use a smaller loop bound for non-RGBA formats */
1049 for (int j
= 0; j
< 4; ++j
) {
1050 brw_MUL(&func
, offset(result
, 2*j
), offset(vec8(result
), 2*j
),
1051 brw_imm_f(1.0/num_samples
));
1056 * Emit code to look up a value in the texture using the SAMPLE message (which
1057 * does blending of MSAA surfaces).
1060 brw_blorp_blit_program::sample(struct brw_reg dst
)
1062 static const sampler_message_arg args
[2] = {
1063 SAMPLER_MESSAGE_ARG_U_FLOAT
,
1064 SAMPLER_MESSAGE_ARG_V_FLOAT
1067 texture_lookup(dst
, GEN5_SAMPLER_MESSAGE_SAMPLE
, args
, ARRAY_SIZE(args
));
1071 * Emit code to look up a value in the texture using the SAMPLE_LD message
1072 * (which does a simple texel fetch).
1075 brw_blorp_blit_program::texel_fetch(struct brw_reg dst
)
1077 static const sampler_message_arg gen6_args
[5] = {
1078 SAMPLER_MESSAGE_ARG_U_INT
,
1079 SAMPLER_MESSAGE_ARG_V_INT
,
1080 SAMPLER_MESSAGE_ARG_ZERO_INT
, /* R */
1081 SAMPLER_MESSAGE_ARG_ZERO_INT
, /* LOD */
1082 SAMPLER_MESSAGE_ARG_SI_INT
1084 static const sampler_message_arg gen7_ld_args
[3] = {
1085 SAMPLER_MESSAGE_ARG_U_INT
,
1086 SAMPLER_MESSAGE_ARG_ZERO_INT
, /* LOD */
1087 SAMPLER_MESSAGE_ARG_V_INT
1089 static const sampler_message_arg gen7_ld2dss_args
[3] = {
1090 SAMPLER_MESSAGE_ARG_SI_INT
,
1091 SAMPLER_MESSAGE_ARG_U_INT
,
1092 SAMPLER_MESSAGE_ARG_V_INT
1095 switch (brw
->intel
.gen
) {
1097 texture_lookup(dst
, GEN5_SAMPLER_MESSAGE_SAMPLE_LD
, gen6_args
,
1101 if (key
->tex_samples
> 0) {
1102 texture_lookup(dst
, GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS
,
1103 gen7_ld2dss_args
, ARRAY_SIZE(gen7_ld2dss_args
));
1106 texture_lookup(dst
, GEN5_SAMPLER_MESSAGE_SAMPLE_LD
, gen7_ld_args
,
1107 ARRAY_SIZE(gen7_ld_args
));
1111 assert(!"Should not get here.");
1117 brw_blorp_blit_program::expand_to_32_bits(struct brw_reg src
,
1120 brw_MOV(&func
, vec8(dst
), vec8(src
));
1121 brw_set_compression_control(&func
, BRW_COMPRESSION_2NDHALF
);
1122 brw_MOV(&func
, offset(vec8(dst
), 1), suboffset(vec8(src
), 8));
1123 brw_set_compression_control(&func
, BRW_COMPRESSION_NONE
);
1127 brw_blorp_blit_program::texture_lookup(struct brw_reg dst
,
1129 const sampler_message_arg
*args
,
1132 struct brw_reg mrf
=
1133 retype(vec16(brw_message_reg(base_mrf
)), BRW_REGISTER_TYPE_UD
);
1134 for (int arg
= 0; arg
< num_args
; ++arg
) {
1135 switch (args
[arg
]) {
1136 case SAMPLER_MESSAGE_ARG_U_FLOAT
:
1137 expand_to_32_bits(X
, retype(mrf
, BRW_REGISTER_TYPE_F
));
1139 case SAMPLER_MESSAGE_ARG_V_FLOAT
:
1140 expand_to_32_bits(Y
, retype(mrf
, BRW_REGISTER_TYPE_F
));
1142 case SAMPLER_MESSAGE_ARG_U_INT
:
1143 expand_to_32_bits(X
, mrf
);
1145 case SAMPLER_MESSAGE_ARG_V_INT
:
1146 expand_to_32_bits(Y
, mrf
);
1148 case SAMPLER_MESSAGE_ARG_SI_INT
:
1149 /* Note: on Gen7, this code may be reached with s_is_zero==true
1150 * because in Gen7's ld2dss message, the sample index is the first
1151 * argument. When this happens, we need to move a 0 into the
1152 * appropriate message register.
1155 brw_MOV(&func
, mrf
, brw_imm_ud(0));
1157 expand_to_32_bits(S
, mrf
);
1159 case SAMPLER_MESSAGE_ARG_ZERO_INT
:
1160 brw_MOV(&func
, mrf
, brw_imm_ud(0));
1167 retype(dst
, BRW_REGISTER_TYPE_UW
) /* dest */,
1168 base_mrf
/* msg_reg_nr */,
1169 brw_message_reg(base_mrf
) /* src0 */,
1170 BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX
,
1174 8 /* response_length. TODO: should be smaller for non-RGBA formats? */,
1175 mrf
.nr
- base_mrf
/* msg_length */,
1176 0 /* header_present */,
1177 BRW_SAMPLER_SIMD_MODE_SIMD16
,
1178 BRW_SAMPLER_RETURN_FORMAT_FLOAT32
);
1186 #undef SWAP_XY_AND_XPYP
1189 brw_blorp_blit_program::render_target_write()
1191 struct brw_reg mrf_rt_write
= vec16(brw_message_reg(base_mrf
));
1194 /* If we may have killed pixels, then we need to send R0 and R1 in a header
1195 * so that the render target knows which pixels we killed.
1197 bool use_header
= key
->use_kill
;
1199 /* Copy R0/1 to MRF */
1200 brw_MOV(&func
, retype(mrf_rt_write
, BRW_REGISTER_TYPE_UD
),
1201 retype(R0
, BRW_REGISTER_TYPE_UD
));
1205 /* Copy texture data to MRFs */
1206 for (int i
= 0; i
< 4; ++i
) {
1207 /* E.g. mov(16) m2.0<1>:f r2.0<8;8,1>:f { Align1, H1 } */
1208 brw_MOV(&func
, offset(mrf_rt_write
, mrf_offset
),
1209 offset(vec8(result
), 2*i
));
1213 /* Now write to the render target and terminate the thread */
1215 16 /* dispatch_width */,
1216 base_mrf
/* msg_reg_nr */,
1217 mrf_rt_write
/* src0 */,
1218 BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE
,
1219 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX
,
1220 mrf_offset
/* msg_length. TODO: Should be smaller for non-RGBA formats. */,
1221 0 /* response_length */,
1228 brw_blorp_coord_transform_params::setup(GLuint src0
, GLuint dst0
, GLuint dst1
,
1232 /* When not mirroring a coordinate (say, X), we need:
1233 * x' - src_x0 = x - dst_x0
1235 * x' = 1*x + (src_x0 - dst_x0)
1238 offset
= src0
- dst0
;
1240 /* When mirroring X we need:
1241 * x' - src_x0 = dst_x1 - x - 1
1243 * x' = -1*x + (src_x0 + dst_x1 - 1)
1246 offset
= src0
+ dst1
- 1;
1251 brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context
*brw
,
1252 struct intel_mipmap_tree
*src_mt
,
1253 struct intel_mipmap_tree
*dst_mt
,
1254 GLuint src_x0
, GLuint src_y0
,
1255 GLuint dst_x0
, GLuint dst_y0
,
1256 GLuint dst_x1
, GLuint dst_y1
,
1257 bool mirror_x
, bool mirror_y
)
1259 src
.set(brw
, src_mt
, 0, 0);
1260 dst
.set(brw
, dst_mt
, 0, 0);
1263 memset(&wm_prog_key
, 0, sizeof(wm_prog_key
));
1265 if (brw
->intel
.gen
> 6) {
1266 /* Gen7 only supports interleaved MSAA surfaces for texturing with the
1267 * ld2dms instruction (which blorp doesn't use). So if the source is
1268 * interleaved MSAA, we'll have to map it as a single-sampled texture
1269 * and de-interleave the samples ourselves.
1271 if (src
.num_samples
> 0 && src_mt
->msaa_is_interleaved
)
1272 src
.num_samples
= 0;
1274 /* Similarly, Gen7 only supports interleaved MSAA surfaces for depth and
1275 * stencil render targets. Blorp always maps its destination surface as
1276 * a color render target (even if it's actually a depth or stencil
1277 * buffer). So if the destination is interleaved MSAA, we'll have to
1278 * map it as a single-sampled texture and interleave the samples
1281 if (dst
.num_samples
> 0 && dst_mt
->msaa_is_interleaved
)
1282 dst
.num_samples
= 0;
1285 if (dst
.map_stencil_as_y_tiled
&& dst
.num_samples
> 0) {
1286 /* If the destination surface is a W-tiled multisampled stencil buffer
1287 * that we're mapping as Y tiled, then we need to arrange for the WM
1288 * program to run once per sample rather than once per pixel, because
1289 * the memory layout of related samples doesn't match between W and Y
1292 wm_prog_key
.persample_msaa_dispatch
= true;
1295 if (src
.num_samples
> 0 && dst
.num_samples
> 0) {
1296 /* We are blitting from a multisample buffer to a multisample buffer, so
1297 * we must preserve samples within a pixel. This means we have to
1298 * arrange for the WM program to run once per sample rather than once
1301 wm_prog_key
.persample_msaa_dispatch
= true;
1304 /* The render path must be configured to use the same number of samples as
1305 * the destination buffer.
1307 num_samples
= dst
.num_samples
;
1309 GLenum base_format
= _mesa_get_format_base_format(src_mt
->format
);
1310 if (base_format
!= GL_DEPTH_COMPONENT
&& /* TODO: what about depth/stencil? */
1311 base_format
!= GL_STENCIL_INDEX
&&
1312 src_mt
->num_samples
> 0 && dst_mt
->num_samples
== 0) {
1313 /* We are downsampling a color buffer, so blend. */
1314 wm_prog_key
.blend
= true;
1317 /* src_samples and dst_samples are the true sample counts */
1318 wm_prog_key
.src_samples
= src_mt
->num_samples
;
1319 wm_prog_key
.dst_samples
= dst_mt
->num_samples
;
1321 /* tex_samples and rt_samples are the sample counts that are set up in
1324 wm_prog_key
.tex_samples
= src
.num_samples
;
1325 wm_prog_key
.rt_samples
= dst
.num_samples
;
1327 /* tex_interleaved and rt_interleaved indicate whether or not the GPU
1328 * pipeline will access the source and destination surfaces as though they
1329 * use an interleaved layout. Since blorp uses color textures and render
1330 * targets to do all its work (even when blitting stencil and depth data),
1331 * it will always use sliced layout on Gen7. On Gen6, the MSAA layout is
1332 * always interleaved.
1334 wm_prog_key
.tex_interleaved
= src
.num_samples
> 0 && brw
->intel
.gen
== 6;
1335 wm_prog_key
.rt_interleaved
= dst
.num_samples
> 0 && brw
->intel
.gen
== 6;
1337 /* src_interleaved and dst_interleaved indicate whether src and dst are
1338 * truly interleaved.
1340 wm_prog_key
.src_interleaved
= src_mt
->msaa_is_interleaved
;
1341 wm_prog_key
.dst_interleaved
= dst_mt
->msaa_is_interleaved
;
1343 wm_prog_key
.src_tiled_w
= src
.map_stencil_as_y_tiled
;
1344 wm_prog_key
.dst_tiled_w
= dst
.map_stencil_as_y_tiled
;
1345 x0
= wm_push_consts
.dst_x0
= dst_x0
;
1346 y0
= wm_push_consts
.dst_y0
= dst_y0
;
1347 x1
= wm_push_consts
.dst_x1
= dst_x1
;
1348 y1
= wm_push_consts
.dst_y1
= dst_y1
;
1349 wm_push_consts
.x_transform
.setup(src_x0
, dst_x0
, dst_x1
, mirror_x
);
1350 wm_push_consts
.y_transform
.setup(src_y0
, dst_y0
, dst_y1
, mirror_y
);
1352 if (dst
.num_samples
== 0 && dst_mt
->num_samples
> 0) {
1353 /* We must expand the rectangle we send through the rendering pipeline,
1354 * to account for the fact that we are mapping the destination region as
1355 * single-sampled when it is in fact multisampled. We must also align
1356 * it to a multiple of the multisampling pattern, because the
1357 * differences between multisampled and single-sampled surface formats
1358 * will mean that pixels are scrambled within the multisampling pattern.
1359 * TODO: what if this makes the coordinates too large?
1361 * Note: this only works if the destination surface's MSAA layout is
1362 * interleaved. If it's sliced, then we have no choice but to set up
1363 * the rendering pipeline as multisampled.
1365 assert(dst_mt
->msaa_is_interleaved
);
1368 x1
= ALIGN(x1
* 2, 4);
1369 y1
= ALIGN(y1
* 2, 4);
1370 wm_prog_key
.use_kill
= true;
1373 if (dst
.map_stencil_as_y_tiled
) {
1374 /* We must modify the rectangle we send through the rendering pipeline,
1375 * to account for the fact that we are mapping it as Y-tiled when it is
1376 * in fact W-tiled. Y tiles have dimensions 128x32 whereas W tiles have
1377 * dimensions 64x64. We must also align it to a multiple of the tile
1378 * size, because the differences between W and Y tiling formats will
1379 * mean that pixels are scrambled within the tile.
1381 * Note: if the destination surface configured as an interleaved MSAA
1382 * surface, then the effective tile size we need to align it to is
1383 * smaller, because each pixel covers a 2x2 or a 4x2 block of samples.
1385 * TODO: what if this makes the coordinates too large?
1387 unsigned x_align
= 64, y_align
= 64;
1388 if (dst_mt
->num_samples
> 0 && dst_mt
->msaa_is_interleaved
) {
1389 x_align
/= (dst_mt
->num_samples
== 4 ? 2 : 4);
1392 x0
= (x0
& ~(x_align
- 1)) * 2;
1393 y0
= (y0
& ~(y_align
- 1)) / 2;
1394 x1
= ALIGN(x1
, x_align
) * 2;
1395 y1
= ALIGN(y1
, y_align
) / 2;
1396 wm_prog_key
.use_kill
= true;
1401 brw_blorp_blit_params::get_wm_prog(struct brw_context
*brw
,
1402 brw_blorp_prog_data
**prog_data
) const
1404 uint32_t prog_offset
;
1405 if (!brw_search_cache(&brw
->cache
, BRW_BLORP_BLIT_PROG
,
1406 &this->wm_prog_key
, sizeof(this->wm_prog_key
),
1407 &prog_offset
, prog_data
)) {
1408 brw_blorp_blit_program
prog(brw
, &this->wm_prog_key
);
1409 GLuint program_size
;
1410 const GLuint
*program
= prog
.compile(brw
, &program_size
);
1411 brw_upload_cache(&brw
->cache
, BRW_BLORP_BLIT_PROG
,
1412 &this->wm_prog_key
, sizeof(this->wm_prog_key
),
1413 program
, program_size
,
1414 &prog
.prog_data
, sizeof(prog
.prog_data
),
1415 &prog_offset
, prog_data
);