i965/blorp: Enable blorp blits on Gen7.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp_blit.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "main/teximage.h"
25
26 #include "glsl/ralloc.h"
27
28 #include "intel_fbo.h"
29
30 #include "brw_blorp.h"
31 #include "brw_context.h"
32 #include "brw_eu.h"
33 #include "brw_state.h"
34
35
36 /**
37 * Helper function for handling mirror image blits.
38 *
39 * If coord0 > coord1, swap them and invert the "mirror" boolean.
40 */
41 static inline void
42 fixup_mirroring(bool &mirror, GLint &coord0, GLint &coord1)
43 {
44 if (coord0 > coord1) {
45 mirror = !mirror;
46 GLint tmp = coord0;
47 coord0 = coord1;
48 coord1 = tmp;
49 }
50 }
51
52
53 static bool
54 try_blorp_blit(struct intel_context *intel,
55 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
56 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
57 GLenum filter, GLbitfield buffer_bit)
58 {
59 struct gl_context *ctx = &intel->ctx;
60
61 /* Sync up the state of window system buffers. We need to do this before
62 * we go looking for the buffers.
63 */
64 intel_prepare_render(intel);
65
66 /* Find buffers */
67 const struct gl_framebuffer *read_fb = ctx->ReadBuffer;
68 const struct gl_framebuffer *draw_fb = ctx->DrawBuffer;
69 struct gl_renderbuffer *src_rb;
70 struct gl_renderbuffer *dst_rb;
71 switch (buffer_bit) {
72 case GL_COLOR_BUFFER_BIT:
73 src_rb = read_fb->_ColorReadBuffer;
74 dst_rb =
75 draw_fb->Attachment[
76 draw_fb->_ColorDrawBufferIndexes[0]].Renderbuffer;
77 break;
78 case GL_DEPTH_BUFFER_BIT:
79 src_rb = read_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
80 dst_rb = draw_fb->Attachment[BUFFER_DEPTH].Renderbuffer;
81 break;
82 case GL_STENCIL_BUFFER_BIT:
83 src_rb = read_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
84 dst_rb = draw_fb->Attachment[BUFFER_STENCIL].Renderbuffer;
85 break;
86 default:
87 assert(false);
88 }
89
90 /* Validate source */
91 if (!src_rb) return false;
92 struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb);
93 struct intel_mipmap_tree *src_mt = src_irb->mt;
94 if (!src_mt) return false;
95 if (buffer_bit == GL_STENCIL_BUFFER_BIT && src_mt->stencil_mt)
96 src_mt = src_mt->stencil_mt;
97 switch (src_mt->format) {
98 case MESA_FORMAT_ARGB8888:
99 case MESA_FORMAT_X8_Z24:
100 case MESA_FORMAT_S8:
101 break; /* Supported */
102 default:
103 /* Unsupported format.
104 *
105 * TODO: need to support all formats that are allowed as multisample
106 * render targets.
107 */
108 return false;
109 }
110
111 /* Validate destination */
112 if (!dst_rb) return false;
113 struct intel_renderbuffer *dst_irb = intel_renderbuffer(dst_rb);
114 struct intel_mipmap_tree *dst_mt = dst_irb->mt;
115 if (!dst_mt) return false;
116 if (buffer_bit == GL_STENCIL_BUFFER_BIT && dst_mt->stencil_mt)
117 dst_mt = dst_mt->stencil_mt;
118 switch (dst_mt->format) {
119 case MESA_FORMAT_ARGB8888:
120 case MESA_FORMAT_X8_Z24:
121 case MESA_FORMAT_S8:
122 break; /* Supported */
123 default:
124 /* Unsupported format.
125 *
126 * TODO: need to support all formats that are allowed as multisample
127 * render targets.
128 */
129 return false;
130 }
131
132 /* Account for the fact that in the system framebuffer, the origin is at
133 * the lower left.
134 */
135 if (read_fb->Name == 0) {
136 srcY0 = read_fb->Height - srcY0;
137 srcY1 = read_fb->Height - srcY1;
138 }
139 if (draw_fb->Name == 0) {
140 dstY0 = draw_fb->Height - dstY0;
141 dstY1 = draw_fb->Height - dstY1;
142 }
143
144 /* Detect if the blit needs to be mirrored */
145 bool mirror_x = false, mirror_y = false;
146 fixup_mirroring(mirror_x, srcX0, srcX1);
147 fixup_mirroring(mirror_x, dstX0, dstX1);
148 fixup_mirroring(mirror_y, srcY0, srcY1);
149 fixup_mirroring(mirror_y, dstY0, dstY1);
150
151 /* Make sure width and height match */
152 GLsizei width = srcX1 - srcX0;
153 GLsizei height = srcY1 - srcY0;
154 if (width != dstX1 - dstX0) return false;
155 if (height != dstY1 - dstY0) return false;
156
157 /* Make sure width and height don't need to be clipped or scissored.
158 * TODO: support clipping and scissoring.
159 */
160 if (srcX0 < 0 || (GLuint) srcX1 > read_fb->Width) return false;
161 if (srcY0 < 0 || (GLuint) srcY1 > read_fb->Height) return false;
162 if (dstX0 < 0 || (GLuint) dstX1 > draw_fb->Width) return false;
163 if (dstY0 < 0 || (GLuint) dstY1 > draw_fb->Height) return false;
164 if (ctx->Scissor.Enabled) return false;
165
166 /* Get ready to blit. This includes depth resolving the src and dst
167 * buffers if necessary.
168 */
169 intel_renderbuffer_resolve_depth(intel, src_irb);
170 intel_renderbuffer_resolve_depth(intel, dst_irb);
171
172 /* Do the blit */
173 brw_blorp_blit_params params(src_mt, dst_mt,
174 srcX0, srcY0, dstX0, dstY0, dstX1, dstY1,
175 mirror_x, mirror_y);
176 brw_blorp_exec(intel, &params);
177
178 /* Mark the dst buffer as needing a HiZ resolve if necessary. */
179 intel_renderbuffer_set_needs_hiz_resolve(dst_irb);
180
181 return true;
182 }
183
184 GLbitfield
185 brw_blorp_framebuffer(struct intel_context *intel,
186 GLint srcX0, GLint srcY0, GLint srcX1, GLint srcY1,
187 GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
188 GLbitfield mask, GLenum filter)
189 {
190 /* BLORP is not supported before Gen6. */
191 if (intel->gen < 6)
192 return mask;
193
194 static GLbitfield buffer_bits[] = {
195 GL_COLOR_BUFFER_BIT,
196 GL_DEPTH_BUFFER_BIT,
197 GL_STENCIL_BUFFER_BIT,
198 };
199
200 for (unsigned int i = 0; i < ARRAY_SIZE(buffer_bits); ++i) {
201 if ((mask & buffer_bits[i]) &&
202 try_blorp_blit(intel,
203 srcX0, srcY0, srcX1, srcY1,
204 dstX0, dstY0, dstX1, dstY1,
205 filter, buffer_bits[i])) {
206 mask &= ~buffer_bits[i];
207 }
208 }
209
210 return mask;
211 }
212
213
214 /**
215 * Enum to specify the order of arguments in a sampler message
216 */
217 enum sampler_message_arg
218 {
219 SAMPLER_MESSAGE_ARG_U_FLOAT,
220 SAMPLER_MESSAGE_ARG_V_FLOAT,
221 SAMPLER_MESSAGE_ARG_U_INT,
222 SAMPLER_MESSAGE_ARG_V_INT,
223 SAMPLER_MESSAGE_ARG_SI_INT,
224 SAMPLER_MESSAGE_ARG_ZERO_INT,
225 };
226
227 /**
228 * Generator for WM programs used in BLORP blits.
229 *
230 * The bulk of the work done by the WM program is to wrap and unwrap the
231 * coordinate transformations used by the hardware to store surfaces in
232 * memory. The hardware transforms a pixel location (X, Y, S) (where S is the
233 * sample index for a multisampled surface) to a memory offset by the
234 * following formulas:
235 *
236 * offset = tile(tiling_format, encode_msaa(num_samples, X, Y, S))
237 * (X, Y, S) = decode_msaa(num_samples, detile(tiling_format, offset))
238 *
239 * For a single-sampled surface, encode_msaa() and decode_msaa are the
240 * identity function:
241 *
242 * encode_msaa(1, X, Y, 0) = (X, Y)
243 * decode_msaa(1, X, Y) = (X, Y, 0)
244 *
245 * For a 4x multisampled surface, encode_msaa() embeds the sample number into
246 * bit 1 of the X and Y coordinates:
247 *
248 * encode_msaa(4, X, Y, S) = (X', Y')
249 * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
250 * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1)
251 * decode_msaa(4, X, Y) = (X', Y', S)
252 * where X' = (X & ~0b11) >> 1 | (X & 0b1)
253 * Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
254 * S = (Y & 0b10) | (X & 0b10) >> 1
255 *
256 * For X tiling, tile() combines together the low-order bits of the X and Y
257 * coordinates in the pattern 0byyyxxxxxxxxx, creating 4k tiles that are 512
258 * bytes wide and 8 rows high:
259 *
260 * tile(x_tiled, X, Y) = A
261 * where A = tile_num << 12 | offset
262 * tile_num = (Y >> 3) * tile_pitch + (X' >> 9)
263 * offset = (Y & 0b111) << 9
264 * | (X & 0b111111111)
265 * X' = X * cpp
266 * detile(x_tiled, A) = (X, Y)
267 * where X = X' / cpp
268 * Y = (tile_num / tile_pitch) << 3
269 * | (A & 0b111000000000) >> 9
270 * X' = (tile_num % tile_pitch) << 9
271 * | (A & 0b111111111)
272 *
273 * (In all tiling formulas, cpp is the number of bytes occupied by a single
274 * sample ("chars per pixel"), and tile_pitch is the number of 4k tiles
275 * required to fill the width of the surface).
276 *
277 * For Y tiling, tile() combines together the low-order bits of the X and Y
278 * coordinates in the pattern 0bxxxyyyyyxxxx, creating 4k tiles that are 128
279 * bytes wide and 32 rows high:
280 *
281 * tile(y_tiled, X, Y) = A
282 * where A = tile_num << 12 | offset
283 * tile_num = (Y >> 5) * tile_pitch + (X' >> 7)
284 * offset = (X' & 0b1110000) << 5
285 * | (Y' & 0b11111) << 4
286 * | (X' & 0b1111)
287 * X' = X * cpp
288 * detile(y_tiled, A) = (X, Y)
289 * where X = X' / cpp
290 * Y = (tile_num / tile_pitch) << 5
291 * | (A & 0b111110000) >> 4
292 * X' = (tile_num % tile_pitch) << 7
293 * | (A & 0b111000000000) >> 5
294 * | (A & 0b1111)
295 *
296 * For W tiling, tile() combines together the low-order bits of the X and Y
297 * coordinates in the pattern 0bxxxyyyyxyxyx, creating 4k tiles that are 64
298 * bytes wide and 64 rows high (note that W tiling is only used for stencil
299 * buffers, which always have cpp = 1):
300 *
301 * tile(w_tiled, X, Y) = A
302 * where A = tile_num << 12 | offset
303 * tile_num = (Y >> 6) * tile_pitch + (X' >> 6)
304 * offset = (X' & 0b111000) << 6
305 * | (Y & 0b111100) << 3
306 * | (X' & 0b100) << 2
307 * | (Y & 0b10) << 2
308 * | (X' & 0b10) << 1
309 * | (Y & 0b1) << 1
310 * | (X' & 0b1)
311 * X' = X * cpp = X
312 * detile(w_tiled, A) = (X, Y)
313 * where X = X' / cpp = X'
314 * Y = (tile_num / tile_pitch) << 6
315 * | (A & 0b111100000) >> 3
316 * | (A & 0b1000) >> 2
317 * | (A & 0b10) >> 1
318 * X' = (tile_num % tile_pitch) << 6
319 * | (A & 0b111000000000) >> 6
320 * | (A & 0b10000) >> 2
321 * | (A & 0b100) >> 1
322 * | (A & 0b1)
323 *
324 * Finally, for a non-tiled surface, tile() simply combines together the X and
325 * Y coordinates in the natural way:
326 *
327 * tile(untiled, X, Y) = A
328 * where A = Y * pitch + X'
329 * X' = X * cpp
330 * detile(untiled, A) = (X, Y)
331 * where X = X' / cpp
332 * Y = A / pitch
333 * X' = A % pitch
334 *
335 * (In these formulas, pitch is the number of bytes occupied by a single row
336 * of samples).
337 */
338 class brw_blorp_blit_program
339 {
340 public:
341 brw_blorp_blit_program(struct brw_context *brw,
342 const brw_blorp_blit_prog_key *key);
343 ~brw_blorp_blit_program();
344
345 const GLuint *compile(struct brw_context *brw, GLuint *program_size);
346
347 brw_blorp_prog_data prog_data;
348
349 private:
350 void alloc_regs();
351 void alloc_push_const_regs(int base_reg);
352 void compute_frag_coords();
353 void translate_tiling(bool old_tiled_w, bool new_tiled_w);
354 void encode_msaa(unsigned num_samples);
355 void decode_msaa(unsigned num_samples);
356 void kill_if_outside_dst_rect();
357 void translate_dst_to_src();
358 void single_to_blend();
359 void sample();
360 void texel_fetch();
361 void expand_to_32_bits(struct brw_reg src, struct brw_reg dst);
362 void texture_lookup(GLuint msg_type, const sampler_message_arg *args,
363 int num_args);
364 void render_target_write();
365
366 void *mem_ctx;
367 struct brw_context *brw;
368 const brw_blorp_blit_prog_key *key;
369 struct brw_compile func;
370
371 /* Thread dispatch header */
372 struct brw_reg R0;
373
374 /* Pixel X/Y coordinates (always in R1). */
375 struct brw_reg R1;
376
377 /* Push constants */
378 struct brw_reg dst_x0;
379 struct brw_reg dst_x1;
380 struct brw_reg dst_y0;
381 struct brw_reg dst_y1;
382 struct {
383 struct brw_reg multiplier;
384 struct brw_reg offset;
385 } x_transform, y_transform;
386
387 /* Data returned from texture lookup (4 vec16's) */
388 struct brw_reg Rdata;
389
390 /* X coordinates. We have two of them so that we can perform coordinate
391 * transformations easily.
392 */
393 struct brw_reg x_coords[2];
394
395 /* Y coordinates. We have two of them so that we can perform coordinate
396 * transformations easily.
397 */
398 struct brw_reg y_coords[2];
399
400 /* Which element of x_coords and y_coords is currently in use.
401 */
402 int xy_coord_index;
403
404 /* True if, at the point in the program currently being compiled, the
405 * sample index is known to be zero.
406 */
407 bool s_is_zero;
408
409 /* Register storing the sample index when s_is_zero is false. */
410 struct brw_reg sample_index;
411
412 /* Temporaries */
413 struct brw_reg t1;
414 struct brw_reg t2;
415
416 /* MRF used for sampling and render target writes */
417 GLuint base_mrf;
418 };
419
420 brw_blorp_blit_program::brw_blorp_blit_program(
421 struct brw_context *brw,
422 const brw_blorp_blit_prog_key *key)
423 : mem_ctx(ralloc_context(NULL)),
424 brw(brw),
425 key(key)
426 {
427 brw_init_compile(brw, &func, mem_ctx);
428 }
429
430 brw_blorp_blit_program::~brw_blorp_blit_program()
431 {
432 ralloc_free(mem_ctx);
433 }
434
435 const GLuint *
436 brw_blorp_blit_program::compile(struct brw_context *brw,
437 GLuint *program_size)
438 {
439 /* Sanity checks */
440 if (key->dst_tiled_w && key->rt_samples > 0) {
441 /* If the destination image is W tiled and multisampled, then the thread
442 * must be dispatched once per sample, not once per pixel. This is
443 * necessary because after conversion between W and Y tiling, there's no
444 * guarantee that all samples corresponding to a single pixel will still
445 * be together.
446 */
447 assert(key->persample_msaa_dispatch);
448 }
449
450 if (key->blend) {
451 /* We are blending, which means we'll be using a SAMPLE message, which
452 * causes the hardware to pick up the all of the samples corresponding
453 * to this pixel and average them together. Since we'll be relying on
454 * the hardware to find all of the samples and combine them together,
455 * the surface state for the texture must be configured with the correct
456 * tiling and sample count.
457 */
458 assert(!key->src_tiled_w);
459 assert(key->tex_samples == key->src_samples);
460 assert(key->tex_samples > 0);
461 }
462
463 if (key->persample_msaa_dispatch) {
464 /* It only makes sense to do persample dispatch if the render target is
465 * configured as multisampled.
466 */
467 assert(key->rt_samples > 0);
468 }
469
470 /* Set up prog_data */
471 memset(&prog_data, 0, sizeof(prog_data));
472 prog_data.persample_msaa_dispatch = key->persample_msaa_dispatch;
473
474 brw_set_compression_control(&func, BRW_COMPRESSION_NONE);
475
476 alloc_regs();
477 compute_frag_coords();
478
479 /* Render target and texture hardware don't support W tiling. */
480 const bool rt_tiled_w = false;
481 const bool tex_tiled_w = false;
482
483 /* The address that data will be written to is determined by the
484 * coordinates supplied to the WM thread and the tiling and sample count of
485 * the render target, according to the formula:
486 *
487 * (X, Y, S) = decode_msaa(rt_samples, detile(rt_tiling, offset))
488 *
489 * If the actual tiling and sample count of the destination surface are not
490 * the same as the configuration of the render target, then these
491 * coordinates are wrong and we have to adjust them to compensate for the
492 * difference.
493 */
494 if (rt_tiled_w != key->dst_tiled_w ||
495 key->rt_samples != key->dst_samples) {
496 encode_msaa(key->rt_samples);
497 /* Now (X, Y) = detile(rt_tiling, offset) */
498 translate_tiling(rt_tiled_w, key->dst_tiled_w);
499 /* Now (X, Y) = detile(dst_tiling, offset) */
500 decode_msaa(key->dst_samples);
501 }
502
503 /* Now (X, Y, S) = decode_msaa(dst_samples, detile(dst_tiling, offset)).
504 *
505 * That is: X, Y and S now contain the true coordinates and sample index of
506 * the data that the WM thread should output.
507 *
508 * If we need to kill pixels that are outside the destination rectangle,
509 * now is the time to do it.
510 */
511
512 if (key->use_kill)
513 kill_if_outside_dst_rect();
514
515 /* Next, apply a translation to obtain coordinates in the source image. */
516 translate_dst_to_src();
517
518 /* If the source image is not multisampled, then we want to fetch sample
519 * number 0, because that's the only sample there is.
520 */
521 if (key->src_samples == 0)
522 s_is_zero = true;
523
524 /* X, Y, and S are now the coordinates of the pixel in the source image
525 * that we want to texture from. Exception: if we are blending, then S is
526 * irrelevant, because we are going to fetch all samples.
527 */
528 if (key->blend) {
529 single_to_blend();
530 sample();
531 } else {
532 /* We aren't blending, which means we just want to fetch a single sample
533 * from the source surface. The address that we want to fetch from is
534 * related to the X, Y and S values according to the formula:
535 *
536 * (X, Y, S) = decode_msaa(src_samples, detile(src_tiling, offset)).
537 *
538 * If the actual tiling and sample count of the source surface are not
539 * the same as the configuration of the texture, then we need to adjust
540 * the coordinates to compensate for the difference.
541 */
542 if (tex_tiled_w != key->src_tiled_w ||
543 key->tex_samples != key->src_samples) {
544 encode_msaa(key->src_samples);
545 /* Now (X, Y) = detile(src_tiling, offset) */
546 translate_tiling(key->src_tiled_w, tex_tiled_w);
547 /* Now (X, Y) = detile(tex_tiling, offset) */
548 decode_msaa(key->tex_samples);
549 }
550
551 /* Now (X, Y, S) = decode_msaa(tex_samples, detile(tex_tiling, offset)).
552 *
553 * In other words: X, Y, and S now contain values which, when passed to
554 * the texturing unit, will cause data to be read from the correct
555 * memory location. So we can fetch the texel now.
556 */
557 texel_fetch();
558 }
559
560 /* Finally, write the fetched (or blended) value to the render target and
561 * terminate the thread.
562 */
563 render_target_write();
564 return brw_get_program(&func, program_size);
565 }
566
567 void
568 brw_blorp_blit_program::alloc_push_const_regs(int base_reg)
569 {
570 #define CONST_LOC(name) offsetof(brw_blorp_wm_push_constants, name)
571 #define ALLOC_REG(name) \
572 this->name = \
573 brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, base_reg, CONST_LOC(name) / 2)
574
575 ALLOC_REG(dst_x0);
576 ALLOC_REG(dst_x1);
577 ALLOC_REG(dst_y0);
578 ALLOC_REG(dst_y1);
579 ALLOC_REG(x_transform.multiplier);
580 ALLOC_REG(x_transform.offset);
581 ALLOC_REG(y_transform.multiplier);
582 ALLOC_REG(y_transform.offset);
583 #undef CONST_LOC
584 #undef ALLOC_REG
585 }
586
587 void
588 brw_blorp_blit_program::alloc_regs()
589 {
590 int reg = 0;
591 this->R0 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
592 this->R1 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
593 prog_data.first_curbe_grf = reg;
594 alloc_push_const_regs(reg);
595 reg += BRW_BLORP_NUM_PUSH_CONST_REGS;
596 this->Rdata = vec16(brw_vec8_grf(reg, 0)); reg += 8;
597 for (int i = 0; i < 2; ++i) {
598 this->x_coords[i]
599 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
600 this->y_coords[i]
601 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
602 }
603 this->xy_coord_index = 0;
604 this->sample_index
605 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
606 this->t1 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
607 this->t2 = vec16(retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW));
608
609 int mrf = 2;
610 this->base_mrf = mrf;
611 }
612
613 /* In the code that follows, X and Y can be used to quickly refer to the
614 * active elements of x_coords and y_coords, and Xp and Yp ("X prime" and "Y
615 * prime") to the inactive elements.
616 *
617 * S can be used to quickly refer to sample_index.
618 */
619 #define X x_coords[xy_coord_index]
620 #define Y y_coords[xy_coord_index]
621 #define Xp x_coords[!xy_coord_index]
622 #define Yp y_coords[!xy_coord_index]
623 #define S sample_index
624
625 /* Quickly swap the roles of (X, Y) and (Xp, Yp). Saves us from having to do
626 * MOVs to transfor (Xp, Yp) to (X, Y) after a coordinate transformation.
627 */
628 #define SWAP_XY_AND_XPYP() xy_coord_index = !xy_coord_index;
629
630 /**
631 * Emit code to compute the X and Y coordinates of the pixels being rendered
632 * by this WM invocation.
633 *
634 * Assuming the render target is set up for Y tiling, these (X, Y) values are
635 * related to the address offset where outputs will be written by the formula:
636 *
637 * (X, Y, S) = decode_msaa(detile(offset)).
638 *
639 * (See brw_blorp_blit_program).
640 */
641 void
642 brw_blorp_blit_program::compute_frag_coords()
643 {
644 /* R1.2[15:0] = X coordinate of upper left pixel of subspan 0 (pixel 0)
645 * R1.3[15:0] = X coordinate of upper left pixel of subspan 1 (pixel 4)
646 * R1.4[15:0] = X coordinate of upper left pixel of subspan 2 (pixel 8)
647 * R1.5[15:0] = X coordinate of upper left pixel of subspan 3 (pixel 12)
648 *
649 * Pixels within a subspan are laid out in this arrangement:
650 * 0 1
651 * 2 3
652 *
653 * So, to compute the coordinates of each pixel, we need to read every 2nd
654 * 16-bit value (vstride=2) from R1, starting at the 4th 16-bit value
655 * (suboffset=4), and duplicate each value 4 times (hstride=0, width=4).
656 * In other words, the data we want to access is R1.4<2;4,0>UW.
657 *
658 * Then, we need to add the repeating sequence (0, 1, 0, 1, ...) to the
659 * result, since pixels n+1 and n+3 are in the right half of the subspan.
660 */
661 brw_ADD(&func, X, stride(suboffset(R1, 4), 2, 4, 0), brw_imm_v(0x10101010));
662
663 /* Similarly, Y coordinates for subspans come from R1.2[31:16] through
664 * R1.5[31:16], so to get pixel Y coordinates we need to start at the 5th
665 * 16-bit value instead of the 4th (R1.5<2;4,0>UW instead of
666 * R1.4<2;4,0>UW).
667 *
668 * And we need to add the repeating sequence (0, 0, 1, 1, ...), since
669 * pixels n+2 and n+3 are in the bottom half of the subspan.
670 */
671 brw_ADD(&func, Y, stride(suboffset(R1, 5), 2, 4, 0), brw_imm_v(0x11001100));
672
673 if (key->persample_msaa_dispatch) {
674 /* The WM will be run in MSDISPMODE_PERSAMPLE with num_samples > 0.
675 * Therefore, subspan 0 will represent sample 0, subspan 1 will
676 * represent sample 1, and so on.
677 *
678 * So we need to populate S with the sequence (0, 0, 0, 0, 1, 1, 1, 1,
679 * 2, 2, 2, 2, 3, 3, 3, 3). The easiest way to do this is to populate a
680 * temporary variable with the sequence (0, 1, 2, 3), and then copy from
681 * it using vstride=1, width=4, hstride=0.
682 *
683 * TODO: implement the necessary calculation for 8x multisampling.
684 */
685 brw_MOV(&func, t1, brw_imm_v(0x3210));
686 brw_MOV(&func, S, stride(t1, 1, 4, 0));
687 s_is_zero = false;
688 } else {
689 /* Either the destination surface is single-sampled, or the WM will be
690 * run in MSDISPMODE_PERPIXEL (which causes a single fragment dispatch
691 * per pixel). In either case, it's not meaningful to compute a sample
692 * value. Just set it to 0.
693 */
694 s_is_zero = true;
695 }
696 }
697
698 /**
699 * Emit code to compensate for the difference between Y and W tiling.
700 *
701 * This code modifies the X and Y coordinates according to the formula:
702 *
703 * (X', Y') = detile(new_tiling, tile(old_tiling, X, Y))
704 *
705 * (See brw_blorp_blit_program).
706 *
707 * It can only translate between W and Y tiling, so new_tiling and old_tiling
708 * are booleans where true represents W tiling and false represents Y tiling.
709 */
710 void
711 brw_blorp_blit_program::translate_tiling(bool old_tiled_w, bool new_tiled_w)
712 {
713 if (old_tiled_w == new_tiled_w)
714 return;
715
716 if (new_tiled_w) {
717 /* Given X and Y coordinates that describe an address using Y tiling,
718 * translate to the X and Y coordinates that describe the same address
719 * using W tiling.
720 *
721 * If we break down the low order bits of X and Y, using a
722 * single letter to represent each low-order bit:
723 *
724 * X = A << 7 | 0bBCDEFGH
725 * Y = J << 5 | 0bKLMNP (1)
726 *
727 * Then we can apply the Y tiling formula to see the memory offset being
728 * addressed:
729 *
730 * offset = (J * tile_pitch + A) << 12 | 0bBCDKLMNPEFGH (2)
731 *
732 * If we apply the W detiling formula to this memory location, that the
733 * corresponding X' and Y' coordinates are:
734 *
735 * X' = A << 6 | 0bBCDPFH (3)
736 * Y' = J << 6 | 0bKLMNEG
737 *
738 * Combining (1) and (3), we see that to transform (X, Y) to (X', Y'),
739 * we need to make the following computation:
740 *
741 * X' = (X & ~0b1011) >> 1 | (Y & 0b1) << 2 | X & 0b1 (4)
742 * Y' = (Y & ~0b1) << 1 | (X & 0b1000) >> 2 | (X & 0b10) >> 1
743 */
744 brw_AND(&func, t1, X, brw_imm_uw(0xfff4)); /* X & ~0b1011 */
745 brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b1011) >> 1 */
746 brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
747 brw_SHL(&func, t2, t2, brw_imm_uw(2)); /* (Y & 0b1) << 2 */
748 brw_OR(&func, t1, t1, t2); /* (X & ~0b1011) >> 1 | (Y & 0b1) << 2 */
749 brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
750 brw_OR(&func, Xp, t1, t2);
751 brw_AND(&func, t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
752 brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
753 brw_AND(&func, t2, X, brw_imm_uw(8)); /* X & 0b1000 */
754 brw_SHR(&func, t2, t2, brw_imm_uw(2)); /* (X & 0b1000) >> 2 */
755 brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (X & 0b1000) >> 2 */
756 brw_AND(&func, t2, X, brw_imm_uw(2)); /* X & 0b10 */
757 brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
758 brw_OR(&func, Yp, t1, t2);
759 SWAP_XY_AND_XPYP();
760 } else {
761 /* Applying the same logic as above, but in reverse, we obtain the
762 * formulas:
763 *
764 * X' = (X & ~0b101) << 1 | (Y & 0b10) << 2 | (Y & 0b1) << 1 | X & 0b1
765 * Y' = (Y & ~0b11) >> 1 | (X & 0b100) >> 2
766 */
767 brw_AND(&func, t1, X, brw_imm_uw(0xfffa)); /* X & ~0b101 */
768 brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b101) << 1 */
769 brw_AND(&func, t2, Y, brw_imm_uw(2)); /* Y & 0b10 */
770 brw_SHL(&func, t2, t2, brw_imm_uw(2)); /* (Y & 0b10) << 2 */
771 brw_OR(&func, t1, t1, t2); /* (X & ~0b101) << 1 | (Y & 0b10) << 2 */
772 brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
773 brw_SHL(&func, t2, t2, brw_imm_uw(1)); /* (Y & 0b1) << 1 */
774 brw_OR(&func, t1, t1, t2); /* (X & ~0b101) << 1 | (Y & 0b10) << 2
775 | (Y & 0b1) << 1 */
776 brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
777 brw_OR(&func, Xp, t1, t2);
778 brw_AND(&func, t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
779 brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
780 brw_AND(&func, t2, X, brw_imm_uw(4)); /* X & 0b100 */
781 brw_SHR(&func, t2, t2, brw_imm_uw(2)); /* (X & 0b100) >> 2 */
782 brw_OR(&func, Yp, t1, t2);
783 SWAP_XY_AND_XPYP();
784 }
785 }
786
787 /**
788 * Emit code to compensate for the difference between MSAA and non-MSAA
789 * surfaces.
790 *
791 * This code modifies the X and Y coordinates according to the formula:
792 *
793 * (X', Y') = encode_msaa_4x(X, Y, S)
794 *
795 * (See brw_blorp_blit_program).
796 */
797 void
798 brw_blorp_blit_program::encode_msaa(unsigned num_samples)
799 {
800 if (num_samples == 0) {
801 /* No translation necessary. */
802 } else {
803 /* encode_msaa_4x(X, Y, S) = (X', Y')
804 * where X' = (X & ~0b1) << 1 | (S & 0b1) << 1 | (X & 0b1)
805 * Y' = (Y & ~0b1 ) << 1 | (S & 0b10) | (Y & 0b1)
806 */
807 brw_AND(&func, t1, X, brw_imm_uw(0xfffe)); /* X & ~0b1 */
808 if (!s_is_zero) {
809 brw_AND(&func, t2, S, brw_imm_uw(1)); /* S & 0b1 */
810 brw_OR(&func, t1, t1, t2); /* (X & ~0b1) | (S & 0b1) */
811 }
812 brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b1) << 1
813 | (S & 0b1) << 1 */
814 brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
815 brw_OR(&func, Xp, t1, t2);
816 brw_AND(&func, t1, Y, brw_imm_uw(0xfffe)); /* Y & ~0b1 */
817 brw_SHL(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b1) << 1 */
818 if (!s_is_zero) {
819 brw_AND(&func, t2, S, brw_imm_uw(2)); /* S & 0b10 */
820 brw_OR(&func, t1, t1, t2); /* (Y & ~0b1) << 1 | (S & 0b10) */
821 }
822 brw_AND(&func, t2, Y, brw_imm_uw(1));
823 brw_OR(&func, Yp, t1, t2);
824 SWAP_XY_AND_XPYP();
825 }
826 }
827
828 /**
829 * Emit code to compensate for the difference between MSAA and non-MSAA
830 * surfaces.
831 *
832 * This code modifies the X and Y coordinates according to the formula:
833 *
834 * (X', Y', S) = decode_msaa(num_samples, X, Y)
835 *
836 * (See brw_blorp_blit_program).
837 */
838 void
839 brw_blorp_blit_program::decode_msaa(unsigned num_samples)
840 {
841 if (num_samples == 0) {
842 /* No translation necessary. */
843 s_is_zero = true;
844 } else {
845 /* decode_msaa_4x(X, Y) = (X', Y', S)
846 * where X' = (X & ~0b11) >> 1 | (X & 0b1)
847 * Y' = (Y & ~0b11) >> 1 | (Y & 0b1)
848 * S = (Y & 0b10) | (X & 0b10) >> 1
849 */
850 brw_AND(&func, t1, X, brw_imm_uw(0xfffc)); /* X & ~0b11 */
851 brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (X & ~0b11) >> 1 */
852 brw_AND(&func, t2, X, brw_imm_uw(1)); /* X & 0b1 */
853 brw_OR(&func, Xp, t1, t2);
854 brw_AND(&func, t1, Y, brw_imm_uw(0xfffc)); /* Y & ~0b11 */
855 brw_SHR(&func, t1, t1, brw_imm_uw(1)); /* (Y & ~0b11) >> 1 */
856 brw_AND(&func, t2, Y, brw_imm_uw(1)); /* Y & 0b1 */
857 brw_OR(&func, Yp, t1, t2);
858 brw_AND(&func, t1, Y, brw_imm_uw(2)); /* Y & 0b10 */
859 brw_AND(&func, t2, X, brw_imm_uw(2)); /* X & 0b10 */
860 brw_SHR(&func, t2, t2, brw_imm_uw(1)); /* (X & 0b10) >> 1 */
861 brw_OR(&func, S, t1, t2);
862 s_is_zero = false;
863 SWAP_XY_AND_XPYP();
864 }
865 }
866
867 /**
868 * Emit code that kills pixels whose X and Y coordinates are outside the
869 * boundary of the rectangle defined by the push constants (dst_x0, dst_y0,
870 * dst_x1, dst_y1).
871 */
872 void
873 brw_blorp_blit_program::kill_if_outside_dst_rect()
874 {
875 struct brw_reg f0 = brw_flag_reg();
876 struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
877 struct brw_reg null16 = vec16(retype(brw_null_reg(), BRW_REGISTER_TYPE_UW));
878
879 brw_CMP(&func, null16, BRW_CONDITIONAL_GE, X, dst_x0);
880 brw_CMP(&func, null16, BRW_CONDITIONAL_GE, Y, dst_y0);
881 brw_CMP(&func, null16, BRW_CONDITIONAL_L, X, dst_x1);
882 brw_CMP(&func, null16, BRW_CONDITIONAL_L, Y, dst_y1);
883
884 brw_set_predicate_control(&func, BRW_PREDICATE_NONE);
885 brw_push_insn_state(&func);
886 brw_set_mask_control(&func, BRW_MASK_DISABLE);
887 brw_AND(&func, g1, f0, g1);
888 brw_pop_insn_state(&func);
889 }
890
891 /**
892 * Emit code to translate from destination (X, Y) coordinates to source (X, Y)
893 * coordinates.
894 */
895 void
896 brw_blorp_blit_program::translate_dst_to_src()
897 {
898 brw_MUL(&func, Xp, X, x_transform.multiplier);
899 brw_MUL(&func, Yp, Y, y_transform.multiplier);
900 brw_ADD(&func, Xp, Xp, x_transform.offset);
901 brw_ADD(&func, Yp, Yp, y_transform.offset);
902 SWAP_XY_AND_XPYP();
903 }
904
905 /**
906 * Emit code to transform the X and Y coordinates as needed for blending
907 * together the different samples in an MSAA texture.
908 */
909 void
910 brw_blorp_blit_program::single_to_blend()
911 {
912 /* When looking up samples in an MSAA texture using the SAMPLE message,
913 * Gen6 requires the texture coordinates to be odd integers (so that they
914 * correspond to the center of a 2x2 block representing the four samples
915 * that maxe up a pixel). So we need to multiply our X and Y coordinates
916 * each by 2 and then add 1.
917 */
918 brw_SHL(&func, t1, X, brw_imm_w(1));
919 brw_SHL(&func, t2, Y, brw_imm_w(1));
920 brw_ADD(&func, Xp, t1, brw_imm_w(1));
921 brw_ADD(&func, Yp, t2, brw_imm_w(1));
922 SWAP_XY_AND_XPYP();
923 }
924
925 /**
926 * Emit code to look up a value in the texture using the SAMPLE message (which
927 * does blending of MSAA surfaces).
928 */
929 void
930 brw_blorp_blit_program::sample()
931 {
932 static const sampler_message_arg args[2] = {
933 SAMPLER_MESSAGE_ARG_U_FLOAT,
934 SAMPLER_MESSAGE_ARG_V_FLOAT
935 };
936
937 texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE, args, ARRAY_SIZE(args));
938 }
939
940 /**
941 * Emit code to look up a value in the texture using the SAMPLE_LD message
942 * (which does a simple texel fetch).
943 */
944 void
945 brw_blorp_blit_program::texel_fetch()
946 {
947 static const sampler_message_arg gen6_args[5] = {
948 SAMPLER_MESSAGE_ARG_U_INT,
949 SAMPLER_MESSAGE_ARG_V_INT,
950 SAMPLER_MESSAGE_ARG_ZERO_INT, /* R */
951 SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
952 SAMPLER_MESSAGE_ARG_SI_INT
953 };
954 static const sampler_message_arg gen7_ld_args[3] = {
955 SAMPLER_MESSAGE_ARG_U_INT,
956 SAMPLER_MESSAGE_ARG_ZERO_INT, /* LOD */
957 SAMPLER_MESSAGE_ARG_V_INT
958 };
959 static const sampler_message_arg gen7_ld2dss_args[3] = {
960 SAMPLER_MESSAGE_ARG_SI_INT,
961 SAMPLER_MESSAGE_ARG_U_INT,
962 SAMPLER_MESSAGE_ARG_V_INT
963 };
964
965 switch (brw->intel.gen) {
966 case 6:
967 texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE_LD, gen6_args,
968 s_is_zero ? 2 : 5);
969 break;
970 case 7:
971 if (key->tex_samples > 0) {
972 texture_lookup(GEN7_SAMPLER_MESSAGE_SAMPLE_LD2DSS,
973 gen7_ld2dss_args, ARRAY_SIZE(gen7_ld2dss_args));
974 } else {
975 assert(s_is_zero);
976 texture_lookup(GEN5_SAMPLER_MESSAGE_SAMPLE_LD, gen7_ld_args,
977 ARRAY_SIZE(gen7_ld_args));
978 }
979 break;
980 default:
981 assert(!"Should not get here.");
982 break;
983 };
984 }
985
986 void
987 brw_blorp_blit_program::expand_to_32_bits(struct brw_reg src,
988 struct brw_reg dst)
989 {
990 brw_MOV(&func, vec8(dst), vec8(src));
991 brw_set_compression_control(&func, BRW_COMPRESSION_2NDHALF);
992 brw_MOV(&func, offset(vec8(dst), 1), suboffset(vec8(src), 8));
993 brw_set_compression_control(&func, BRW_COMPRESSION_NONE);
994 }
995
996 void
997 brw_blorp_blit_program::texture_lookup(GLuint msg_type,
998 const sampler_message_arg *args,
999 int num_args)
1000 {
1001 struct brw_reg mrf =
1002 retype(vec16(brw_message_reg(base_mrf)), BRW_REGISTER_TYPE_UD);
1003 for (int arg = 0; arg < num_args; ++arg) {
1004 switch (args[arg]) {
1005 case SAMPLER_MESSAGE_ARG_U_FLOAT:
1006 expand_to_32_bits(X, retype(mrf, BRW_REGISTER_TYPE_F));
1007 break;
1008 case SAMPLER_MESSAGE_ARG_V_FLOAT:
1009 expand_to_32_bits(Y, retype(mrf, BRW_REGISTER_TYPE_F));
1010 break;
1011 case SAMPLER_MESSAGE_ARG_U_INT:
1012 expand_to_32_bits(X, mrf);
1013 break;
1014 case SAMPLER_MESSAGE_ARG_V_INT:
1015 expand_to_32_bits(Y, mrf);
1016 break;
1017 case SAMPLER_MESSAGE_ARG_SI_INT:
1018 /* Note: on Gen7, this code may be reached with s_is_zero==true
1019 * because in Gen7's ld2dss message, the sample index is the first
1020 * argument. When this happens, we need to move a 0 into the
1021 * appropriate message register.
1022 */
1023 if (s_is_zero)
1024 brw_MOV(&func, mrf, brw_imm_ud(0));
1025 else
1026 expand_to_32_bits(S, mrf);
1027 break;
1028 case SAMPLER_MESSAGE_ARG_ZERO_INT:
1029 brw_MOV(&func, mrf, brw_imm_ud(0));
1030 break;
1031 }
1032 mrf.nr += 2;
1033 }
1034
1035 brw_SAMPLE(&func,
1036 retype(Rdata, BRW_REGISTER_TYPE_UW) /* dest */,
1037 base_mrf /* msg_reg_nr */,
1038 brw_message_reg(base_mrf) /* src0 */,
1039 BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX,
1040 0 /* sampler */,
1041 WRITEMASK_XYZW,
1042 msg_type,
1043 8 /* response_length. TODO: should be smaller for non-RGBA formats? */,
1044 mrf.nr - base_mrf /* msg_length */,
1045 0 /* header_present */,
1046 BRW_SAMPLER_SIMD_MODE_SIMD16,
1047 BRW_SAMPLER_RETURN_FORMAT_FLOAT32);
1048 }
1049
1050 #undef X
1051 #undef Y
1052 #undef U
1053 #undef V
1054 #undef S
1055 #undef SWAP_XY_AND_XPYP
1056
1057 void
1058 brw_blorp_blit_program::render_target_write()
1059 {
1060 struct brw_reg mrf_rt_write = vec16(brw_message_reg(base_mrf));
1061 int mrf_offset = 0;
1062
1063 /* If we may have killed pixels, then we need to send R0 and R1 in a header
1064 * so that the render target knows which pixels we killed.
1065 */
1066 bool use_header = key->use_kill;
1067 if (use_header) {
1068 /* Copy R0/1 to MRF */
1069 brw_MOV(&func, retype(mrf_rt_write, BRW_REGISTER_TYPE_UD),
1070 retype(R0, BRW_REGISTER_TYPE_UD));
1071 mrf_offset += 2;
1072 }
1073
1074 /* Copy texture data to MRFs */
1075 for (int i = 0; i < 4; ++i) {
1076 /* E.g. mov(16) m2.0<1>:f r2.0<8;8,1>:f { Align1, H1 } */
1077 brw_MOV(&func, offset(mrf_rt_write, mrf_offset), offset(vec8(Rdata), 2*i));
1078 mrf_offset += 2;
1079 }
1080
1081 /* Now write to the render target and terminate the thread */
1082 brw_fb_WRITE(&func,
1083 16 /* dispatch_width */,
1084 base_mrf /* msg_reg_nr */,
1085 mrf_rt_write /* src0 */,
1086 BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE,
1087 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
1088 mrf_offset /* msg_length. TODO: Should be smaller for non-RGBA formats. */,
1089 0 /* response_length */,
1090 true /* eot */,
1091 use_header);
1092 }
1093
1094
1095 void
1096 brw_blorp_coord_transform_params::setup(GLuint src0, GLuint dst0, GLuint dst1,
1097 bool mirror)
1098 {
1099 if (!mirror) {
1100 /* When not mirroring a coordinate (say, X), we need:
1101 * x' - src_x0 = x - dst_x0
1102 * Therefore:
1103 * x' = 1*x + (src_x0 - dst_x0)
1104 */
1105 multiplier = 1;
1106 offset = src0 - dst0;
1107 } else {
1108 /* When mirroring X we need:
1109 * x' - src_x0 = dst_x1 - x - 1
1110 * Therefore:
1111 * x' = -1*x + (src_x0 + dst_x1 - 1)
1112 */
1113 multiplier = -1;
1114 offset = src0 + dst1 - 1;
1115 }
1116 }
1117
1118
1119 brw_blorp_blit_params::brw_blorp_blit_params(struct intel_mipmap_tree *src_mt,
1120 struct intel_mipmap_tree *dst_mt,
1121 GLuint src_x0, GLuint src_y0,
1122 GLuint dst_x0, GLuint dst_y0,
1123 GLuint dst_x1, GLuint dst_y1,
1124 bool mirror_x, bool mirror_y)
1125 {
1126 src.set(src_mt, 0, 0);
1127 dst.set(dst_mt, 0, 0);
1128
1129 use_wm_prog = true;
1130 memset(&wm_prog_key, 0, sizeof(wm_prog_key));
1131
1132 if (dst.map_stencil_as_y_tiled && dst.num_samples > 0) {
1133 /* If the destination surface is a W-tiled multisampled stencil buffer
1134 * that we're mapping as Y tiled, then we need to arrange for the WM
1135 * program to run once per sample rather than once per pixel, because
1136 * the memory layout of related samples doesn't match between W and Y
1137 * tiling.
1138 */
1139 wm_prog_key.persample_msaa_dispatch = true;
1140 }
1141
1142 if (src.num_samples > 0 && dst.num_samples > 0) {
1143 /* We are blitting from a multisample buffer to a multisample buffer, so
1144 * we must preserve samples within a pixel. This means we have to
1145 * arrange for the WM program to run once per sample rather than once
1146 * per pixel.
1147 */
1148 wm_prog_key.persample_msaa_dispatch = true;
1149 }
1150
1151 /* The render path must be configured to use the same number of samples as
1152 * the destination buffer.
1153 */
1154 num_samples = dst.num_samples;
1155
1156 GLenum base_format = _mesa_get_format_base_format(src_mt->format);
1157 if (base_format != GL_DEPTH_COMPONENT && /* TODO: what about depth/stencil? */
1158 base_format != GL_STENCIL_INDEX &&
1159 src_mt->num_samples > 0 && dst_mt->num_samples == 0) {
1160 /* We are downsampling a color buffer, so blend. */
1161 wm_prog_key.blend = true;
1162 }
1163
1164 /* src_samples and dst_samples are the true sample counts */
1165 wm_prog_key.src_samples = src_mt->num_samples;
1166 wm_prog_key.dst_samples = dst_mt->num_samples;
1167
1168 /* tex_samples and rt_samples are the sample counts that are set up in
1169 * SURFACE_STATE.
1170 */
1171 wm_prog_key.tex_samples = src.num_samples;
1172 wm_prog_key.rt_samples = dst.num_samples;
1173
1174 wm_prog_key.src_tiled_w = src.map_stencil_as_y_tiled;
1175 wm_prog_key.dst_tiled_w = dst.map_stencil_as_y_tiled;
1176 x0 = wm_push_consts.dst_x0 = dst_x0;
1177 y0 = wm_push_consts.dst_y0 = dst_y0;
1178 x1 = wm_push_consts.dst_x1 = dst_x1;
1179 y1 = wm_push_consts.dst_y1 = dst_y1;
1180 wm_push_consts.x_transform.setup(src_x0, dst_x0, dst_x1, mirror_x);
1181 wm_push_consts.y_transform.setup(src_y0, dst_y0, dst_y1, mirror_y);
1182
1183 if (dst.num_samples == 0 && dst_mt->num_samples > 0) {
1184 /* We must expand the rectangle we send through the rendering pipeline,
1185 * to account for the fact that we are mapping the destination region as
1186 * single-sampled when it is in fact multisampled. We must also align
1187 * it to a multiple of the multisampling pattern, because the
1188 * differences between multisampled and single-sampled surface formats
1189 * will mean that pixels are scrambled within the multisampling pattern.
1190 * TODO: what if this makes the coordinates too large?
1191 */
1192 x0 = (x0 * 2) & ~3;
1193 y0 = (y0 * 2) & ~3;
1194 x1 = ALIGN(x1 * 2, 4);
1195 y1 = ALIGN(y1 * 2, 4);
1196 wm_prog_key.use_kill = true;
1197 }
1198
1199 if (dst.map_stencil_as_y_tiled) {
1200 /* We must modify the rectangle we send through the rendering pipeline,
1201 * to account for the fact that we are mapping it as Y-tiled when it is
1202 * in fact W-tiled. Y tiles have dimensions 128x32 whereas W tiles have
1203 * dimensions 64x64. We must also align it to a multiple of the tile
1204 * size, because the differences between W and Y tiling formats will
1205 * mean that pixels are scrambled within the tile.
1206 *
1207 * Note: if the destination surface configured as an MSAA surface, then
1208 * the effective tile size we need to align it to is smaller, because
1209 * each pixel covers a 2x2 or a 4x2 block of samples.
1210 *
1211 * TODO: what if this makes the coordinates too large?
1212 */
1213 unsigned x_align = 64, y_align = 64;
1214 if (dst_mt->num_samples > 0) {
1215 x_align /= (dst_mt->num_samples == 4 ? 2 : 4);
1216 y_align /= 2;
1217 }
1218 x0 = (x0 & ~(x_align - 1)) * 2;
1219 y0 = (y0 & ~(y_align - 1)) / 2;
1220 x1 = ALIGN(x1, x_align) * 2;
1221 y1 = ALIGN(y1, y_align) / 2;
1222 wm_prog_key.use_kill = true;
1223 }
1224 }
1225
1226 uint32_t
1227 brw_blorp_blit_params::get_wm_prog(struct brw_context *brw,
1228 brw_blorp_prog_data **prog_data) const
1229 {
1230 uint32_t prog_offset;
1231 if (!brw_search_cache(&brw->cache, BRW_BLORP_BLIT_PROG,
1232 &this->wm_prog_key, sizeof(this->wm_prog_key),
1233 &prog_offset, prog_data)) {
1234 brw_blorp_blit_program prog(brw, &this->wm_prog_key);
1235 GLuint program_size;
1236 const GLuint *program = prog.compile(brw, &program_size);
1237 brw_upload_cache(&brw->cache, BRW_BLORP_BLIT_PROG,
1238 &this->wm_prog_key, sizeof(this->wm_prog_key),
1239 program, program_size,
1240 &prog.prog_data, sizeof(prog.prog_data),
1241 &prog_offset, prog_data);
1242 }
1243 return prog_offset;
1244 }