src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp

   1 /*
   2  * Copyright © 2013 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/ralloc.h"
  25 #include "brw_blorp_blit_eu.h"
  26 #include "brw_blorp.h"
  27 #include "brw_cfg.h"
  28
  29 brw_blorp_eu_emitter::brw_blorp_eu_emitter()
  30    : mem_ctx(ralloc_context(NULL))
  31 {
  32 }
  33
  34 brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
  35 {
  36    ralloc_free(mem_ctx);
  37 }
  38
  39 const unsigned *
  40 brw_blorp_eu_emitter::get_program(struct brw_context *brw, bool debug_flag,
  41                                   unsigned *program_size)
  42 {
  43    cfg_t cfg(&insts);
  44    brw_stage_prog_data prog_data = { 0 };
  45    brw_wm_prog_key prog_key = { 0 };
  46    fs_generator generator(brw->intelScreen->compiler, brw, mem_ctx, &prog_key,
  47                           &prog_data, 0, false, MESA_SHADER_FRAGMENT);
  48
  49    if (debug_flag)
  50       generator.enable_debug("blorp");
  51
  52    generator.generate_code(&cfg, 16);
  53
  54    return generator.get_assembly(program_size);
  55 }
  56
  57 /**
  58  * Emit code that kills pixels whose X and Y coordinates are outside the
  59  * boundary of the rectangle defined by the push constants (dst_x0, dst_y0,
  60  * dst_x1, dst_y1).
  61  */
  62 void
  63 brw_blorp_eu_emitter::emit_kill_if_outside_rect(const struct brw_reg &x,
  64                                                 const struct brw_reg &y,
  65                                                 const struct brw_reg &dst_x0,
  66                                                 const struct brw_reg &dst_x1,
  67                                                 const struct brw_reg &dst_y0,
  68                                                 const struct brw_reg &dst_y1)
  69 {
  70    struct brw_reg f0 = brw_flag_reg(0, 0);
  71    struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
  72
  73    emit_cmp(BRW_CONDITIONAL_GE, x, dst_x0);
  74    emit_cmp(BRW_CONDITIONAL_GE, y, dst_y0)->predicate = BRW_PREDICATE_NORMAL;
  75    emit_cmp(BRW_CONDITIONAL_L, x, dst_x1)->predicate = BRW_PREDICATE_NORMAL;
  76    emit_cmp(BRW_CONDITIONAL_L, y, dst_y1)->predicate = BRW_PREDICATE_NORMAL;
  77
  78    fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, g1, f0, g1);
  79    inst->force_writemask_all = true;
  80    insts.push_tail(inst);
  81 }
  82
  83 void
  84 brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
  85                                           enum opcode op,
  86                                           unsigned base_mrf,
  87                                           unsigned msg_length)
  88 {
  89    fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, brw_message_reg(base_mrf),
  90                                          brw_imm_ud(0u), brw_imm_ud(0u));
  91
  92    inst->base_mrf = base_mrf;
  93    inst->mlen = msg_length;
  94    inst->header_size = 0;
  95
  96    insts.push_tail(inst);
  97 }
  98
  99 void
 100 brw_blorp_eu_emitter::emit_render_target_write(const struct brw_reg &src0,
 101                                                int msg_reg_nr,
 102                                                unsigned msg_length,
 103                                                bool use_header)
 104 {
 105    fs_inst *inst = new (mem_ctx) fs_inst(FS_OPCODE_BLORP_FB_WRITE, 16);
 106
 107    inst->src[0] = src0;
 108    inst->sources = 1;
 109    inst->base_mrf = msg_reg_nr;
 110    inst->mlen = msg_length;
 111    inst->header_size = use_header ? 2 : 0;
 112    inst->target = BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX;
 113
 114    insts.push_tail(inst);
 115 }
 116
 117 void
 118 brw_blorp_eu_emitter::emit_combine(enum opcode combine_opcode,
 119                                    const struct brw_reg &dst,
 120                                    const struct brw_reg &src_1,
 121                                    const struct brw_reg &src_2)
 122 {
 123    assert(combine_opcode == BRW_OPCODE_ADD || combine_opcode == BRW_OPCODE_AVG);
 124
 125    insts.push_tail(new (mem_ctx) fs_inst(combine_opcode, 16, dst,
 126                                          src_1, src_2));
 127 }
 128
 129 fs_inst *
 130 brw_blorp_eu_emitter::emit_cmp(enum brw_conditional_mod op,
 131                                const struct brw_reg &x,
 132                                const struct brw_reg &y)
 133 {
 134    fs_inst *cmp = new (mem_ctx) fs_inst(BRW_OPCODE_CMP, 16,
 135                                         vec16(brw_null_reg()), x, y);
 136    cmp->conditional_mod = op;
 137    insts.push_tail(cmp);
 138    return cmp;
 139 }
 140