glsl: Lower UBO and SSBO access in glsl linker
[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp_blit_eu.h
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef BRW_BLORP_BLIT_EU_H
25 #define BRW_BLORP_BLIT_EU_H
26
27 #include "brw_context.h"
28 #include "brw_fs.h"
29
30 class brw_blorp_eu_emitter
31 {
32 protected:
33 explicit brw_blorp_eu_emitter(struct brw_context *brw, bool debug_flag);
34 ~brw_blorp_eu_emitter();
35
36 const unsigned *get_program(unsigned *program_size);
37
38 void emit_kill_if_outside_rect(const struct brw_reg &x,
39 const struct brw_reg &y,
40 const struct brw_reg &dst_x0,
41 const struct brw_reg &dst_x1,
42 const struct brw_reg &dst_y0,
43 const struct brw_reg &dst_y1);
44
45 void emit_texture_lookup(const struct brw_reg &dst,
46 enum opcode op,
47 unsigned base_mrf,
48 unsigned msg_length);
49
50 void emit_render_target_write(const struct brw_reg &src0,
51 unsigned msg_reg_nr,
52 unsigned msg_length,
53 bool use_header);
54
55 void emit_combine(enum opcode combine_opcode,
56 const struct brw_reg &dst,
57 const struct brw_reg &src_1,
58 const struct brw_reg &src_2);
59
60 inline void emit_cond_mov(const struct brw_reg &x,
61 const struct brw_reg &y,
62 enum brw_conditional_mod op,
63 const struct brw_reg &dst,
64 const struct brw_reg &src)
65 {
66 emit_cmp(op, x, y);
67
68 fs_inst *mv = new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src);
69 mv->predicate = BRW_PREDICATE_NORMAL;
70 insts.push_tail(mv);
71 }
72
73 inline void emit_if_eq_mov(const struct brw_reg &x, unsigned y,
74 const struct brw_reg &dst, unsigned src)
75 {
76 emit_cond_mov(x, brw_imm_d(y), BRW_CONDITIONAL_EQ, dst, brw_imm_d(src));
77 }
78
79 inline void emit_lrp(const struct brw_reg &dst,
80 const struct brw_reg &src1,
81 const struct brw_reg &src2,
82 const struct brw_reg &src3)
83 {
84 insts.push_tail(
85 new (mem_ctx) fs_inst(BRW_OPCODE_LRP, 16, dst, src1, src2, src3));
86 }
87
88 inline void emit_mad(const struct brw_reg &dst,
89 const struct brw_reg &src1,
90 const struct brw_reg &src2,
91 const struct brw_reg &src3)
92 {
93 insts.push_tail(
94 new (mem_ctx) fs_inst(BRW_OPCODE_MAD, 16, dst, src1, src2, src3));
95 }
96
97 inline void emit_min(const struct brw_reg& dst,
98 const struct brw_reg& src1,
99 const struct brw_reg& src2)
100 {
101 fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
102 inst->conditional_mod = BRW_CONDITIONAL_L;
103 insts.push_tail(inst);
104 }
105
106 inline void emit_max(const struct brw_reg& dst,
107 const struct brw_reg& src1,
108 const struct brw_reg& src2)
109 {
110 fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
111 inst->conditional_mod = BRW_CONDITIONAL_GE;
112 insts.push_tail(inst);
113 }
114
115 inline void emit_mov(const struct brw_reg& dst, const struct brw_reg& src)
116 {
117 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src));
118 }
119
120 inline void emit_mov_8(const struct brw_reg& dst, const struct brw_reg& src)
121 {
122 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 8, dst, src));
123 }
124
125 inline void emit_and(const struct brw_reg& dst,
126 const struct brw_reg& src1,
127 const struct brw_reg& src2)
128 {
129 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, dst, src1, src2));
130 }
131
132 inline void emit_add(const struct brw_reg& dst,
133 const struct brw_reg& src1,
134 const struct brw_reg& src2)
135 {
136 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ADD, 16, dst, src1, src2));
137 }
138
139 inline void emit_add_8(const struct brw_reg& dst,
140 const struct brw_reg& src1,
141 const struct brw_reg& src2)
142 {
143 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ADD, 8, dst, src1, src2));
144 }
145
146 inline void emit_mul(const struct brw_reg& dst,
147 const struct brw_reg& src1,
148 const struct brw_reg& src2)
149 {
150 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MUL, 16, dst, src1, src2));
151 }
152
153 inline void emit_shr(const struct brw_reg& dst,
154 const struct brw_reg& src1,
155 const struct brw_reg& src2)
156 {
157 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_SHR, 16, dst, src1, src2));
158 }
159
160 inline void emit_shl(const struct brw_reg& dst,
161 const struct brw_reg& src1,
162 const struct brw_reg& src2)
163 {
164 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_SHL, 16, dst, src1, src2));
165 }
166
167 inline void emit_or(const struct brw_reg& dst,
168 const struct brw_reg& src1,
169 const struct brw_reg& src2)
170 {
171 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_OR, 16, dst, src1, src2));
172 }
173
174 inline void emit_frc(const struct brw_reg& dst,
175 const struct brw_reg& src)
176 {
177 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_FRC, 16, dst, src));
178 }
179
180 inline void emit_rndd(const struct brw_reg& dst,
181 const struct brw_reg& src)
182 {
183 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_RNDD, 16, dst, src));
184 }
185
186 inline void emit_cmp_if(enum brw_conditional_mod op,
187 const struct brw_reg &x,
188 const struct brw_reg &y)
189 {
190 emit_cmp(op, x, y);
191 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_IF, 16));
192 }
193
194 inline void emit_else(void)
195 {
196 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ELSE, 16));
197 }
198
199 inline void emit_endif(void)
200 {
201 insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ENDIF, 16));
202 }
203
204 private:
205 fs_inst *emit_cmp(enum brw_conditional_mod op, const struct brw_reg &x,
206 const struct brw_reg &y);
207
208 void *mem_ctx;
209 exec_list insts;
210 fs_generator generator;
211 };
212
213 #endif /* BRW_BLORP_BLIT_EU_H */