i965/blorp: Mark branch unreachable to silence uninitialized var warning.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_blorp_clear.cpp
1 /*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 extern "C" {
25 #include "main/teximage.h"
26 #include "main/blend.h"
27 #include "main/fbobject.h"
28 #include "main/renderbuffer.h"
29 }
30
31 #include "glsl/ralloc.h"
32
33 #include "intel_fbo.h"
34
35 #include "brw_blorp.h"
36 #include "brw_context.h"
37 #include "brw_eu.h"
38 #include "brw_state.h"
39
40 #define FILE_DEBUG_FLAG DEBUG_BLORP
41
42 struct brw_blorp_const_color_prog_key
43 {
44 bool use_simd16_replicated_data;
45 bool pad[3];
46 };
47
48 /**
49 * Parameters for a blorp operation where the fragment shader outputs a
50 * constant color. This is used for both fast color clears and color
51 * resolves.
52 */
53 class brw_blorp_const_color_params : public brw_blorp_params
54 {
55 public:
56 virtual uint32_t get_wm_prog(struct brw_context *brw,
57 brw_blorp_prog_data **prog_data) const;
58
59 brw_blorp_const_color_prog_key wm_prog_key;
60 };
61
62 class brw_blorp_clear_params : public brw_blorp_const_color_params
63 {
64 public:
65 brw_blorp_clear_params(struct brw_context *brw,
66 struct gl_framebuffer *fb,
67 struct gl_renderbuffer *rb,
68 GLubyte *color_mask,
69 bool partial_clear,
70 unsigned layer);
71 };
72
73
74 /**
75 * Parameters for a blorp operation that performs a "render target resolve".
76 * This is used to resolve pending fast clear pixels before a color buffer is
77 * used for texturing, ReadPixels, or scanout.
78 */
79 class brw_blorp_rt_resolve_params : public brw_blorp_const_color_params
80 {
81 public:
82 brw_blorp_rt_resolve_params(struct brw_context *brw,
83 struct intel_mipmap_tree *mt);
84 };
85
86
87 class brw_blorp_const_color_program
88 {
89 public:
90 brw_blorp_const_color_program(struct brw_context *brw,
91 const brw_blorp_const_color_prog_key *key);
92 ~brw_blorp_const_color_program();
93
94 const GLuint *compile(struct brw_context *brw, GLuint *program_size);
95
96 brw_blorp_prog_data prog_data;
97
98 private:
99 void alloc_regs();
100
101 void *mem_ctx;
102 struct brw_context *brw;
103 const brw_blorp_const_color_prog_key *key;
104 struct brw_compile func;
105
106 /* Thread dispatch header */
107 struct brw_reg R0;
108
109 /* Pixel X/Y coordinates (always in R1). */
110 struct brw_reg R1;
111
112 /* Register with push constants (a single vec4) */
113 struct brw_reg clear_rgba;
114
115 /* MRF used for render target writes */
116 GLuint base_mrf;
117 };
118
119 brw_blorp_const_color_program::brw_blorp_const_color_program(
120 struct brw_context *brw,
121 const brw_blorp_const_color_prog_key *key)
122 : mem_ctx(ralloc_context(NULL)),
123 brw(brw),
124 key(key),
125 R0(),
126 R1(),
127 clear_rgba(),
128 base_mrf(0)
129 {
130 prog_data.first_curbe_grf = 0;
131 prog_data.persample_msaa_dispatch = false;
132 brw_init_compile(brw, &func, mem_ctx);
133 }
134
135 brw_blorp_const_color_program::~brw_blorp_const_color_program()
136 {
137 ralloc_free(mem_ctx);
138 }
139
140
141 /**
142 * Determine if fast color clear supports the given clear color.
143 *
144 * Fast color clear can only clear to color values of 1.0 or 0.0. At the
145 * moment we only support floating point, unorm, and snorm buffers.
146 */
147 static bool
148 is_color_fast_clear_compatible(struct brw_context *brw,
149 mesa_format format,
150 const union gl_color_union *color)
151 {
152 if (_mesa_is_format_integer_color(format))
153 return false;
154
155 for (int i = 0; i < 4; i++) {
156 if (color->f[i] != 0.0 && color->f[i] != 1.0 &&
157 _mesa_format_has_color_component(format, i)) {
158 return false;
159 }
160 }
161 return true;
162 }
163
164
165 /**
166 * Convert the given color to a bitfield suitable for ORing into DWORD 7 of
167 * SURFACE_STATE.
168 */
169 static uint32_t
170 compute_fast_clear_color_bits(const union gl_color_union *color)
171 {
172 uint32_t bits = 0;
173 for (int i = 0; i < 4; i++) {
174 if (color->f[i] != 0.0)
175 bits |= 1 << (GEN7_SURFACE_CLEAR_COLOR_SHIFT + (3 - i));
176 }
177 return bits;
178 }
179
180
181 brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw,
182 struct gl_framebuffer *fb,
183 struct gl_renderbuffer *rb,
184 GLubyte *color_mask,
185 bool partial_clear,
186 unsigned layer)
187 {
188 struct gl_context *ctx = &brw->ctx;
189 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
190
191 dst.set(brw, irb->mt, irb->mt_level, layer, true);
192
193 /* Override the surface format according to the context's sRGB rules. */
194 mesa_format format = _mesa_get_render_format(ctx, irb->mt->format);
195 dst.brw_surfaceformat = brw->render_target_format[format];
196
197 x0 = fb->_Xmin;
198 x1 = fb->_Xmax;
199 if (rb->Name != 0) {
200 y0 = fb->_Ymin;
201 y1 = fb->_Ymax;
202 } else {
203 y0 = rb->Height - fb->_Ymax;
204 y1 = rb->Height - fb->_Ymin;
205 }
206
207 float *push_consts = (float *)&wm_push_consts;
208
209 push_consts[0] = ctx->Color.ClearColor.f[0];
210 push_consts[1] = ctx->Color.ClearColor.f[1];
211 push_consts[2] = ctx->Color.ClearColor.f[2];
212 push_consts[3] = ctx->Color.ClearColor.f[3];
213
214 use_wm_prog = true;
215
216 memset(&wm_prog_key, 0, sizeof(wm_prog_key));
217
218 wm_prog_key.use_simd16_replicated_data = true;
219
220 /* From the SNB PRM (Vol4_Part1):
221 *
222 * "Replicated data (Message Type = 111) is only supported when
223 * accessing tiled memory. Using this Message Type to access linear
224 * (untiled) memory is UNDEFINED."
225 */
226 if (irb->mt->tiling == I915_TILING_NONE)
227 wm_prog_key.use_simd16_replicated_data = false;
228
229 /* Constant color writes ignore everyting in blend and color calculator
230 * state. This is not documented.
231 */
232 for (int i = 0; i < 4; i++) {
233 if (_mesa_format_has_color_component(irb->mt->format, i) &&
234 !color_mask[i]) {
235 color_write_disable[i] = true;
236 wm_prog_key.use_simd16_replicated_data = false;
237 }
238 }
239
240 /* If we can do this as a fast color clear, do so.
241 *
242 * Note that the condition "!partial_clear" means we only try to do full
243 * buffer clears using fast color clear logic. This is necessary because
244 * the fast color clear alignment requirements mean that we typically have
245 * to clear a larger rectangle than (x0, y0) to (x1, y1). Restricting fast
246 * color clears to the full-buffer condition guarantees that the extra
247 * memory locations that get written to are outside the image boundary (and
248 * hence irrelevant). Note that the rectangle alignment requirements are
249 * never larger than the size of a tile, so there is no danger of
250 * overflowing beyond the memory belonging to the region.
251 */
252 if (irb->mt->fast_clear_state != INTEL_FAST_CLEAR_STATE_NO_MCS &&
253 !partial_clear && wm_prog_key.use_simd16_replicated_data &&
254 is_color_fast_clear_compatible(brw, format, &ctx->Color.ClearColor)) {
255 memset(push_consts, 0xff, 4*sizeof(float));
256 fast_clear_op = GEN7_FAST_CLEAR_OP_FAST_CLEAR;
257
258 /* Figure out what the clear rectangle needs to be aligned to, and how
259 * much it needs to be scaled down.
260 */
261 unsigned x_align, y_align, x_scaledown, y_scaledown;
262
263 if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_NONE) {
264 /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
265 * Target(s)", beneath the "Fast Color Clear" bullet (p327):
266 *
267 * Clear pass must have a clear rectangle that must follow
268 * alignment rules in terms of pixels and lines as shown in the
269 * table below. Further, the clear-rectangle height and width
270 * must be multiple of the following dimensions. If the height
271 * and width of the render target being cleared do not meet these
272 * requirements, an MCS buffer can be created such that it
273 * follows the requirement and covers the RT.
274 *
275 * The alignment size in the table that follows is related to the
276 * alignment size returned by intel_get_non_msrt_mcs_alignment(), but
277 * with X alignment multiplied by 16 and Y alignment multiplied by 32.
278 */
279 intel_get_non_msrt_mcs_alignment(brw, irb->mt, &x_align, &y_align);
280 x_align *= 16;
281 y_align *= 32;
282
283 /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
284 * Target(s)", beneath the "Fast Color Clear" bullet (p327):
285 *
286 * In order to optimize the performance MCS buffer (when bound to
287 * 1X RT) clear similarly to MCS buffer clear for MSRT case,
288 * clear rect is required to be scaled by the following factors
289 * in the horizontal and vertical directions:
290 *
291 * The X and Y scale down factors in the table that follows are each
292 * equal to half the alignment value computed above.
293 */
294 x_scaledown = x_align / 2;
295 y_scaledown = y_align / 2;
296
297 /* From BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
298 * Backend > MCS Buffer for Render Target(s) [DevIVB+] > Table "Color
299 * Clear of Non-MultiSampled Render Target Restrictions":
300 *
301 * Clear rectangle must be aligned to two times the number of
302 * pixels in the table shown below due to 16x16 hashing across the
303 * slice.
304 */
305 x_align *= 2;
306 y_align *= 2;
307 } else {
308 /* From the Ivy Bridge PRM, Vol2 Part1 11.7 "MCS Buffer for Render
309 * Target(s)", beneath the "MSAA Compression" bullet (p326):
310 *
311 * Clear pass for this case requires that scaled down primitive
312 * is sent down with upper left co-ordinate to coincide with
313 * actual rectangle being cleared. For MSAA, clear rectangle’s
314 * height and width need to as show in the following table in
315 * terms of (width,height) of the RT.
316 *
317 * MSAA Width of Clear Rect Height of Clear Rect
318 * 4X Ceil(1/8*width) Ceil(1/2*height)
319 * 8X Ceil(1/2*width) Ceil(1/2*height)
320 *
321 * The text "with upper left co-ordinate to coincide with actual
322 * rectangle being cleared" is a little confusing--it seems to imply
323 * that to clear a rectangle from (x,y) to (x+w,y+h), one needs to
324 * feed the pipeline using the rectangle (x,y) to
325 * (x+Ceil(w/N),y+Ceil(h/2)), where N is either 2 or 8 depending on
326 * the number of samples. Experiments indicate that this is not
327 * quite correct; actually, what the hardware appears to do is to
328 * align whatever rectangle is sent down the pipeline to the nearest
329 * multiple of 2x2 blocks, and then scale it up by a factor of N
330 * horizontally and 2 vertically. So the resulting alignment is 4
331 * vertically and either 4 or 16 horizontally, and the scaledown
332 * factor is 2 vertically and either 2 or 8 horizontally.
333 */
334 switch (irb->mt->num_samples) {
335 case 4:
336 x_scaledown = 8;
337 break;
338 case 8:
339 x_scaledown = 2;
340 break;
341 default:
342 assert(!"Unexpected sample count for fast clear");
343 unreachable();
344 break;
345 }
346 y_scaledown = 2;
347 x_align = x_scaledown * 2;
348 y_align = y_scaledown * 2;
349 }
350
351 /* Do the alignment and scaledown. */
352 x0 = ROUND_DOWN_TO(x0, x_align) / x_scaledown;
353 y0 = ROUND_DOWN_TO(y0, y_align) / y_scaledown;
354 x1 = ALIGN(x1, x_align) / x_scaledown;
355 y1 = ALIGN(y1, y_align) / y_scaledown;
356 }
357 }
358
359
360 brw_blorp_rt_resolve_params::brw_blorp_rt_resolve_params(
361 struct brw_context *brw,
362 struct intel_mipmap_tree *mt)
363 {
364 dst.set(brw, mt, 0 /* level */, 0 /* layer */, true);
365
366 /* From the Ivy Bridge PRM, Vol2 Part1 11.9 "Render Target Resolve":
367 *
368 * A rectangle primitive must be scaled down by the following factors
369 * with respect to render target being resolved.
370 *
371 * The scaledown factors in the table that follows are related to the
372 * alignment size returned by intel_get_non_msrt_mcs_alignment(), but with
373 * X and Y alignment each divided by 2.
374 */
375 unsigned x_align, y_align;
376 intel_get_non_msrt_mcs_alignment(brw, mt, &x_align, &y_align);
377 unsigned x_scaledown = x_align / 2;
378 unsigned y_scaledown = y_align / 2;
379 x0 = y0 = 0;
380 x1 = ALIGN(mt->logical_width0, x_scaledown) / x_scaledown;
381 y1 = ALIGN(mt->logical_height0, y_scaledown) / y_scaledown;
382
383 fast_clear_op = GEN7_FAST_CLEAR_OP_RESOLVE;
384
385 /* Note: there is no need to initialize push constants because it doesn't
386 * matter what data gets dispatched to the render target. However, we must
387 * ensure that the fragment shader delivers the data using the "replicated
388 * color" message.
389 */
390 use_wm_prog = true;
391 memset(&wm_prog_key, 0, sizeof(wm_prog_key));
392 wm_prog_key.use_simd16_replicated_data = true;
393 }
394
395
396 uint32_t
397 brw_blorp_const_color_params::get_wm_prog(struct brw_context *brw,
398 brw_blorp_prog_data **prog_data)
399 const
400 {
401 uint32_t prog_offset = 0;
402 if (!brw_search_cache(&brw->cache, BRW_BLORP_CONST_COLOR_PROG,
403 &this->wm_prog_key, sizeof(this->wm_prog_key),
404 &prog_offset, prog_data)) {
405 brw_blorp_const_color_program prog(brw, &this->wm_prog_key);
406 GLuint program_size;
407 const GLuint *program = prog.compile(brw, &program_size);
408 brw_upload_cache(&brw->cache, BRW_BLORP_CONST_COLOR_PROG,
409 &this->wm_prog_key, sizeof(this->wm_prog_key),
410 program, program_size,
411 &prog.prog_data, sizeof(prog.prog_data),
412 &prog_offset, prog_data);
413 }
414 return prog_offset;
415 }
416
417 void
418 brw_blorp_const_color_program::alloc_regs()
419 {
420 int reg = 0;
421 this->R0 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
422 this->R1 = retype(brw_vec8_grf(reg++, 0), BRW_REGISTER_TYPE_UW);
423
424 prog_data.first_curbe_grf = reg;
425 clear_rgba = retype(brw_vec4_grf(reg++, 0), BRW_REGISTER_TYPE_F);
426 reg += BRW_BLORP_NUM_PUSH_CONST_REGS;
427
428 /* Make sure we didn't run out of registers */
429 assert(reg <= GEN7_MRF_HACK_START);
430
431 this->base_mrf = 2;
432 }
433
434 const GLuint *
435 brw_blorp_const_color_program::compile(struct brw_context *brw,
436 GLuint *program_size)
437 {
438 /* Set up prog_data */
439 memset(&prog_data, 0, sizeof(prog_data));
440 prog_data.persample_msaa_dispatch = false;
441
442 alloc_regs();
443
444 brw_set_default_compression_control(&func, BRW_COMPRESSION_NONE);
445
446 struct brw_reg mrf_rt_write =
447 retype(vec16(brw_message_reg(base_mrf)), BRW_REGISTER_TYPE_F);
448
449 uint32_t mlen, msg_type;
450 if (key->use_simd16_replicated_data) {
451 /* The message payload is a single register with the low 4 floats/ints
452 * filled with the constant clear color.
453 */
454 brw_set_default_mask_control(&func, BRW_MASK_DISABLE);
455 brw_MOV(&func, vec4(brw_message_reg(base_mrf)), clear_rgba);
456 brw_set_default_mask_control(&func, BRW_MASK_ENABLE);
457
458 msg_type = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE_REPLICATED;
459 mlen = 1;
460 } else {
461 for (int i = 0; i < 4; i++) {
462 /* The message payload is pairs of registers for 16 pixels each of r,
463 * g, b, and a.
464 */
465 brw_set_default_compression_control(&func, BRW_COMPRESSION_COMPRESSED);
466 brw_MOV(&func,
467 brw_message_reg(base_mrf + i * 2),
468 brw_vec1_grf(clear_rgba.nr, i));
469 brw_set_default_compression_control(&func, BRW_COMPRESSION_NONE);
470 }
471
472 msg_type = BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE;
473 mlen = 8;
474 }
475
476 /* Now write to the render target and terminate the thread */
477 brw_fb_WRITE(&func,
478 16 /* dispatch_width */,
479 base_mrf /* msg_reg_nr */,
480 mrf_rt_write /* src0 */,
481 msg_type,
482 BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX,
483 mlen,
484 0 /* response_length */,
485 true /* eot */,
486 false /* header present */);
487
488 if (unlikely(INTEL_DEBUG & DEBUG_BLORP)) {
489 fprintf(stderr, "Native code for BLORP clear:\n");
490 brw_disassemble(brw, func.store, 0, func.next_insn_offset, stderr);
491 fprintf(stderr, "\n");
492 }
493
494 brw_compact_instructions(&func, 0, 0, NULL);
495 return brw_get_program(&func, program_size);
496 }
497
498
499 bool
500 do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
501 struct gl_renderbuffer *rb, unsigned buf,
502 bool partial_clear, unsigned layer)
503 {
504 struct gl_context *ctx = &brw->ctx;
505 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
506
507 brw_blorp_clear_params params(brw, fb, rb, ctx->Color.ColorMask[buf],
508 partial_clear, layer);
509
510 bool is_fast_clear =
511 (params.fast_clear_op == GEN7_FAST_CLEAR_OP_FAST_CLEAR);
512 if (is_fast_clear) {
513 /* Record the clear color in the miptree so that it will be
514 * programmed in SURFACE_STATE by later rendering and resolve
515 * operations.
516 */
517 uint32_t new_color_value =
518 compute_fast_clear_color_bits(&ctx->Color.ClearColor);
519 if (irb->mt->fast_clear_color_value != new_color_value) {
520 irb->mt->fast_clear_color_value = new_color_value;
521 brw->state.dirty.brw |= BRW_NEW_SURFACES;
522 }
523
524 /* If the buffer is already in INTEL_FAST_CLEAR_STATE_CLEAR, the clear
525 * is redundant and can be skipped.
526 */
527 if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_CLEAR)
528 return true;
529
530 /* If the MCS buffer hasn't been allocated yet, we need to allocate
531 * it now.
532 */
533 if (!irb->mt->mcs_mt) {
534 if (!intel_miptree_alloc_non_msrt_mcs(brw, irb->mt)) {
535 /* MCS allocation failed--probably this will only happen in
536 * out-of-memory conditions. But in any case, try to recover
537 * by falling back to a non-blorp clear technique.
538 */
539 return false;
540 }
541 brw->state.dirty.brw |= BRW_NEW_SURFACES;
542 }
543 }
544
545 const char *clear_type;
546 if (is_fast_clear)
547 clear_type = "fast";
548 else if (params.wm_prog_key.use_simd16_replicated_data)
549 clear_type = "replicated";
550 else
551 clear_type = "slow";
552
553 DBG("%s (%s) to mt %p level %d layer %d\n", __FUNCTION__, clear_type,
554 irb->mt, irb->mt_level, irb->mt_layer);
555
556 brw_blorp_exec(brw, &params);
557
558 if (is_fast_clear) {
559 /* Now that the fast clear has occurred, put the buffer in
560 * INTEL_FAST_CLEAR_STATE_CLEAR so that we won't waste time doing
561 * redundant clears.
562 */
563 irb->mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR;
564 }
565
566 return true;
567 }
568
569
570 extern "C" {
571 bool
572 brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb,
573 GLbitfield mask, bool partial_clear)
574 {
575 for (unsigned buf = 0; buf < fb->_NumColorDrawBuffers; buf++) {
576 struct gl_renderbuffer *rb = fb->_ColorDrawBuffers[buf];
577 struct intel_renderbuffer *irb = intel_renderbuffer(rb);
578
579 /* Only clear the buffers present in the provided mask */
580 if (((1 << fb->_ColorDrawBufferIndexes[buf]) & mask) == 0)
581 continue;
582
583 /* If this is an ES2 context or GL_ARB_ES2_compatibility is supported,
584 * the framebuffer can be complete with some attachments missing. In
585 * this case the _ColorDrawBuffers pointer will be NULL.
586 */
587 if (rb == NULL)
588 continue;
589
590 if (fb->MaxNumLayers > 0) {
591 unsigned layer_multiplier =
592 (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_UMS ||
593 irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) ?
594 irb->mt->num_samples : 1;
595 unsigned num_layers = irb->layer_count;
596 for (unsigned layer = 0; layer < num_layers; layer++) {
597 if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear,
598 irb->mt_layer + layer * layer_multiplier)) {
599 return false;
600 }
601 }
602 } else {
603 unsigned layer = irb->mt_layer;
604 if (!do_single_blorp_clear(brw, fb, rb, buf, partial_clear, layer))
605 return false;
606 }
607
608 irb->need_downsample = true;
609 }
610
611 return true;
612 }
613
614 void
615 brw_blorp_resolve_color(struct brw_context *brw, struct intel_mipmap_tree *mt)
616 {
617 DBG("%s to mt %p\n", __FUNCTION__, mt);
618
619 brw_blorp_rt_resolve_params params(brw, mt);
620 brw_blorp_exec(brw, &params);
621 mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
622 }
623
624 } /* extern "C" */