src/mesa/drivers/dri/i965/brw_bufmgr.h

   1 /*
   2  * Copyright © 2008-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 /**
  29  * @file brw_bufmgr.h
  30  *
  31  * Public definitions of Intel-specific bufmgr functions.
  32  */
  33
  34 #ifndef INTEL_BUFMGR_H
  35 #define INTEL_BUFMGR_H
  36
  37 #include <stdbool.h>
  38 #include <stdint.h>
  39 #include <stdio.h>
  40 #include "util/u_atomic.h"
  41 #include "util/list.h"
  42
  43 #if defined(__cplusplus)
  44 extern "C" {
  45 #endif
  46
  47 struct gen_device_info;
  48 struct brw_context;
  49
  50 struct brw_bo {
  51    /**
  52     * Size in bytes of the buffer object.
  53     *
  54     * The size may be larger than the size originally requested for the
  55     * allocation, such as being aligned to page size.
  56     */
  57    uint64_t size;
  58
  59    /**
  60     * Alignment requirement for object
  61     *
  62     * Used for GTT mapping & pinning the object.
  63     */
  64    uint64_t align;
  65
  66    /** Buffer manager context associated with this buffer object */
  67    struct brw_bufmgr *bufmgr;
  68
  69    /** The GEM handle for this buffer object. */
  70    uint32_t gem_handle;
  71
  72    /**
  73     * Last seen card virtual address (offset from the beginning of the
  74     * aperture) for the object.  This should be used to fill relocation
  75     * entries when calling brw_bo_emit_reloc()
  76     */
  77    uint64_t offset64;
  78
  79    /**
  80     * Boolean of whether the GPU is definitely not accessing the buffer.
  81     *
  82     * This is only valid when reusable, since non-reusable
  83     * buffers are those that have been shared with other
  84     * processes, so we don't know their state.
  85     */
  86    bool idle;
  87
  88    int refcount;
  89    const char *name;
  90
  91 #ifndef EXEC_OBJECT_CAPTURE
  92 #define EXEC_OBJECT_CAPTURE            (1<<7)
  93 #endif
  94    uint64_t kflags;
  95
  96    /**
  97     * Kenel-assigned global name for this object
  98     *
  99     * List contains both flink named and prime fd'd objects
 100     */
 101    unsigned int global_name;
 102
 103    /**
 104     * Current tiling mode
 105     */
 106    uint32_t tiling_mode;
 107    uint32_t swizzle_mode;
 108    uint32_t stride;
 109
 110    time_t free_time;
 111
 112    /** Mapped address for the buffer, saved across map/unmap cycles */
 113    void *map_cpu;
 114    /** GTT virtual address for the buffer, saved across map/unmap cycles */
 115    void *map_gtt;
 116    /** WC CPU address for the buffer, saved across map/unmap cycles */
 117    void *map_wc;
 118
 119    /** BO cache list */
 120    struct list_head head;
 121
 122    /**
 123     * Boolean of whether this buffer can be re-used
 124     */
 125    bool reusable;
 126
 127    /**
 128     * Boolean of whether this buffer has been shared with an external client.
 129     */
 130    bool external;
 131
 132    /**
 133     * Boolean of whether this buffer is cache coherent
 134     */
 135    bool cache_coherent;
 136 };
 137
 138 #define BO_ALLOC_FOR_RENDER (1<<0)
 139 #define BO_ALLOC_ZEROED     (1<<1)
 140
 141 /**
 142  * Allocate a buffer object.
 143  *
 144  * Buffer objects are not necessarily initially mapped into CPU virtual
 145  * address space or graphics device aperture.  They must be mapped
 146  * using brw_bo_map() to be used by the CPU.
 147  */
 148 struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
 149                             uint64_t size, uint64_t alignment);
 150
 151 /**
 152  * Allocate a tiled buffer object.
 153  *
 154  * Alignment for tiled objects is set automatically; the 'flags'
 155  * argument provides a hint about how the object will be used initially.
 156  *
 157  * Valid tiling formats are:
 158  *  I915_TILING_NONE
 159  *  I915_TILING_X
 160  *  I915_TILING_Y
 161  */
 162 struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
 163                                   const char *name,
 164                                   uint64_t size,
 165                                   uint32_t tiling_mode,
 166                                   uint32_t pitch,
 167                                   unsigned flags);
 168
 169 /**
 170  * Allocate a tiled buffer object.
 171  *
 172  * Alignment for tiled objects is set automatically; the 'flags'
 173  * argument provides a hint about how the object will be used initially.
 174  *
 175  * Valid tiling formats are:
 176  *  I915_TILING_NONE
 177  *  I915_TILING_X
 178  *  I915_TILING_Y
 179  *
 180  * Note the tiling format may be rejected; callers should check the
 181  * 'tiling_mode' field on return, as well as the pitch value, which
 182  * may have been rounded up to accommodate for tiling restrictions.
 183  */
 184 struct brw_bo *brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr,
 185                                      const char *name,
 186                                      int x, int y, int cpp,
 187                                      uint32_t tiling_mode,
 188                                      uint32_t *pitch,
 189                                      unsigned flags);
 190
 191 /** Takes a reference on a buffer object */
 192 static inline void
 193 brw_bo_reference(struct brw_bo *bo)
 194 {
 195    p_atomic_inc(&bo->refcount);
 196 }
 197
 198 /**
 199  * Releases a reference on a buffer object, freeing the data if
 200  * no references remain.
 201  */
 202 void brw_bo_unreference(struct brw_bo *bo);
 203
 204 /* Must match MapBufferRange interface (for convenience) */
 205 #define MAP_READ        GL_MAP_READ_BIT
 206 #define MAP_WRITE       GL_MAP_WRITE_BIT
 207 #define MAP_ASYNC       GL_MAP_UNSYNCHRONIZED_BIT
 208 #define MAP_PERSISTENT  GL_MAP_PERSISTENT_BIT
 209 #define MAP_COHERENT    GL_MAP_COHERENT_BIT
 210 /* internal */
 211 #define MAP_INTERNAL_MASK       (0xff << 24)
 212 #define MAP_RAW                 (0x01 << 24)
 213
 214 /**
 215  * Maps the buffer into userspace.
 216  *
 217  * This function will block waiting for any existing execution on the
 218  * buffer to complete, first.  The resulting mapping is returned.
 219  */
 220 MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
 221
 222 /**
 223  * Reduces the refcount on the userspace mapping of the buffer
 224  * object.
 225  */
 226 static inline int brw_bo_unmap(struct brw_bo *bo) { return 0; }
 227
 228 /** Write data into an object. */
 229 int brw_bo_subdata(struct brw_bo *bo, uint64_t offset,
 230                    uint64_t size, const void *data);
 231 /**
 232  * Waits for rendering to an object by the GPU to have completed.
 233  *
 234  * This is not required for any access to the BO by bo_map,
 235  * bo_subdata, etc.  It is merely a way for the driver to implement
 236  * glFinish.
 237  */
 238 void brw_bo_wait_rendering(struct brw_bo *bo);
 239
 240 /**
 241  * Tears down the buffer manager instance.
 242  */
 243 void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
 244
 245 /**
 246  * Get the current tiling (and resulting swizzling) mode for the bo.
 247  *
 248  * \param buf Buffer to get tiling mode for
 249  * \param tiling_mode returned tiling mode
 250  * \param swizzle_mode returned swizzling mode
 251  */
 252 int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
 253                       uint32_t *swizzle_mode);
 254
 255 /**
 256  * Create a visible name for a buffer which can be used by other apps
 257  *
 258  * \param buf Buffer to create a name for
 259  * \param name Returned name
 260  */
 261 int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
 262
 263 /**
 264  * Returns 1 if mapping the buffer for write could cause the process
 265  * to block, due to the object being active in the GPU.
 266  */
 267 int brw_bo_busy(struct brw_bo *bo);
 268
 269 /**
 270  * Specify the volatility of the buffer.
 271  * \param bo Buffer to create a name for
 272  * \param madv The purgeable status
 273  *
 274  * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
 275  * reclaimed under memory pressure. If you subsequently require the buffer,
 276  * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
 277  *
 278  * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
 279  * marked as I915_MADV_DONTNEED.
 280  */
 281 int brw_bo_madvise(struct brw_bo *bo, int madv);
 282
 283 /* drm_bacon_bufmgr_gem.c */
 284 struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo,
 285                                    int fd, int batch_size);
 286 struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
 287                                            const char *name,
 288                                            unsigned int handle);
 289 void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
 290
 291 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
 292
 293 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
 294 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 295
 296 int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
 297 struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
 298                                             int prime_fd);
 299
 300 int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
 301                  uint64_t *result);
 302
 303 /** @{ */
 304
 305 #if defined(__cplusplus)
 306 }
 307 #endif
 308 #endif /* INTEL_BUFMGR_H */