src/mesa/drivers/dri/i965/brw_bufmgr.h

   1 /*
   2  * Copyright © 2008-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 /**
  29  * @file brw_bufmgr.h
  30  *
  31  * Public definitions of Intel-specific bufmgr functions.
  32  */
  33
  34 #ifndef INTEL_BUFMGR_H
  35 #define INTEL_BUFMGR_H
  36
  37 #include <stdbool.h>
  38 #include <stdint.h>
  39 #include <stdio.h>
  40 #include "util/list.h"
  41
  42 #if defined(__cplusplus)
  43 extern "C" {
  44 #endif
  45
  46 struct gen_device_info;
  47 struct brw_context;
  48
  49 struct brw_bo {
  50    /**
  51     * Size in bytes of the buffer object.
  52     *
  53     * The size may be larger than the size originally requested for the
  54     * allocation, such as being aligned to page size.
  55     */
  56    uint64_t size;
  57
  58    /**
  59     * Alignment requirement for object
  60     *
  61     * Used for GTT mapping & pinning the object.
  62     */
  63    uint64_t align;
  64
  65    /** Buffer manager context associated with this buffer object */
  66    struct brw_bufmgr *bufmgr;
  67
  68    /** The GEM handle for this buffer object. */
  69    uint32_t gem_handle;
  70
  71    /**
  72     * Last seen card virtual address (offset from the beginning of the
  73     * aperture) for the object.  This should be used to fill relocation
  74     * entries when calling brw_bo_emit_reloc()
  75     */
  76    uint64_t offset64;
  77
  78    /**
  79     * Boolean of whether the GPU is definitely not accessing the buffer.
  80     *
  81     * This is only valid when reusable, since non-reusable
  82     * buffers are those that have been shared with other
  83     * processes, so we don't know their state.
  84     */
  85    bool idle;
  86
  87    int refcount;
  88    const char *name;
  89
  90 #ifndef EXEC_OBJECT_CAPTURE
  91 #define EXEC_OBJECT_CAPTURE            (1<<7)
  92 #endif
  93    uint64_t kflags;
  94
  95    /**
  96     * Kenel-assigned global name for this object
  97     *
  98     * List contains both flink named and prime fd'd objects
  99     */
 100    unsigned int global_name;
 101
 102    /**
 103     * Current tiling mode
 104     */
 105    uint32_t tiling_mode;
 106    uint32_t swizzle_mode;
 107    uint32_t stride;
 108
 109    time_t free_time;
 110
 111    /** Mapped address for the buffer, saved across map/unmap cycles */
 112    void *map_cpu;
 113    /** GTT virtual address for the buffer, saved across map/unmap cycles */
 114    void *map_gtt;
 115    /** WC CPU address for the buffer, saved across map/unmap cycles */
 116    void *map_wc;
 117    int map_count;
 118
 119    /** BO cache list */
 120    struct list_head head;
 121
 122    /**
 123     * Boolean of whether this buffer can be re-used
 124     */
 125    bool reusable;
 126
 127    /**
 128     * Boolean of whether this buffer is cache coherent
 129     */
 130    bool cache_coherent;
 131 };
 132
 133 #define BO_ALLOC_FOR_RENDER (1<<0)
 134
 135 /**
 136  * Allocate a buffer object.
 137  *
 138  * Buffer objects are not necessarily initially mapped into CPU virtual
 139  * address space or graphics device aperture.  They must be mapped
 140  * using brw_bo_map() to be used by the CPU.
 141  */
 142 struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
 143                             uint64_t size, uint64_t alignment);
 144
 145 /**
 146  * Allocate a tiled buffer object.
 147  *
 148  * Alignment for tiled objects is set automatically; the 'flags'
 149  * argument provides a hint about how the object will be used initially.
 150  *
 151  * Valid tiling formats are:
 152  *  I915_TILING_NONE
 153  *  I915_TILING_X
 154  *  I915_TILING_Y
 155  */
 156 struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
 157                                   const char *name,
 158                                   uint64_t size,
 159                                   uint32_t tiling_mode,
 160                                   uint32_t pitch,
 161                                   unsigned flags);
 162
 163 /**
 164  * Allocate a tiled buffer object.
 165  *
 166  * Alignment for tiled objects is set automatically; the 'flags'
 167  * argument provides a hint about how the object will be used initially.
 168  *
 169  * Valid tiling formats are:
 170  *  I915_TILING_NONE
 171  *  I915_TILING_X
 172  *  I915_TILING_Y
 173  *
 174  * Note the tiling format may be rejected; callers should check the
 175  * 'tiling_mode' field on return, as well as the pitch value, which
 176  * may have been rounded up to accommodate for tiling restrictions.
 177  */
 178 struct brw_bo *brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr,
 179                                      const char *name,
 180                                      int x, int y, int cpp,
 181                                      uint32_t tiling_mode,
 182                                      uint32_t *pitch,
 183                                      unsigned flags);
 184
 185 /** Takes a reference on a buffer object */
 186 void brw_bo_reference(struct brw_bo *bo);
 187
 188 /**
 189  * Releases a reference on a buffer object, freeing the data if
 190  * no references remain.
 191  */
 192 void brw_bo_unreference(struct brw_bo *bo);
 193
 194 /* Must match MapBufferRange interface (for convenience) */
 195 #define MAP_READ        GL_MAP_READ_BIT
 196 #define MAP_WRITE       GL_MAP_WRITE_BIT
 197 #define MAP_ASYNC       GL_MAP_UNSYNCHRONIZED_BIT
 198 #define MAP_PERSISTENT  GL_MAP_PERSISTENT_BIT
 199 #define MAP_COHERENT    GL_MAP_COHERENT_BIT
 200 /* internal */
 201 #define MAP_INTERNAL_MASK       (0xff << 24)
 202 #define MAP_RAW                 (0x01 << 24)
 203
 204 /**
 205  * Maps the buffer into userspace.
 206  *
 207  * This function will block waiting for any existing execution on the
 208  * buffer to complete, first.  The resulting mapping is returned.
 209  */
 210 MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
 211
 212 /**
 213  * Reduces the refcount on the userspace mapping of the buffer
 214  * object.
 215  */
 216 int brw_bo_unmap(struct brw_bo *bo);
 217
 218 /** Write data into an object. */
 219 int brw_bo_subdata(struct brw_bo *bo, uint64_t offset,
 220                    uint64_t size, const void *data);
 221 /** Read data from an object. */
 222 int brw_bo_get_subdata(struct brw_bo *bo, uint64_t offset,
 223                        uint64_t size, void *data);
 224 /**
 225  * Waits for rendering to an object by the GPU to have completed.
 226  *
 227  * This is not required for any access to the BO by bo_map,
 228  * bo_subdata, etc.  It is merely a way for the driver to implement
 229  * glFinish.
 230  */
 231 void brw_bo_wait_rendering(struct brw_context *brw, struct brw_bo *bo);
 232
 233 /**
 234  * Tears down the buffer manager instance.
 235  */
 236 void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
 237
 238 /**
 239  * Get the current tiling (and resulting swizzling) mode for the bo.
 240  *
 241  * \param buf Buffer to get tiling mode for
 242  * \param tiling_mode returned tiling mode
 243  * \param swizzle_mode returned swizzling mode
 244  */
 245 int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
 246                       uint32_t *swizzle_mode);
 247
 248 /**
 249  * Create a visible name for a buffer which can be used by other apps
 250  *
 251  * \param buf Buffer to create a name for
 252  * \param name Returned name
 253  */
 254 int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
 255
 256 /**
 257  * Returns 1 if mapping the buffer for write could cause the process
 258  * to block, due to the object being active in the GPU.
 259  */
 260 int brw_bo_busy(struct brw_bo *bo);
 261
 262 /**
 263  * Specify the volatility of the buffer.
 264  * \param bo Buffer to create a name for
 265  * \param madv The purgeable status
 266  *
 267  * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
 268  * reclaimed under memory pressure. If you subsequently require the buffer,
 269  * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
 270  *
 271  * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
 272  * marked as I915_MADV_DONTNEED.
 273  */
 274 int brw_bo_madvise(struct brw_bo *bo, int madv);
 275
 276 /* drm_bacon_bufmgr_gem.c */
 277 struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo,
 278                                    int fd, int batch_size);
 279 struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
 280                                            const char *name,
 281                                            unsigned int handle);
 282 void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
 283
 284 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
 285
 286 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
 287 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 288
 289 int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
 290 struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
 291                                             int prime_fd);
 292
 293 int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
 294                  uint64_t *result);
 295
 296 /** @{ */
 297
 298 #if defined(__cplusplus)
 299 }
 300 #endif
 301 #endif /* INTEL_BUFMGR_H */