src/mesa/drivers/dri/i965/brw_bufmgr.h

   1 /*
   2  * Copyright © 2008-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 /**
  29  * @file intel_bufmgr.h
  30  *
  31  * Public definitions of Intel-specific bufmgr functions.
  32  */
  33
  34 #ifndef INTEL_BUFMGR_H
  35 #define INTEL_BUFMGR_H
  36
  37 #include <stdio.h>
  38 #include <stdint.h>
  39 #include <stdio.h>
  40
  41 #if defined(__cplusplus)
  42 extern "C" {
  43 #endif
  44
  45 struct drm_clip_rect;
  46
  47 typedef struct _drm_intel_bufmgr drm_intel_bufmgr;
  48 typedef struct _drm_intel_context drm_intel_context;
  49 typedef struct _drm_intel_bo drm_intel_bo;
  50
  51 struct _drm_intel_bo {
  52         /**
  53          * Size in bytes of the buffer object.
  54          *
  55          * The size may be larger than the size originally requested for the
  56          * allocation, such as being aligned to page size.
  57          */
  58         unsigned long size;
  59
  60         /**
  61          * Alignment requirement for object
  62          *
  63          * Used for GTT mapping & pinning the object.
  64          */
  65         unsigned long align;
  66
  67         /**
  68          * Deprecated field containing (possibly the low 32-bits of) the last
  69          * seen virtual card address.  Use offset64 instead.
  70          */
  71         unsigned long offset;
  72
  73         /**
  74          * Virtual address for accessing the buffer data.  Only valid while
  75          * mapped.
  76          */
  77 #ifdef __cplusplus
  78         void *virt;
  79 #else
  80         void *virtual;
  81 #endif
  82
  83         /** Buffer manager context associated with this buffer object */
  84         drm_intel_bufmgr *bufmgr;
  85
  86         /**
  87          * MM-specific handle for accessing object
  88          */
  89         int handle;
  90
  91         /**
  92          * Last seen card virtual address (offset from the beginning of the
  93          * aperture) for the object.  This should be used to fill relocation
  94          * entries when calling drm_intel_bo_emit_reloc()
  95          */
  96         uint64_t offset64;
  97 };
  98
  99 enum aub_dump_bmp_format {
 100         AUB_DUMP_BMP_FORMAT_8BIT = 1,
 101         AUB_DUMP_BMP_FORMAT_ARGB_4444 = 4,
 102         AUB_DUMP_BMP_FORMAT_ARGB_0888 = 6,
 103         AUB_DUMP_BMP_FORMAT_ARGB_8888 = 7,
 104 };
 105
 106 typedef struct _drm_intel_aub_annotation {
 107         uint32_t type;
 108         uint32_t subtype;
 109         uint32_t ending_offset;
 110 } drm_intel_aub_annotation;
 111
 112 #define BO_ALLOC_FOR_RENDER (1<<0)
 113
 114 drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
 115                                  unsigned long size, unsigned int alignment);
 116 drm_intel_bo *drm_intel_bo_alloc_for_render(drm_intel_bufmgr *bufmgr,
 117                                             const char *name,
 118                                             unsigned long size,
 119                                             unsigned int alignment);
 120 drm_intel_bo *drm_intel_bo_alloc_userptr(drm_intel_bufmgr *bufmgr,
 121                                         const char *name,
 122                                         void *addr, uint32_t tiling_mode,
 123                                         uint32_t stride, unsigned long size,
 124                                         unsigned long flags);
 125 drm_intel_bo *drm_intel_bo_alloc_tiled(drm_intel_bufmgr *bufmgr,
 126                                        const char *name,
 127                                        int x, int y, int cpp,
 128                                        uint32_t *tiling_mode,
 129                                        unsigned long *pitch,
 130                                        unsigned long flags);
 131 void drm_intel_bo_reference(drm_intel_bo *bo);
 132 void drm_intel_bo_unreference(drm_intel_bo *bo);
 133 int drm_intel_bo_map(drm_intel_bo *bo, int write_enable);
 134 int drm_intel_bo_unmap(drm_intel_bo *bo);
 135
 136 int drm_intel_bo_subdata(drm_intel_bo *bo, unsigned long offset,
 137                          unsigned long size, const void *data);
 138 int drm_intel_bo_get_subdata(drm_intel_bo *bo, unsigned long offset,
 139                              unsigned long size, void *data);
 140 void drm_intel_bo_wait_rendering(drm_intel_bo *bo);
 141
 142 void drm_intel_bufmgr_set_debug(drm_intel_bufmgr *bufmgr, int enable_debug);
 143 void drm_intel_bufmgr_destroy(drm_intel_bufmgr *bufmgr);
 144 int drm_intel_bo_exec(drm_intel_bo *bo, int used,
 145                       struct drm_clip_rect *cliprects, int num_cliprects, int DR4);
 146 int drm_intel_bo_mrb_exec(drm_intel_bo *bo, int used,
 147                         struct drm_clip_rect *cliprects, int num_cliprects, int DR4,
 148                         unsigned int flags);
 149 int drm_intel_bufmgr_check_aperture_space(drm_intel_bo ** bo_array, int count);
 150
 151 int drm_intel_bo_emit_reloc(drm_intel_bo *bo, uint32_t offset,
 152                             drm_intel_bo *target_bo, uint32_t target_offset,
 153                             uint32_t read_domains, uint32_t write_domain);
 154 int drm_intel_bo_emit_reloc_fence(drm_intel_bo *bo, uint32_t offset,
 155                                   drm_intel_bo *target_bo,
 156                                   uint32_t target_offset,
 157                                   uint32_t read_domains, uint32_t write_domain);
 158 int drm_intel_bo_pin(drm_intel_bo *bo, uint32_t alignment);
 159 int drm_intel_bo_unpin(drm_intel_bo *bo);
 160 int drm_intel_bo_set_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
 161                             uint32_t stride);
 162 int drm_intel_bo_get_tiling(drm_intel_bo *bo, uint32_t * tiling_mode,
 163                             uint32_t * swizzle_mode);
 164 int drm_intel_bo_flink(drm_intel_bo *bo, uint32_t * name);
 165 int drm_intel_bo_busy(drm_intel_bo *bo);
 166 int drm_intel_bo_madvise(drm_intel_bo *bo, int madv);
 167 int drm_intel_bo_use_48b_address_range(drm_intel_bo *bo, uint32_t enable);
 168 int drm_intel_bo_set_softpin_offset(drm_intel_bo *bo, uint64_t offset);
 169
 170 int drm_intel_bo_disable_reuse(drm_intel_bo *bo);
 171 int drm_intel_bo_is_reusable(drm_intel_bo *bo);
 172 int drm_intel_bo_references(drm_intel_bo *bo, drm_intel_bo *target_bo);
 173
 174 /* drm_intel_bufmgr_gem.c */
 175 drm_intel_bufmgr *drm_intel_bufmgr_gem_init(int fd, int batch_size);
 176 drm_intel_bo *drm_intel_bo_gem_create_from_name(drm_intel_bufmgr *bufmgr,
 177                                                 const char *name,
 178                                                 unsigned int handle);
 179 void drm_intel_bufmgr_gem_enable_reuse(drm_intel_bufmgr *bufmgr);
 180 void drm_intel_bufmgr_gem_enable_fenced_relocs(drm_intel_bufmgr *bufmgr);
 181 void drm_intel_bufmgr_gem_set_vma_cache_size(drm_intel_bufmgr *bufmgr,
 182                                              int limit);
 183 int drm_intel_gem_bo_map_unsynchronized(drm_intel_bo *bo);
 184 int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo);
 185 int drm_intel_gem_bo_unmap_gtt(drm_intel_bo *bo);
 186
 187 #define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
 188 int drm_intel_bufmgr_gem_can_disable_implicit_sync(drm_intel_bufmgr *bufmgr);
 189 void drm_intel_gem_bo_disable_implicit_sync(drm_intel_bo *bo);
 190 void drm_intel_gem_bo_enable_implicit_sync(drm_intel_bo *bo);
 191
 192 void *drm_intel_gem_bo_map__cpu(drm_intel_bo *bo);
 193 void *drm_intel_gem_bo_map__gtt(drm_intel_bo *bo);
 194 void *drm_intel_gem_bo_map__wc(drm_intel_bo *bo);
 195
 196 int drm_intel_gem_bo_get_reloc_count(drm_intel_bo *bo);
 197 void drm_intel_gem_bo_clear_relocs(drm_intel_bo *bo, int start);
 198 void drm_intel_gem_bo_start_gtt_access(drm_intel_bo *bo, int write_enable);
 199
 200 void
 201 drm_intel_bufmgr_gem_set_aub_filename(drm_intel_bufmgr *bufmgr,
 202                                       const char *filename);
 203 void drm_intel_bufmgr_gem_set_aub_dump(drm_intel_bufmgr *bufmgr, int enable);
 204 void drm_intel_gem_bo_aub_dump_bmp(drm_intel_bo *bo,
 205                                    int x1, int y1, int width, int height,
 206                                    enum aub_dump_bmp_format format,
 207                                    int pitch, int offset);
 208 void
 209 drm_intel_bufmgr_gem_set_aub_annotations(drm_intel_bo *bo,
 210                                          drm_intel_aub_annotation *annotations,
 211                                          unsigned count);
 212
 213 int drm_intel_get_pipe_from_crtc_id(drm_intel_bufmgr *bufmgr, int crtc_id);
 214
 215 int drm_intel_get_aperture_sizes(int fd, size_t *mappable, size_t *total);
 216 int drm_intel_bufmgr_gem_get_devid(drm_intel_bufmgr *bufmgr);
 217 int drm_intel_gem_bo_wait(drm_intel_bo *bo, int64_t timeout_ns);
 218
 219 drm_intel_context *drm_intel_gem_context_create(drm_intel_bufmgr *bufmgr);
 220 int drm_intel_gem_context_get_id(drm_intel_context *ctx,
 221                                  uint32_t *ctx_id);
 222 void drm_intel_gem_context_destroy(drm_intel_context *ctx);
 223 int drm_intel_gem_bo_context_exec(drm_intel_bo *bo, drm_intel_context *ctx,
 224                                   int used, unsigned int flags);
 225 int drm_intel_gem_bo_fence_exec(drm_intel_bo *bo,
 226                                 drm_intel_context *ctx,
 227                                 int used,
 228                                 int in_fence,
 229                                 int *out_fence,
 230                                 unsigned int flags);
 231
 232 int drm_intel_bo_gem_export_to_prime(drm_intel_bo *bo, int *prime_fd);
 233 drm_intel_bo *drm_intel_bo_gem_create_from_prime(drm_intel_bufmgr *bufmgr,
 234                                                 int prime_fd, int size);
 235
 236 /* drm_intel_bufmgr_fake.c */
 237 drm_intel_bufmgr *drm_intel_bufmgr_fake_init(int fd,
 238                                              unsigned long low_offset,
 239                                              void *low_virtual,
 240                                              unsigned long size,
 241                                              volatile unsigned int
 242                                              *last_dispatch);
 243 void drm_intel_bufmgr_fake_set_last_dispatch(drm_intel_bufmgr *bufmgr,
 244                                              volatile unsigned int
 245                                              *last_dispatch);
 246 void drm_intel_bufmgr_fake_set_exec_callback(drm_intel_bufmgr *bufmgr,
 247                                              int (*exec) (drm_intel_bo *bo,
 248                                                           unsigned int used,
 249                                                           void *priv),
 250                                              void *priv);
 251 void drm_intel_bufmgr_fake_set_fence_callback(drm_intel_bufmgr *bufmgr,
 252                                               unsigned int (*emit) (void *priv),
 253                                               void (*wait) (unsigned int fence,
 254                                                             void *priv),
 255                                               void *priv);
 256 drm_intel_bo *drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr,
 257                                              const char *name,
 258                                              unsigned long offset,
 259                                              unsigned long size, void *virt);
 260 void drm_intel_bo_fake_disable_backing_store(drm_intel_bo *bo,
 261                                              void (*invalidate_cb) (drm_intel_bo
 262                                                                     * bo,
 263                                                                     void *ptr),
 264                                              void *ptr);
 265
 266 void drm_intel_bufmgr_fake_contended_lock_take(drm_intel_bufmgr *bufmgr);
 267 void drm_intel_bufmgr_fake_evict_all(drm_intel_bufmgr *bufmgr);
 268
 269 struct drm_intel_decode *drm_intel_decode_context_alloc(uint32_t devid);
 270 void drm_intel_decode_context_free(struct drm_intel_decode *ctx);
 271 void drm_intel_decode_set_batch_pointer(struct drm_intel_decode *ctx,
 272                                         void *data, uint32_t hw_offset,
 273                                         int count);
 274 void drm_intel_decode_set_dump_past_end(struct drm_intel_decode *ctx,
 275                                         int dump_past_end);
 276 void drm_intel_decode_set_head_tail(struct drm_intel_decode *ctx,
 277                                     uint32_t head, uint32_t tail);
 278 void drm_intel_decode_set_output_file(struct drm_intel_decode *ctx, FILE *out);
 279 void drm_intel_decode(struct drm_intel_decode *ctx);
 280
 281 int drm_intel_reg_read(drm_intel_bufmgr *bufmgr,
 282                        uint32_t offset,
 283                        uint64_t *result);
 284
 285 int drm_intel_get_reset_stats(drm_intel_context *ctx,
 286                               uint32_t *reset_count,
 287                               uint32_t *active,
 288                               uint32_t *pending);
 289
 290 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
 291 int drm_intel_get_eu_total(int fd, unsigned int *eu_total);
 292
 293 int drm_intel_get_pooled_eu(int fd);
 294 int drm_intel_get_min_eu_in_pool(int fd);
 295
 296 /** @{ Compatibility defines to keep old code building despite the symbol rename
 297  * from dri_* to drm_intel_*
 298  */
 299 #define dri_bo drm_intel_bo
 300 #define dri_bufmgr drm_intel_bufmgr
 301 #define dri_bo_alloc drm_intel_bo_alloc
 302 #define dri_bo_reference drm_intel_bo_reference
 303 #define dri_bo_unreference drm_intel_bo_unreference
 304 #define dri_bo_map drm_intel_bo_map
 305 #define dri_bo_unmap drm_intel_bo_unmap
 306 #define dri_bo_subdata drm_intel_bo_subdata
 307 #define dri_bo_get_subdata drm_intel_bo_get_subdata
 308 #define dri_bo_wait_rendering drm_intel_bo_wait_rendering
 309 #define dri_bufmgr_set_debug drm_intel_bufmgr_set_debug
 310 #define dri_bufmgr_destroy drm_intel_bufmgr_destroy
 311 #define dri_bo_exec drm_intel_bo_exec
 312 #define dri_bufmgr_check_aperture_space drm_intel_bufmgr_check_aperture_space
 313 #define dri_bo_emit_reloc(reloc_bo, read, write, target_offset,         \
 314                           reloc_offset, target_bo)                      \
 315         drm_intel_bo_emit_reloc(reloc_bo, reloc_offset,                 \
 316                                 target_bo, target_offset,               \
 317                                 read, write);
 318 #define dri_bo_pin drm_intel_bo_pin
 319 #define dri_bo_unpin drm_intel_bo_unpin
 320 #define dri_bo_get_tiling drm_intel_bo_get_tiling
 321 #define dri_bo_set_tiling(bo, mode) drm_intel_bo_set_tiling(bo, mode, 0)
 322 #define dri_bo_flink drm_intel_bo_flink
 323 #define intel_bufmgr_gem_init drm_intel_bufmgr_gem_init
 324 #define intel_bo_gem_create_from_name drm_intel_bo_gem_create_from_name
 325 #define intel_bufmgr_gem_enable_reuse drm_intel_bufmgr_gem_enable_reuse
 326 #define intel_bufmgr_fake_init drm_intel_bufmgr_fake_init
 327 #define intel_bufmgr_fake_set_last_dispatch drm_intel_bufmgr_fake_set_last_dispatch
 328 #define intel_bufmgr_fake_set_exec_callback drm_intel_bufmgr_fake_set_exec_callback
 329 #define intel_bufmgr_fake_set_fence_callback drm_intel_bufmgr_fake_set_fence_callback
 330 #define intel_bo_fake_alloc_static drm_intel_bo_fake_alloc_static
 331 #define intel_bo_fake_disable_backing_store drm_intel_bo_fake_disable_backing_store
 332 #define intel_bufmgr_fake_contended_lock_take drm_intel_bufmgr_fake_contended_lock_take
 333 #define intel_bufmgr_fake_evict_all drm_intel_bufmgr_fake_evict_all
 334
 335 /** @{ */
 336
 337 #if defined(__cplusplus)
 338 }
 339 #endif
 340
 341 #endif /* INTEL_BUFMGR_H */