2 * Copyright © 2008-2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
31 * Public definitions of Intel-specific bufmgr functions.
34 #ifndef INTEL_BUFMGR_H
35 #define INTEL_BUFMGR_H
41 #if defined(__cplusplus)
47 typedef struct _drm_bacon_bufmgr drm_bacon_bufmgr
;
48 typedef struct _drm_bacon_context drm_bacon_context
;
49 typedef struct _drm_bacon_bo drm_bacon_bo
;
51 struct _drm_bacon_bo
{
53 * Size in bytes of the buffer object.
55 * The size may be larger than the size originally requested for the
56 * allocation, such as being aligned to page size.
61 * Alignment requirement for object
63 * Used for GTT mapping & pinning the object.
68 * Deprecated field containing (possibly the low 32-bits of) the last
69 * seen virtual card address. Use offset64 instead.
74 * Virtual address for accessing the buffer data. Only valid while
83 /** Buffer manager context associated with this buffer object */
84 drm_bacon_bufmgr
*bufmgr
;
87 * MM-specific handle for accessing object
92 * Last seen card virtual address (offset from the beginning of the
93 * aperture) for the object. This should be used to fill relocation
94 * entries when calling drm_bacon_bo_emit_reloc()
99 #define BO_ALLOC_FOR_RENDER (1<<0)
102 * Allocate a buffer object.
104 * Buffer objects are not necessarily initially mapped into CPU virtual
105 * address space or graphics device aperture. They must be mapped
106 * using bo_map() or drm_bacon_gem_bo_map_gtt() to be used by the CPU.
108 drm_bacon_bo
*drm_bacon_bo_alloc(drm_bacon_bufmgr
*bufmgr
, const char *name
,
109 unsigned long size
, unsigned int alignment
);
111 * Allocate a buffer object, hinting that it will be used as a
114 * This is otherwise the same as bo_alloc.
116 drm_bacon_bo
*drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr
*bufmgr
,
119 unsigned int alignment
);
121 bool drm_bacon_has_userptr(drm_bacon_bufmgr
*bufmgr
);
124 * Allocate a buffer object from an existing user accessible
125 * address malloc'd with the provided size.
126 * Alignment is used when mapping to the gtt.
127 * Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED
129 drm_bacon_bo
*drm_bacon_bo_alloc_userptr(drm_bacon_bufmgr
*bufmgr
,
131 void *addr
, uint32_t tiling_mode
,
132 uint32_t stride
, unsigned long size
,
133 unsigned long flags
);
135 * Allocate a tiled buffer object.
137 * Alignment for tiled objects is set automatically; the 'flags'
138 * argument provides a hint about how the object will be used initially.
140 * Valid tiling formats are:
145 * Note the tiling format may be rejected; callers should check the
146 * 'tiling_mode' field on return, as well as the pitch value, which
147 * may have been rounded up to accommodate for tiling restrictions.
149 drm_bacon_bo
*drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr
*bufmgr
,
151 int x
, int y
, int cpp
,
152 uint32_t *tiling_mode
,
153 unsigned long *pitch
,
154 unsigned long flags
);
156 /** Takes a reference on a buffer object */
157 void drm_bacon_bo_reference(drm_bacon_bo
*bo
);
160 * Releases a reference on a buffer object, freeing the data if
161 * no references remain.
163 void drm_bacon_bo_unreference(drm_bacon_bo
*bo
);
166 * Maps the buffer into userspace.
168 * This function will block waiting for any existing execution on the
169 * buffer to complete, first. The resulting mapping is available at
172 int drm_bacon_bo_map(drm_bacon_bo
*bo
, int write_enable
);
175 * Reduces the refcount on the userspace mapping of the buffer
178 int drm_bacon_bo_unmap(drm_bacon_bo
*bo
);
180 /** Write data into an object. */
181 int drm_bacon_bo_subdata(drm_bacon_bo
*bo
, unsigned long offset
,
182 unsigned long size
, const void *data
);
183 /** Read data from an object. */
184 int drm_bacon_bo_get_subdata(drm_bacon_bo
*bo
, unsigned long offset
,
185 unsigned long size
, void *data
);
187 * Waits for rendering to an object by the GPU to have completed.
189 * This is not required for any access to the BO by bo_map,
190 * bo_subdata, etc. It is merely a way for the driver to implement
193 void drm_bacon_bo_wait_rendering(drm_bacon_bo
*bo
);
196 * Tears down the buffer manager instance.
198 void drm_bacon_bufmgr_destroy(drm_bacon_bufmgr
*bufmgr
);
200 /** Executes the command buffer pointed to by bo. */
201 int drm_bacon_bo_exec(drm_bacon_bo
*bo
, int used
,
202 struct drm_clip_rect
*cliprects
, int num_cliprects
, int DR4
);
204 /** Executes the command buffer pointed to by bo on the selected ring buffer */
205 int drm_bacon_bo_mrb_exec(drm_bacon_bo
*bo
, int used
,
206 struct drm_clip_rect
*cliprects
, int num_cliprects
, int DR4
,
208 int drm_bacon_bufmgr_check_aperture_space(drm_bacon_bo
** bo_array
, int count
);
211 * Add relocation entry in reloc_buf, which will be updated with the
212 * target buffer's real offset on on command submission.
214 * Relocations remain in place for the lifetime of the buffer object.
216 * \param bo Buffer to write the relocation into.
217 * \param offset Byte offset within reloc_bo of the pointer to
219 * \param target_bo Buffer whose offset should be written into the
221 * \param target_offset Constant value to be added to target_bo's
222 * offset in relocation entry.
223 * \param read_domains GEM read domains which the buffer will be
224 * read into by the command that this relocation
226 * \param write_domains GEM read domains which the buffer will be
227 * dirtied in by the command that this
228 * relocation is part of.
230 int drm_bacon_bo_emit_reloc(drm_bacon_bo
*bo
, uint32_t offset
,
231 drm_bacon_bo
*target_bo
, uint32_t target_offset
,
232 uint32_t read_domains
, uint32_t write_domain
);
235 * Ask that the buffer be placed in tiling mode
237 * \param buf Buffer to set tiling mode for
238 * \param tiling_mode desired, and returned tiling mode
240 int drm_bacon_bo_set_tiling(drm_bacon_bo
*bo
, uint32_t * tiling_mode
,
243 * Get the current tiling (and resulting swizzling) mode for the bo.
245 * \param buf Buffer to get tiling mode for
246 * \param tiling_mode returned tiling mode
247 * \param swizzle_mode returned swizzling mode
249 int drm_bacon_bo_get_tiling(drm_bacon_bo
*bo
, uint32_t * tiling_mode
,
250 uint32_t * swizzle_mode
);
253 * Create a visible name for a buffer which can be used by other apps
255 * \param buf Buffer to create a name for
256 * \param name Returned name
258 int drm_bacon_bo_flink(drm_bacon_bo
*bo
, uint32_t * name
);
261 * Returns 1 if mapping the buffer for write could cause the process
262 * to block, due to the object being active in the GPU.
264 int drm_bacon_bo_busy(drm_bacon_bo
*bo
);
267 * Specify the volatility of the buffer.
268 * \param bo Buffer to create a name for
269 * \param madv The purgeable status
271 * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
272 * reclaimed under memory pressure. If you subsequently require the buffer,
273 * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
275 * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
276 * marked as I915_MADV_DONTNEED.
278 int drm_bacon_bo_madvise(drm_bacon_bo
*bo
, int madv
);
281 * Set the offset at which this buffer will be softpinned
282 * \param bo Buffer to set the softpin offset for
283 * \param offset Softpin offset
285 int drm_bacon_bo_set_softpin_offset(drm_bacon_bo
*bo
, uint64_t offset
);
288 * Disable buffer reuse for buffers which will be shared in some way,
289 * as with scanout buffers. When the buffer reference count goes to
290 * zero, it will be freed and not placed in the reuse list.
292 * \param bo Buffer to disable reuse for
294 int drm_bacon_bo_disable_reuse(drm_bacon_bo
*bo
);
297 * Query whether a buffer is reusable.
299 * \param bo Buffer to query
301 int drm_bacon_bo_is_reusable(drm_bacon_bo
*bo
);
303 /** Returns true if target_bo is in the relocation tree rooted at bo. */
304 int drm_bacon_bo_references(drm_bacon_bo
*bo
, drm_bacon_bo
*target_bo
);
306 /* drm_bacon_bufmgr_gem.c */
307 drm_bacon_bufmgr
*drm_bacon_bufmgr_gem_init(int fd
, int batch_size
);
308 drm_bacon_bo
*drm_bacon_bo_gem_create_from_name(drm_bacon_bufmgr
*bufmgr
,
310 unsigned int handle
);
311 void drm_bacon_bufmgr_gem_enable_reuse(drm_bacon_bufmgr
*bufmgr
);
312 void drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr
*bufmgr
,
314 int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo
*bo
);
315 int drm_bacon_gem_bo_map_gtt(drm_bacon_bo
*bo
);
317 #define HAVE_DRM_INTEL_GEM_BO_DISABLE_IMPLICIT_SYNC 1
318 int drm_bacon_bufmgr_gem_can_disable_implicit_sync(drm_bacon_bufmgr
*bufmgr
);
319 void drm_bacon_gem_bo_disable_implicit_sync(drm_bacon_bo
*bo
);
320 void drm_bacon_gem_bo_enable_implicit_sync(drm_bacon_bo
*bo
);
322 void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo
*bo
);
323 void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo
*bo
);
324 void *drm_bacon_gem_bo_map__wc(drm_bacon_bo
*bo
);
326 int drm_bacon_gem_bo_get_reloc_count(drm_bacon_bo
*bo
);
327 void drm_bacon_gem_bo_clear_relocs(drm_bacon_bo
*bo
, int start
);
328 void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo
*bo
, int write_enable
);
330 int drm_bacon_bufmgr_gem_get_devid(drm_bacon_bufmgr
*bufmgr
);
331 int drm_bacon_gem_bo_wait(drm_bacon_bo
*bo
, int64_t timeout_ns
);
333 drm_bacon_context
*drm_bacon_gem_context_create(drm_bacon_bufmgr
*bufmgr
);
334 int drm_bacon_gem_context_get_id(drm_bacon_context
*ctx
,
336 void drm_bacon_gem_context_destroy(drm_bacon_context
*ctx
);
337 int drm_bacon_gem_bo_context_exec(drm_bacon_bo
*bo
, drm_bacon_context
*ctx
,
338 int used
, unsigned int flags
);
339 int drm_bacon_gem_bo_fence_exec(drm_bacon_bo
*bo
,
340 drm_bacon_context
*ctx
,
346 int drm_bacon_bo_gem_export_to_prime(drm_bacon_bo
*bo
, int *prime_fd
);
347 drm_bacon_bo
*drm_bacon_bo_gem_create_from_prime(drm_bacon_bufmgr
*bufmgr
,
348 int prime_fd
, int size
);
350 int drm_bacon_reg_read(drm_bacon_bufmgr
*bufmgr
,
354 int drm_bacon_get_reset_stats(drm_bacon_context
*ctx
,
355 uint32_t *reset_count
,
361 #if defined(__cplusplus)
365 #endif /* INTEL_BUFMGR_H */