src/mesa/drivers/dri/i965/brw_bufmgr.h

   1 /*
   2  * Copyright © 2008-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 /**
  29  * @file brw_bufmgr.h
  30  *
  31  * Public definitions of Intel-specific bufmgr functions.
  32  */
  33
  34 #ifndef INTEL_BUFMGR_H
  35 #define INTEL_BUFMGR_H
  36
  37 #include <stdbool.h>
  38 #include <stdint.h>
  39 #include <stdio.h>
  40 #include "util/u_atomic.h"
  41 #include "util/list.h"
  42
  43 #if defined(__cplusplus)
  44 extern "C" {
  45 #endif
  46
  47 struct gen_device_info;
  48 struct brw_context;
  49
  50 struct brw_bo {
  51    /**
  52     * Size in bytes of the buffer object.
  53     *
  54     * The size may be larger than the size originally requested for the
  55     * allocation, such as being aligned to page size.
  56     */
  57    uint64_t size;
  58
  59    /**
  60     * Alignment requirement for object
  61     *
  62     * Used for GTT mapping & pinning the object.
  63     */
  64    uint64_t align;
  65
  66    /** Buffer manager context associated with this buffer object */
  67    struct brw_bufmgr *bufmgr;
  68
  69    /** The GEM handle for this buffer object. */
  70    uint32_t gem_handle;
  71
  72    /**
  73     * Last seen card virtual address (offset from the beginning of the
  74     * aperture) for the object.  This should be used to fill relocation
  75     * entries when calling brw_bo_emit_reloc()
  76     */
  77    uint64_t offset64;
  78
  79    /**
  80     * The validation list index for this buffer, or -1 when not in a batch.
  81     * Note that a single buffer may be in multiple batches (contexts), and
  82     * this is a global field, which refers to the last batch using the BO.
  83     * It should not be considered authoritative, but can be used to avoid a
  84     * linear walk of the validation list in the common case by guessing that
  85     * exec_bos[bo->index] == bo and confirming whether that's the case.
  86     */
  87    unsigned index;
  88
  89    /**
  90     * Boolean of whether the GPU is definitely not accessing the buffer.
  91     *
  92     * This is only valid when reusable, since non-reusable
  93     * buffers are those that have been shared with other
  94     * processes, so we don't know their state.
  95     */
  96    bool idle;
  97
  98    int refcount;
  99    const char *name;
 100
 101 #ifndef EXEC_OBJECT_CAPTURE
 102 #define EXEC_OBJECT_CAPTURE            (1<<7)
 103 #endif
 104    uint64_t kflags;
 105
 106    /**
 107     * Kenel-assigned global name for this object
 108     *
 109     * List contains both flink named and prime fd'd objects
 110     */
 111    unsigned int global_name;
 112
 113    /**
 114     * Current tiling mode
 115     */
 116    uint32_t tiling_mode;
 117    uint32_t swizzle_mode;
 118    uint32_t stride;
 119
 120    time_t free_time;
 121
 122    /** Mapped address for the buffer, saved across map/unmap cycles */
 123    void *map_cpu;
 124    /** GTT virtual address for the buffer, saved across map/unmap cycles */
 125    void *map_gtt;
 126    /** WC CPU address for the buffer, saved across map/unmap cycles */
 127    void *map_wc;
 128
 129    /** BO cache list */
 130    struct list_head head;
 131
 132    /**
 133     * Boolean of whether this buffer can be re-used
 134     */
 135    bool reusable;
 136
 137    /**
 138     * Boolean of whether this buffer has been shared with an external client.
 139     */
 140    bool external;
 141
 142    /**
 143     * Boolean of whether this buffer is cache coherent
 144     */
 145    bool cache_coherent;
 146 };
 147
 148 #define BO_ALLOC_BUSY       (1<<0)
 149 #define BO_ALLOC_ZEROED     (1<<1)
 150
 151 /**
 152  * Allocate a buffer object.
 153  *
 154  * Buffer objects are not necessarily initially mapped into CPU virtual
 155  * address space or graphics device aperture.  They must be mapped
 156  * using brw_bo_map() to be used by the CPU.
 157  */
 158 struct brw_bo *brw_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
 159                             uint64_t size, uint64_t alignment);
 160
 161 /**
 162  * Allocate a tiled buffer object.
 163  *
 164  * Alignment for tiled objects is set automatically; the 'flags'
 165  * argument provides a hint about how the object will be used initially.
 166  *
 167  * Valid tiling formats are:
 168  *  I915_TILING_NONE
 169  *  I915_TILING_X
 170  *  I915_TILING_Y
 171  */
 172 struct brw_bo *brw_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
 173                                   const char *name,
 174                                   uint64_t size,
 175                                   uint32_t tiling_mode,
 176                                   uint32_t pitch,
 177                                   unsigned flags);
 178
 179 /**
 180  * Allocate a tiled buffer object.
 181  *
 182  * Alignment for tiled objects is set automatically; the 'flags'
 183  * argument provides a hint about how the object will be used initially.
 184  *
 185  * Valid tiling formats are:
 186  *  I915_TILING_NONE
 187  *  I915_TILING_X
 188  *  I915_TILING_Y
 189  *
 190  * Note the tiling format may be rejected; callers should check the
 191  * 'tiling_mode' field on return, as well as the pitch value, which
 192  * may have been rounded up to accommodate for tiling restrictions.
 193  */
 194 struct brw_bo *brw_bo_alloc_tiled_2d(struct brw_bufmgr *bufmgr,
 195                                      const char *name,
 196                                      int x, int y, int cpp,
 197                                      uint32_t tiling_mode,
 198                                      uint32_t *pitch,
 199                                      unsigned flags);
 200
 201 /** Takes a reference on a buffer object */
 202 static inline void
 203 brw_bo_reference(struct brw_bo *bo)
 204 {
 205    p_atomic_inc(&bo->refcount);
 206 }
 207
 208 /**
 209  * Releases a reference on a buffer object, freeing the data if
 210  * no references remain.
 211  */
 212 void brw_bo_unreference(struct brw_bo *bo);
 213
 214 /* Must match MapBufferRange interface (for convenience) */
 215 #define MAP_READ        GL_MAP_READ_BIT
 216 #define MAP_WRITE       GL_MAP_WRITE_BIT
 217 #define MAP_ASYNC       GL_MAP_UNSYNCHRONIZED_BIT
 218 #define MAP_PERSISTENT  GL_MAP_PERSISTENT_BIT
 219 #define MAP_COHERENT    GL_MAP_COHERENT_BIT
 220 /* internal */
 221 #define MAP_INTERNAL_MASK       (0xff << 24)
 222 #define MAP_RAW                 (0x01 << 24)
 223
 224 /**
 225  * Maps the buffer into userspace.
 226  *
 227  * This function will block waiting for any existing execution on the
 228  * buffer to complete, first.  The resulting mapping is returned.
 229  */
 230 MUST_CHECK void *brw_bo_map(struct brw_context *brw, struct brw_bo *bo, unsigned flags);
 231
 232 /**
 233  * Reduces the refcount on the userspace mapping of the buffer
 234  * object.
 235  */
 236 static inline int brw_bo_unmap(struct brw_bo *bo) { return 0; }
 237
 238 /** Write data into an object. */
 239 int brw_bo_subdata(struct brw_bo *bo, uint64_t offset,
 240                    uint64_t size, const void *data);
 241 /**
 242  * Waits for rendering to an object by the GPU to have completed.
 243  *
 244  * This is not required for any access to the BO by bo_map,
 245  * bo_subdata, etc.  It is merely a way for the driver to implement
 246  * glFinish.
 247  */
 248 void brw_bo_wait_rendering(struct brw_bo *bo);
 249
 250 /**
 251  * Tears down the buffer manager instance.
 252  */
 253 void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
 254
 255 /**
 256  * Get the current tiling (and resulting swizzling) mode for the bo.
 257  *
 258  * \param buf Buffer to get tiling mode for
 259  * \param tiling_mode returned tiling mode
 260  * \param swizzle_mode returned swizzling mode
 261  */
 262 int brw_bo_get_tiling(struct brw_bo *bo, uint32_t *tiling_mode,
 263                       uint32_t *swizzle_mode);
 264
 265 /**
 266  * Create a visible name for a buffer which can be used by other apps
 267  *
 268  * \param buf Buffer to create a name for
 269  * \param name Returned name
 270  */
 271 int brw_bo_flink(struct brw_bo *bo, uint32_t *name);
 272
 273 /**
 274  * Returns 1 if mapping the buffer for write could cause the process
 275  * to block, due to the object being active in the GPU.
 276  */
 277 int brw_bo_busy(struct brw_bo *bo);
 278
 279 /**
 280  * Specify the volatility of the buffer.
 281  * \param bo Buffer to create a name for
 282  * \param madv The purgeable status
 283  *
 284  * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
 285  * reclaimed under memory pressure. If you subsequently require the buffer,
 286  * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
 287  *
 288  * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
 289  * marked as I915_MADV_DONTNEED.
 290  */
 291 int brw_bo_madvise(struct brw_bo *bo, int madv);
 292
 293 /* drm_bacon_bufmgr_gem.c */
 294 struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo,
 295                                    int fd, int batch_size);
 296 struct brw_bo *brw_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
 297                                            const char *name,
 298                                            unsigned int handle);
 299 void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
 300
 301 int brw_bo_wait(struct brw_bo *bo, int64_t timeout_ns);
 302
 303 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
 304 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 305
 306 int brw_bo_gem_export_to_prime(struct brw_bo *bo, int *prime_fd);
 307 struct brw_bo *brw_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
 308                                             int prime_fd);
 309
 310 int brw_reg_read(struct brw_bufmgr *bufmgr, uint32_t offset,
 311                  uint64_t *result);
 312
 313 /** @{ */
 314
 315 #if defined(__cplusplus)
 316 }
 317 #endif
 318 #endif /* INTEL_BUFMGR_H */