2 * Copyright © 2008-2012 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
31 * Public definitions of Intel-specific bufmgr functions.
34 #ifndef INTEL_BUFMGR_H
35 #define INTEL_BUFMGR_H
40 #include "util/list.h"
42 #if defined(__cplusplus)
46 struct gen_device_info
;
48 typedef struct _drm_bacon_bufmgr drm_bacon_bufmgr
;
49 typedef struct _drm_bacon_context drm_bacon_context
;
50 typedef struct _drm_bacon_bo drm_bacon_bo
;
52 struct _drm_bacon_bo
{
54 * Size in bytes of the buffer object.
56 * The size may be larger than the size originally requested for the
57 * allocation, such as being aligned to page size.
62 * Alignment requirement for object
64 * Used for GTT mapping & pinning the object.
69 * Virtual address for accessing the buffer data. Only valid while
78 /** Buffer manager context associated with this buffer object */
79 drm_bacon_bufmgr
*bufmgr
;
81 /** The GEM handle for this buffer object. */
85 * Last seen card virtual address (offset from the beginning of the
86 * aperture) for the object. This should be used to fill relocation
87 * entries when calling drm_bacon_bo_emit_reloc()
92 * Boolean of whether the GPU is definitely not accessing the buffer.
94 * This is only valid when reusable, since non-reusable
95 * buffers are those that have been shared with other
96 * processes, so we don't know their state.
104 * Kenel-assigned global name for this object
106 * List contains both flink named and prime fd'd objects
108 unsigned int global_name
;
111 * Current tiling mode
113 uint32_t tiling_mode
;
114 uint32_t swizzle_mode
;
115 unsigned long stride
;
119 /** Mapped address for the buffer, saved across map/unmap cycles */
121 /** GTT virtual address for the buffer, saved across map/unmap cycles */
123 /** WC CPU address for the buffer, saved across map/unmap cycles */
126 struct list_head vma_list
;
129 struct list_head head
;
132 * Boolean of whether this buffer can be re-used
137 #define BO_ALLOC_FOR_RENDER (1<<0)
140 * Allocate a buffer object.
142 * Buffer objects are not necessarily initially mapped into CPU virtual
143 * address space or graphics device aperture. They must be mapped
144 * using bo_map() or drm_bacon_gem_bo_map_gtt() to be used by the CPU.
146 drm_bacon_bo
*drm_bacon_bo_alloc(drm_bacon_bufmgr
*bufmgr
, const char *name
,
147 unsigned long size
, unsigned int alignment
);
149 * Allocate a buffer object, hinting that it will be used as a
152 * This is otherwise the same as bo_alloc.
154 drm_bacon_bo
*drm_bacon_bo_alloc_for_render(drm_bacon_bufmgr
*bufmgr
,
157 unsigned int alignment
);
160 * Allocate a tiled buffer object.
162 * Alignment for tiled objects is set automatically; the 'flags'
163 * argument provides a hint about how the object will be used initially.
165 * Valid tiling formats are:
170 * Note the tiling format may be rejected; callers should check the
171 * 'tiling_mode' field on return, as well as the pitch value, which
172 * may have been rounded up to accommodate for tiling restrictions.
174 drm_bacon_bo
*drm_bacon_bo_alloc_tiled(drm_bacon_bufmgr
*bufmgr
,
176 int x
, int y
, int cpp
,
177 uint32_t *tiling_mode
,
178 unsigned long *pitch
,
179 unsigned long flags
);
181 /** Takes a reference on a buffer object */
182 void drm_bacon_bo_reference(drm_bacon_bo
*bo
);
185 * Releases a reference on a buffer object, freeing the data if
186 * no references remain.
188 void drm_bacon_bo_unreference(drm_bacon_bo
*bo
);
191 * Maps the buffer into userspace.
193 * This function will block waiting for any existing execution on the
194 * buffer to complete, first. The resulting mapping is available at
197 int drm_bacon_bo_map(drm_bacon_bo
*bo
, int write_enable
);
200 * Reduces the refcount on the userspace mapping of the buffer
203 int drm_bacon_bo_unmap(drm_bacon_bo
*bo
);
205 /** Write data into an object. */
206 int drm_bacon_bo_subdata(drm_bacon_bo
*bo
, unsigned long offset
,
207 unsigned long size
, const void *data
);
208 /** Read data from an object. */
209 int drm_bacon_bo_get_subdata(drm_bacon_bo
*bo
, unsigned long offset
,
210 unsigned long size
, void *data
);
212 * Waits for rendering to an object by the GPU to have completed.
214 * This is not required for any access to the BO by bo_map,
215 * bo_subdata, etc. It is merely a way for the driver to implement
218 void drm_bacon_bo_wait_rendering(drm_bacon_bo
*bo
);
221 * Tears down the buffer manager instance.
223 void drm_bacon_bufmgr_destroy(drm_bacon_bufmgr
*bufmgr
);
226 * Ask that the buffer be placed in tiling mode
228 * \param buf Buffer to set tiling mode for
229 * \param tiling_mode desired, and returned tiling mode
231 int drm_bacon_bo_set_tiling(drm_bacon_bo
*bo
, uint32_t * tiling_mode
,
234 * Get the current tiling (and resulting swizzling) mode for the bo.
236 * \param buf Buffer to get tiling mode for
237 * \param tiling_mode returned tiling mode
238 * \param swizzle_mode returned swizzling mode
240 int drm_bacon_bo_get_tiling(drm_bacon_bo
*bo
, uint32_t * tiling_mode
,
241 uint32_t * swizzle_mode
);
244 * Create a visible name for a buffer which can be used by other apps
246 * \param buf Buffer to create a name for
247 * \param name Returned name
249 int drm_bacon_bo_flink(drm_bacon_bo
*bo
, uint32_t * name
);
252 * Returns 1 if mapping the buffer for write could cause the process
253 * to block, due to the object being active in the GPU.
255 int drm_bacon_bo_busy(drm_bacon_bo
*bo
);
258 * Specify the volatility of the buffer.
259 * \param bo Buffer to create a name for
260 * \param madv The purgeable status
262 * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
263 * reclaimed under memory pressure. If you subsequently require the buffer,
264 * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
266 * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
267 * marked as I915_MADV_DONTNEED.
269 int drm_bacon_bo_madvise(drm_bacon_bo
*bo
, int madv
);
272 * Disable buffer reuse for buffers which will be shared in some way,
273 * as with scanout buffers. When the buffer reference count goes to
274 * zero, it will be freed and not placed in the reuse list.
276 * \param bo Buffer to disable reuse for
278 int drm_bacon_bo_disable_reuse(drm_bacon_bo
*bo
);
281 * Query whether a buffer is reusable.
283 * \param bo Buffer to query
285 int drm_bacon_bo_is_reusable(drm_bacon_bo
*bo
);
287 /* drm_bacon_bufmgr_gem.c */
288 drm_bacon_bufmgr
*drm_bacon_bufmgr_gem_init(struct gen_device_info
*devinfo
,
289 int fd
, int batch_size
);
290 drm_bacon_bo
*drm_bacon_bo_gem_create_from_name(drm_bacon_bufmgr
*bufmgr
,
292 unsigned int handle
);
293 void drm_bacon_bufmgr_gem_enable_reuse(drm_bacon_bufmgr
*bufmgr
);
294 void drm_bacon_bufmgr_gem_set_vma_cache_size(drm_bacon_bufmgr
*bufmgr
,
296 int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo
*bo
);
297 int drm_bacon_gem_bo_map_gtt(drm_bacon_bo
*bo
);
299 void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo
*bo
);
300 void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo
*bo
);
301 void *drm_bacon_gem_bo_map__wc(drm_bacon_bo
*bo
);
303 void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo
*bo
, int write_enable
);
305 int drm_bacon_gem_bo_wait(drm_bacon_bo
*bo
, int64_t timeout_ns
);
307 drm_bacon_context
*drm_bacon_gem_context_create(drm_bacon_bufmgr
*bufmgr
);
308 int drm_bacon_gem_context_get_id(drm_bacon_context
*ctx
,
310 void drm_bacon_gem_context_destroy(drm_bacon_context
*ctx
);
312 int drm_bacon_bo_gem_export_to_prime(drm_bacon_bo
*bo
, int *prime_fd
);
313 drm_bacon_bo
*drm_bacon_bo_gem_create_from_prime(drm_bacon_bufmgr
*bufmgr
,
314 int prime_fd
, int size
);
316 int drm_bacon_reg_read(drm_bacon_bufmgr
*bufmgr
,
322 #if defined(__cplusplus)
326 #endif /* INTEL_BUFMGR_H */