src/mesa/drivers/dri/i965/brw_bufmgr.h

   1 /*
   2  * Copyright © 2008-2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 /**
  29  * @file brw_bufmgr.h
  30  *
  31  * Public definitions of Intel-specific bufmgr functions.
  32  */
  33
  34 #ifndef INTEL_BUFMGR_H
  35 #define INTEL_BUFMGR_H
  36
  37 #include <stdbool.h>
  38 #include <stdint.h>
  39 #include <stdio.h>
  40 #include "util/list.h"
  41
  42 #if defined(__cplusplus)
  43 extern "C" {
  44 #endif
  45
  46 struct gen_device_info;
  47
  48 typedef struct _drm_bacon_bo drm_bacon_bo;
  49
  50 struct _drm_bacon_bo {
  51         /**
  52          * Size in bytes of the buffer object.
  53          *
  54          * The size may be larger than the size originally requested for the
  55          * allocation, such as being aligned to page size.
  56          */
  57         unsigned long size;
  58
  59         /**
  60          * Alignment requirement for object
  61          *
  62          * Used for GTT mapping & pinning the object.
  63          */
  64         unsigned long align;
  65
  66         /**
  67          * Virtual address for accessing the buffer data.  Only valid while
  68          * mapped.
  69          */
  70 #ifdef __cplusplus
  71         void *virt;
  72 #else
  73         void *virtual;
  74 #endif
  75
  76         /** Buffer manager context associated with this buffer object */
  77         struct brw_bufmgr *bufmgr;
  78
  79         /** The GEM handle for this buffer object. */
  80         uint32_t gem_handle;
  81
  82         /**
  83          * Last seen card virtual address (offset from the beginning of the
  84          * aperture) for the object.  This should be used to fill relocation
  85          * entries when calling drm_bacon_bo_emit_reloc()
  86          */
  87         uint64_t offset64;
  88
  89         /**
  90          * Boolean of whether the GPU is definitely not accessing the buffer.
  91          *
  92          * This is only valid when reusable, since non-reusable
  93          * buffers are those that have been shared with other
  94          * processes, so we don't know their state.
  95          */
  96         bool idle;
  97
  98         int refcount;
  99         const char *name;
 100
 101         /**
 102          * Kenel-assigned global name for this object
 103          *
 104          * List contains both flink named and prime fd'd objects
 105          */
 106         unsigned int global_name;
 107
 108         /**
 109          * Current tiling mode
 110          */
 111         uint32_t tiling_mode;
 112         uint32_t swizzle_mode;
 113         unsigned long stride;
 114
 115         time_t free_time;
 116
 117         /** Mapped address for the buffer, saved across map/unmap cycles */
 118         void *mem_virtual;
 119         /** GTT virtual address for the buffer, saved across map/unmap cycles */
 120         void *gtt_virtual;
 121         /** WC CPU address for the buffer, saved across map/unmap cycles */
 122         void *wc_virtual;
 123         int map_count;
 124         struct list_head vma_list;
 125
 126         /** BO cache list */
 127         struct list_head head;
 128
 129         /**
 130          * Boolean of whether this buffer can be re-used
 131          */
 132         bool reusable;
 133 };
 134
 135 #define BO_ALLOC_FOR_RENDER (1<<0)
 136
 137 /**
 138  * Allocate a buffer object.
 139  *
 140  * Buffer objects are not necessarily initially mapped into CPU virtual
 141  * address space or graphics device aperture.  They must be mapped
 142  * using bo_map() or drm_bacon_gem_bo_map_gtt() to be used by the CPU.
 143  */
 144 drm_bacon_bo *drm_bacon_bo_alloc(struct brw_bufmgr *bufmgr, const char *name,
 145                                  unsigned long size, unsigned int alignment);
 146 /**
 147  * Allocate a buffer object, hinting that it will be used as a
 148  * render target.
 149  *
 150  * This is otherwise the same as bo_alloc.
 151  */
 152 drm_bacon_bo *drm_bacon_bo_alloc_for_render(struct brw_bufmgr *bufmgr,
 153                                             const char *name,
 154                                             unsigned long size,
 155                                             unsigned int alignment);
 156
 157 /**
 158  * Allocate a tiled buffer object.
 159  *
 160  * Alignment for tiled objects is set automatically; the 'flags'
 161  * argument provides a hint about how the object will be used initially.
 162  *
 163  * Valid tiling formats are:
 164  *  I915_TILING_NONE
 165  *  I915_TILING_X
 166  *  I915_TILING_Y
 167  *
 168  * Note the tiling format may be rejected; callers should check the
 169  * 'tiling_mode' field on return, as well as the pitch value, which
 170  * may have been rounded up to accommodate for tiling restrictions.
 171  */
 172 drm_bacon_bo *drm_bacon_bo_alloc_tiled(struct brw_bufmgr *bufmgr,
 173                                        const char *name,
 174                                        int x, int y, int cpp,
 175                                        uint32_t *tiling_mode,
 176                                        unsigned long *pitch,
 177                                        unsigned long flags);
 178
 179 /** Takes a reference on a buffer object */
 180 void drm_bacon_bo_reference(drm_bacon_bo *bo);
 181
 182 /**
 183  * Releases a reference on a buffer object, freeing the data if
 184  * no references remain.
 185  */
 186 void drm_bacon_bo_unreference(drm_bacon_bo *bo);
 187
 188 /**
 189  * Maps the buffer into userspace.
 190  *
 191  * This function will block waiting for any existing execution on the
 192  * buffer to complete, first.  The resulting mapping is available at
 193  * buf->virtual.
 194  */
 195 int drm_bacon_bo_map(drm_bacon_bo *bo, int write_enable);
 196
 197 /**
 198  * Reduces the refcount on the userspace mapping of the buffer
 199  * object.
 200  */
 201 int drm_bacon_bo_unmap(drm_bacon_bo *bo);
 202
 203 /** Write data into an object. */
 204 int drm_bacon_bo_subdata(drm_bacon_bo *bo, unsigned long offset,
 205                          unsigned long size, const void *data);
 206 /** Read data from an object. */
 207 int drm_bacon_bo_get_subdata(drm_bacon_bo *bo, unsigned long offset,
 208                              unsigned long size, void *data);
 209 /**
 210  * Waits for rendering to an object by the GPU to have completed.
 211  *
 212  * This is not required for any access to the BO by bo_map,
 213  * bo_subdata, etc.  It is merely a way for the driver to implement
 214  * glFinish.
 215  */
 216 void drm_bacon_bo_wait_rendering(drm_bacon_bo *bo);
 217
 218 /**
 219  * Tears down the buffer manager instance.
 220  */
 221 void brw_bufmgr_destroy(struct brw_bufmgr *bufmgr);
 222
 223 /**
 224  * Ask that the buffer be placed in tiling mode
 225  *
 226  * \param buf Buffer to set tiling mode for
 227  * \param tiling_mode desired, and returned tiling mode
 228  */
 229 int drm_bacon_bo_set_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
 230                             uint32_t stride);
 231 /**
 232  * Get the current tiling (and resulting swizzling) mode for the bo.
 233  *
 234  * \param buf Buffer to get tiling mode for
 235  * \param tiling_mode returned tiling mode
 236  * \param swizzle_mode returned swizzling mode
 237  */
 238 int drm_bacon_bo_get_tiling(drm_bacon_bo *bo, uint32_t * tiling_mode,
 239                             uint32_t * swizzle_mode);
 240
 241 /**
 242  * Create a visible name for a buffer which can be used by other apps
 243  *
 244  * \param buf Buffer to create a name for
 245  * \param name Returned name
 246  */
 247 int drm_bacon_bo_flink(drm_bacon_bo *bo, uint32_t * name);
 248
 249 /**
 250  * Returns 1 if mapping the buffer for write could cause the process
 251  * to block, due to the object being active in the GPU.
 252  */
 253 int drm_bacon_bo_busy(drm_bacon_bo *bo);
 254
 255 /**
 256  * Specify the volatility of the buffer.
 257  * \param bo Buffer to create a name for
 258  * \param madv The purgeable status
 259  *
 260  * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
 261  * reclaimed under memory pressure. If you subsequently require the buffer,
 262  * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
 263  *
 264  * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
 265  * marked as I915_MADV_DONTNEED.
 266  */
 267 int drm_bacon_bo_madvise(drm_bacon_bo *bo, int madv);
 268
 269 /**
 270  * Disable buffer reuse for buffers which will be shared in some way,
 271  * as with scanout buffers. When the buffer reference count goes to
 272  * zero, it will be freed and not placed in the reuse list.
 273  *
 274  * \param bo Buffer to disable reuse for
 275  */
 276 int drm_bacon_bo_disable_reuse(drm_bacon_bo *bo);
 277
 278 /**
 279  * Query whether a buffer is reusable.
 280  *
 281  * \param bo Buffer to query
 282  */
 283 int drm_bacon_bo_is_reusable(drm_bacon_bo *bo);
 284
 285 /* drm_bacon_bufmgr_gem.c */
 286 struct brw_bufmgr *brw_bufmgr_init(struct gen_device_info *devinfo,
 287                                    int fd, int batch_size);
 288 drm_bacon_bo *drm_bacon_bo_gem_create_from_name(struct brw_bufmgr *bufmgr,
 289                                                 const char *name,
 290                                                 unsigned int handle);
 291 void brw_bufmgr_enable_reuse(struct brw_bufmgr *bufmgr);
 292 void brw_bufmgr_gem_set_vma_cache_size(struct brw_bufmgr *bufmgr,
 293                                              int limit);
 294 int drm_bacon_gem_bo_map_unsynchronized(drm_bacon_bo *bo);
 295 int drm_bacon_gem_bo_map_gtt(drm_bacon_bo *bo);
 296
 297 void *drm_bacon_gem_bo_map__cpu(drm_bacon_bo *bo);
 298 void *drm_bacon_gem_bo_map__gtt(drm_bacon_bo *bo);
 299 void *drm_bacon_gem_bo_map__wc(drm_bacon_bo *bo);
 300
 301 void drm_bacon_gem_bo_start_gtt_access(drm_bacon_bo *bo, int write_enable);
 302
 303 int drm_bacon_gem_bo_wait(drm_bacon_bo *bo, int64_t timeout_ns);
 304
 305 uint32_t brw_create_hw_context(struct brw_bufmgr *bufmgr);
 306 void brw_destroy_hw_context(struct brw_bufmgr *bufmgr, uint32_t ctx_id);
 307
 308 int drm_bacon_bo_gem_export_to_prime(drm_bacon_bo *bo, int *prime_fd);
 309 drm_bacon_bo *drm_bacon_bo_gem_create_from_prime(struct brw_bufmgr *bufmgr,
 310                                                 int prime_fd, int size);
 311
 312 int drm_bacon_reg_read(struct brw_bufmgr *bufmgr,
 313                        uint32_t offset,
 314                        uint64_t *result);
 315
 316 /** @{ */
 317
 318 #if defined(__cplusplus)
 319 }
 320 #endif
 321
 322 #endif /* INTEL_BUFMGR_H */