src/mesa/drivers/dri/i965/brw_cc.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36 #include "brw_util.h"
  37 #include "main/macros.h"
  38 #include "main/stencil.h"
  39 #include "intel_batchbuffer.h"
  40
  41 static void
  42 brw_upload_cc_vp(struct brw_context *brw)
  43 {
  44    struct gl_context *ctx = &brw->ctx;
  45    struct brw_cc_viewport *ccv;
  46
  47    ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE,
  48                          sizeof(*ccv) * ctx->Const.MaxViewports, 32,
  49                          &brw->cc.vp_offset);
  50
  51    /* _NEW_TRANSFORM */
  52    for (unsigned i = 0; i < ctx->Const.MaxViewports; i++) {
  53       if (ctx->Transform.DepthClamp) {
  54          /* _NEW_VIEWPORT */
  55          ccv[i].min_depth = MIN2(ctx->ViewportArray[i].Near,
  56                                  ctx->ViewportArray[i].Far);
  57          ccv[i].max_depth = MAX2(ctx->ViewportArray[i].Near,
  58                                  ctx->ViewportArray[i].Far);
  59       } else {
  60          ccv[i].min_depth = 0.0;
  61          ccv[i].max_depth = 1.0;
  62       }
  63    }
  64
  65    if (brw->gen >= 7) {
  66       BEGIN_BATCH(2);
  67       OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS_CC << 16 | (2 - 2));
  68       OUT_BATCH(brw->cc.vp_offset);
  69       ADVANCE_BATCH();
  70    } else {
  71       brw->state.dirty.brw |= BRW_NEW_CC_VP;
  72    }
  73 }
  74
  75 const struct brw_tracked_state brw_cc_vp = {
  76    .dirty = {
  77       .mesa = _NEW_TRANSFORM |
  78               _NEW_VIEWPORT,
  79       .brw = BRW_NEW_BATCH,
  80       .cache = 0
  81    },
  82    .emit = brw_upload_cc_vp
  83 };
  84
  85 /**
  86  * Modify blend function to force destination alpha to 1.0
  87  *
  88  * If \c function specifies a blend function that uses destination alpha,
  89  * replace it with a function that hard-wires destination alpha to 1.0.  This
  90  * is used when rendering to xRGB targets.
  91  */
  92 GLenum
  93 brw_fix_xRGB_alpha(GLenum function)
  94 {
  95    switch (function) {
  96    case GL_DST_ALPHA:
  97       return GL_ONE;
  98
  99    case GL_ONE_MINUS_DST_ALPHA:
 100    case GL_SRC_ALPHA_SATURATE:
 101       return GL_ZERO;
 102    }
 103
 104    return function;
 105 }
 106
 107 /**
 108  * Creates a CC unit packet from the current blend state.
 109  */
 110 static void upload_cc_unit(struct brw_context *brw)
 111 {
 112    struct gl_context *ctx = &brw->ctx;
 113    struct brw_cc_unit_state *cc;
 114
 115    cc = brw_state_batch(brw, AUB_TRACE_CC_STATE,
 116                         sizeof(*cc), 64, &brw->cc.state_offset);
 117    memset(cc, 0, sizeof(*cc));
 118
 119    /* _NEW_STENCIL | _NEW_BUFFERS */
 120    if (ctx->Stencil._Enabled) {
 121       const unsigned back = ctx->Stencil._BackFace;
 122
 123       cc->cc0.stencil_enable = 1;
 124       cc->cc0.stencil_func =
 125          intel_translate_compare_func(ctx->Stencil.Function[0]);
 126       cc->cc0.stencil_fail_op =
 127          intel_translate_stencil_op(ctx->Stencil.FailFunc[0]);
 128       cc->cc0.stencil_pass_depth_fail_op =
 129          intel_translate_stencil_op(ctx->Stencil.ZFailFunc[0]);
 130       cc->cc0.stencil_pass_depth_pass_op =
 131          intel_translate_stencil_op(ctx->Stencil.ZPassFunc[0]);
 132       cc->cc1.stencil_ref = _mesa_get_stencil_ref(ctx, 0);
 133       cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0];
 134       cc->cc1.stencil_test_mask = ctx->Stencil.ValueMask[0];
 135
 136       if (ctx->Stencil._TestTwoSide) {
 137          cc->cc0.bf_stencil_enable = 1;
 138          cc->cc0.bf_stencil_func =
 139             intel_translate_compare_func(ctx->Stencil.Function[back]);
 140          cc->cc0.bf_stencil_fail_op =
 141             intel_translate_stencil_op(ctx->Stencil.FailFunc[back]);
 142          cc->cc0.bf_stencil_pass_depth_fail_op =
 143             intel_translate_stencil_op(ctx->Stencil.ZFailFunc[back]);
 144          cc->cc0.bf_stencil_pass_depth_pass_op =
 145             intel_translate_stencil_op(ctx->Stencil.ZPassFunc[back]);
 146          cc->cc1.bf_stencil_ref = _mesa_get_stencil_ref(ctx, back);
 147          cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back];
 148          cc->cc2.bf_stencil_test_mask = ctx->Stencil.ValueMask[back];
 149       }
 150
 151       /* Not really sure about this:
 152        */
 153       if (ctx->Stencil.WriteMask[0] ||
 154           (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
 155          cc->cc0.stencil_write_enable = 1;
 156    }
 157
 158    /* _NEW_COLOR */
 159    if (ctx->Color.ColorLogicOpEnabled && ctx->Color.LogicOp != GL_COPY) {
 160       cc->cc2.logicop_enable = 1;
 161       cc->cc5.logicop_func = intel_translate_logic_op(ctx->Color.LogicOp);
 162    } else if (ctx->Color.BlendEnabled) {
 163       GLenum eqRGB = ctx->Color.Blend[0].EquationRGB;
 164       GLenum eqA = ctx->Color.Blend[0].EquationA;
 165       GLenum srcRGB = ctx->Color.Blend[0].SrcRGB;
 166       GLenum dstRGB = ctx->Color.Blend[0].DstRGB;
 167       GLenum srcA = ctx->Color.Blend[0].SrcA;
 168       GLenum dstA = ctx->Color.Blend[0].DstA;
 169
 170       /* If the renderbuffer is XRGB, we have to frob the blend function to
 171        * force the destination alpha to 1.0.  This means replacing GL_DST_ALPHA
 172        * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
 173        */
 174       if (ctx->DrawBuffer->Visual.alphaBits == 0) {
 175          srcRGB = brw_fix_xRGB_alpha(srcRGB);
 176          srcA   = brw_fix_xRGB_alpha(srcA);
 177          dstRGB = brw_fix_xRGB_alpha(dstRGB);
 178          dstA   = brw_fix_xRGB_alpha(dstA);
 179       }
 180
 181       if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 182          srcRGB = dstRGB = GL_ONE;
 183       }
 184
 185       if (eqA == GL_MIN || eqA == GL_MAX) {
 186          srcA = dstA = GL_ONE;
 187       }
 188
 189       cc->cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
 190       cc->cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
 191       cc->cc6.blend_function = brw_translate_blend_equation(eqRGB);
 192
 193       cc->cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
 194       cc->cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
 195       cc->cc5.ia_blend_function = brw_translate_blend_equation(eqA);
 196
 197       cc->cc3.blend_enable = 1;
 198       cc->cc3.ia_blend_enable = (srcA != srcRGB ||
 199                                 dstA != dstRGB ||
 200                                 eqA != eqRGB);
 201    }
 202
 203    /* _NEW_BUFFERS */
 204    if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) {
 205       cc->cc3.alpha_test = 1;
 206       cc->cc3.alpha_test_func =
 207          intel_translate_compare_func(ctx->Color.AlphaFunc);
 208       cc->cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
 209
 210       UNCLAMPED_FLOAT_TO_UBYTE(cc->cc7.alpha_ref.ub[0], ctx->Color.AlphaRef);
 211    }
 212
 213    if (ctx->Color.DitherFlag) {
 214       cc->cc5.dither_enable = 1;
 215       cc->cc6.y_dither_offset = 0;
 216       cc->cc6.x_dither_offset = 0;
 217    }
 218
 219    /* _NEW_DEPTH */
 220    if (ctx->Depth.Test) {
 221       cc->cc2.depth_test = 1;
 222       cc->cc2.depth_test_function =
 223          intel_translate_compare_func(ctx->Depth.Func);
 224       cc->cc2.depth_write_enable = ctx->Depth.Mask;
 225    }
 226
 227    if (brw->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS))
 228       cc->cc5.statistics_enable = 1;
 229
 230    /* BRW_NEW_CC_VP */
 231    cc->cc4.cc_viewport_state_offset = (brw->batch.bo->offset64 +
 232                                        brw->cc.vp_offset) >> 5; /* reloc */
 233
 234    brw->state.dirty.brw |= BRW_NEW_GEN4_UNIT_STATE;
 235
 236    /* Emit CC viewport relocation */
 237    drm_intel_bo_emit_reloc(brw->batch.bo,
 238                            (brw->cc.state_offset +
 239                             offsetof(struct brw_cc_unit_state, cc4)),
 240                            brw->batch.bo, brw->cc.vp_offset,
 241                            I915_GEM_DOMAIN_INSTRUCTION, 0);
 242 }
 243
 244 const struct brw_tracked_state brw_cc_unit = {
 245    .dirty = {
 246       .mesa = _NEW_BUFFERS |
 247               _NEW_COLOR |
 248               _NEW_DEPTH |
 249               _NEW_STENCIL,
 250       .brw = BRW_NEW_BATCH |
 251              BRW_NEW_CC_VP |
 252              BRW_NEW_STATS_WM,
 253       .cache = 0
 254    },
 255    .emit = upload_cc_unit,
 256 };
 257
 258 static void upload_blend_constant_color(struct brw_context *brw)
 259 {
 260    struct gl_context *ctx = &brw->ctx;
 261
 262    BEGIN_BATCH(5);
 263    OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR << 16 | (5-2));
 264    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[0]);
 265    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[1]);
 266    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[2]);
 267    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[3]);
 268    ADVANCE_BATCH();
 269 }
 270
 271 const struct brw_tracked_state brw_blend_constant_color = {
 272    .dirty = {
 273       .mesa = _NEW_COLOR,
 274       .brw = BRW_NEW_CONTEXT,
 275       .cache = 0
 276    },
 277    .emit = upload_blend_constant_color
 278 };