src/mesa/drivers/dri/i965/brw_cc.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36 #include "brw_util.h"
  37 #include "main/glformats.h"
  38 #include "main/macros.h"
  39 #include "main/stencil.h"
  40 #include "intel_batchbuffer.h"
  41
  42 /**
  43  * Modify blend function to force destination alpha to 1.0
  44  *
  45  * If \c function specifies a blend function that uses destination alpha,
  46  * replace it with a function that hard-wires destination alpha to 1.0.  This
  47  * is used when rendering to xRGB targets.
  48  */
  49 GLenum
  50 brw_fix_xRGB_alpha(GLenum function)
  51 {
  52    switch (function) {
  53    case GL_DST_ALPHA:
  54       return GL_ONE;
  55
  56    case GL_ONE_MINUS_DST_ALPHA:
  57    case GL_SRC_ALPHA_SATURATE:
  58       return GL_ZERO;
  59    }
  60
  61    return function;
  62 }
  63
  64 /**
  65  * Creates a CC unit packet from the current blend state.
  66  */
  67 static void upload_cc_unit(struct brw_context *brw)
  68 {
  69    struct gl_context *ctx = &brw->ctx;
  70    struct brw_cc_unit_state *cc;
  71
  72    cc = brw_state_batch(brw, sizeof(*cc), 64, &brw->cc.state_offset);
  73    memset(cc, 0, sizeof(*cc));
  74
  75    /* _NEW_STENCIL | _NEW_BUFFERS */
  76    if (brw->stencil_enabled) {
  77       const unsigned back = ctx->Stencil._BackFace;
  78
  79       cc->cc0.stencil_enable = 1;
  80       cc->cc0.stencil_func =
  81          intel_translate_compare_func(ctx->Stencil.Function[0]);
  82       cc->cc0.stencil_fail_op =
  83          intel_translate_stencil_op(ctx->Stencil.FailFunc[0]);
  84       cc->cc0.stencil_pass_depth_fail_op =
  85          intel_translate_stencil_op(ctx->Stencil.ZFailFunc[0]);
  86       cc->cc0.stencil_pass_depth_pass_op =
  87          intel_translate_stencil_op(ctx->Stencil.ZPassFunc[0]);
  88       cc->cc1.stencil_ref = _mesa_get_stencil_ref(ctx, 0);
  89       cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0];
  90       cc->cc1.stencil_test_mask = ctx->Stencil.ValueMask[0];
  91
  92       if (brw->stencil_two_sided) {
  93          cc->cc0.bf_stencil_enable = 1;
  94          cc->cc0.bf_stencil_func =
  95             intel_translate_compare_func(ctx->Stencil.Function[back]);
  96          cc->cc0.bf_stencil_fail_op =
  97             intel_translate_stencil_op(ctx->Stencil.FailFunc[back]);
  98          cc->cc0.bf_stencil_pass_depth_fail_op =
  99             intel_translate_stencil_op(ctx->Stencil.ZFailFunc[back]);
 100          cc->cc0.bf_stencil_pass_depth_pass_op =
 101             intel_translate_stencil_op(ctx->Stencil.ZPassFunc[back]);
 102          cc->cc1.bf_stencil_ref = _mesa_get_stencil_ref(ctx, back);
 103          cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back];
 104          cc->cc2.bf_stencil_test_mask = ctx->Stencil.ValueMask[back];
 105       }
 106
 107       /* Not really sure about this:
 108        */
 109       if (ctx->Stencil.WriteMask[0] ||
 110           (brw->stencil_two_sided && ctx->Stencil.WriteMask[back]))
 111          cc->cc0.stencil_write_enable = 1;
 112    }
 113
 114    /* _NEW_COLOR */
 115    if (ctx->Color.ColorLogicOpEnabled && ctx->Color.LogicOp != GL_COPY) {
 116       cc->cc2.logicop_enable = 1;
 117       cc->cc5.logicop_func = intel_translate_logic_op(ctx->Color.LogicOp);
 118    } else if (ctx->Color.BlendEnabled && !ctx->Color._AdvancedBlendMode) {
 119       GLenum eqRGB = ctx->Color.Blend[0].EquationRGB;
 120       GLenum eqA = ctx->Color.Blend[0].EquationA;
 121       GLenum srcRGB = ctx->Color.Blend[0].SrcRGB;
 122       GLenum dstRGB = ctx->Color.Blend[0].DstRGB;
 123       GLenum srcA = ctx->Color.Blend[0].SrcA;
 124       GLenum dstA = ctx->Color.Blend[0].DstA;
 125
 126       /* If the renderbuffer is XRGB, we have to frob the blend function to
 127        * force the destination alpha to 1.0.  This means replacing GL_DST_ALPHA
 128        * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
 129        */
 130       const struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[0];
 131       if (rb && !_mesa_base_format_has_channel(rb->_BaseFormat,
 132                                                GL_TEXTURE_ALPHA_TYPE)) {
 133          srcRGB = brw_fix_xRGB_alpha(srcRGB);
 134          srcA   = brw_fix_xRGB_alpha(srcA);
 135          dstRGB = brw_fix_xRGB_alpha(dstRGB);
 136          dstA   = brw_fix_xRGB_alpha(dstA);
 137       }
 138
 139       if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 140          srcRGB = dstRGB = GL_ONE;
 141       }
 142
 143       if (eqA == GL_MIN || eqA == GL_MAX) {
 144          srcA = dstA = GL_ONE;
 145       }
 146
 147       cc->cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
 148       cc->cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
 149       cc->cc6.blend_function = brw_translate_blend_equation(eqRGB);
 150
 151       cc->cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
 152       cc->cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
 153       cc->cc5.ia_blend_function = brw_translate_blend_equation(eqA);
 154
 155       cc->cc3.blend_enable = 1;
 156       cc->cc3.ia_blend_enable = (srcA != srcRGB ||
 157                                 dstA != dstRGB ||
 158                                 eqA != eqRGB);
 159    }
 160
 161    /* _NEW_BUFFERS */
 162    if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) {
 163       cc->cc3.alpha_test = 1;
 164       cc->cc3.alpha_test_func =
 165          intel_translate_compare_func(ctx->Color.AlphaFunc);
 166       cc->cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
 167
 168       UNCLAMPED_FLOAT_TO_UBYTE(cc->cc7.alpha_ref.ub[0], ctx->Color.AlphaRef);
 169    }
 170
 171    if (ctx->Color.DitherFlag) {
 172       cc->cc5.dither_enable = 1;
 173       cc->cc6.y_dither_offset = 0;
 174       cc->cc6.x_dither_offset = 0;
 175    }
 176
 177    /* _NEW_DEPTH */
 178    if (ctx->Depth.Test) {
 179       cc->cc2.depth_test = 1;
 180       cc->cc2.depth_test_function =
 181          intel_translate_compare_func(ctx->Depth.Func);
 182       cc->cc2.depth_write_enable = brw_depth_writes_enabled(brw);
 183    }
 184
 185    if (brw->stats_wm)
 186       cc->cc5.statistics_enable = 1;
 187
 188    /* BRW_NEW_CC_VP */
 189    cc->cc4.cc_viewport_state_offset = (brw->batch.bo->offset64 +
 190                                        brw->cc.vp_offset) >> 5; /* reloc */
 191
 192    brw->ctx.NewDriverState |= BRW_NEW_GEN4_UNIT_STATE;
 193
 194    /* Emit CC viewport relocation */
 195    brw_emit_reloc(&brw->batch,
 196                   (brw->cc.state_offset +
 197                    offsetof(struct brw_cc_unit_state, cc4)),
 198                   brw->batch.bo, brw->cc.vp_offset,
 199                   I915_GEM_DOMAIN_INSTRUCTION, 0);
 200 }
 201
 202 const struct brw_tracked_state brw_cc_unit = {
 203    .dirty = {
 204       .mesa = _NEW_BUFFERS |
 205               _NEW_COLOR |
 206               _NEW_DEPTH |
 207               _NEW_STENCIL,
 208       .brw = BRW_NEW_BATCH |
 209              BRW_NEW_BLORP |
 210              BRW_NEW_CC_VP |
 211              BRW_NEW_STATS_WM,
 212    },
 213    .emit = upload_cc_unit,
 214 };
 215
 216 static void upload_blend_constant_color(struct brw_context *brw)
 217 {
 218    struct gl_context *ctx = &brw->ctx;
 219
 220    BEGIN_BATCH(5);
 221    OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR << 16 | (5-2));
 222    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[0]);
 223    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[1]);
 224    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[2]);
 225    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[3]);
 226    ADVANCE_BATCH();
 227 }
 228
 229 const struct brw_tracked_state brw_blend_constant_color = {
 230    .dirty = {
 231       .mesa = _NEW_COLOR,
 232       .brw = BRW_NEW_CONTEXT |
 233              BRW_NEW_BLORP,
 234    },
 235    .emit = upload_blend_constant_color
 236 };