src/mesa/drivers/dri/i965/brw_cc.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_state.h"
  35 #include "brw_defines.h"
  36 #include "brw_util.h"
  37 #include "main/macros.h"
  38 #include "intel_batchbuffer.h"
  39
  40 static void
  41 prepare_cc_vp(struct brw_context *brw)
  42 {
  43    struct gl_context *ctx = &brw->intel.ctx;
  44    struct brw_cc_viewport *ccv;
  45
  46    ccv = brw_state_batch(brw, sizeof(*ccv), 32, &brw->cc.vp_offset);
  47
  48    /* _NEW_TRANSOFORM */
  49    if (ctx->Transform.DepthClamp) {
  50       /* _NEW_VIEWPORT */
  51       ccv->min_depth = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
  52       ccv->max_depth = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
  53    } else {
  54       ccv->min_depth = 0.0;
  55       ccv->max_depth = 1.0;
  56    }
  57
  58    brw->state.dirty.cache |= CACHE_NEW_CC_VP;
  59 }
  60
  61 const struct brw_tracked_state brw_cc_vp = {
  62    .dirty = {
  63       .mesa = _NEW_VIEWPORT | _NEW_TRANSFORM,
  64       .brw = BRW_NEW_BATCH,
  65       .cache = 0
  66    },
  67    .prepare = prepare_cc_vp
  68 };
  69
  70 /**
  71  * Modify blend function to force destination alpha to 1.0
  72  *
  73  * If \c function specifies a blend function that uses destination alpha,
  74  * replace it with a function that hard-wires destination alpha to 1.0.  This
  75  * is used when rendering to xRGB targets.
  76  */
  77 static GLenum
  78 fix_xRGB_alpha(GLenum function)
  79 {
  80    switch (function) {
  81    case GL_DST_ALPHA:
  82       return GL_ONE;
  83
  84    case GL_ONE_MINUS_DST_ALPHA:
  85    case GL_SRC_ALPHA_SATURATE:
  86       return GL_ZERO;
  87    }
  88
  89    return function;
  90 }
  91
  92 /**
  93  * Creates the state cache entry for the given CC unit key.
  94  */
  95 static void upload_cc_unit(struct brw_context *brw)
  96 {
  97    struct intel_context *intel = &brw->intel;
  98    struct gl_context *ctx = &brw->intel.ctx;
  99    struct brw_cc_unit_state *cc;
 100
 101    cc = brw_state_batch(brw, sizeof(*cc), 64, &brw->cc.state_offset);
 102    memset(cc, 0, sizeof(*cc));
 103
 104    /* _NEW_STENCIL */
 105    if (ctx->Stencil._Enabled) {
 106       const unsigned back = ctx->Stencil._BackFace;
 107
 108       cc->cc0.stencil_enable = 1;
 109       cc->cc0.stencil_func =
 110          intel_translate_compare_func(ctx->Stencil.Function[0]);
 111       cc->cc0.stencil_fail_op =
 112          intel_translate_stencil_op(ctx->Stencil.FailFunc[0]);
 113       cc->cc0.stencil_pass_depth_fail_op =
 114          intel_translate_stencil_op(ctx->Stencil.ZFailFunc[0]);
 115       cc->cc0.stencil_pass_depth_pass_op =
 116          intel_translate_stencil_op(ctx->Stencil.ZPassFunc[0]);
 117       cc->cc1.stencil_ref = ctx->Stencil.Ref[0];
 118       cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0];
 119       cc->cc1.stencil_test_mask = ctx->Stencil.ValueMask[0];
 120
 121       if (ctx->Stencil._TestTwoSide) {
 122          cc->cc0.bf_stencil_enable = 1;
 123          cc->cc0.bf_stencil_func =
 124             intel_translate_compare_func(ctx->Stencil.Function[back]);
 125          cc->cc0.bf_stencil_fail_op =
 126             intel_translate_stencil_op(ctx->Stencil.FailFunc[back]);
 127          cc->cc0.bf_stencil_pass_depth_fail_op =
 128             intel_translate_stencil_op(ctx->Stencil.ZFailFunc[back]);
 129          cc->cc0.bf_stencil_pass_depth_pass_op =
 130             intel_translate_stencil_op(ctx->Stencil.ZPassFunc[back]);
 131          cc->cc1.bf_stencil_ref = ctx->Stencil.Ref[back];
 132          cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back];
 133          cc->cc2.bf_stencil_test_mask = ctx->Stencil.ValueMask[back];
 134       }
 135
 136       /* Not really sure about this:
 137        */
 138       if (ctx->Stencil.WriteMask[0] ||
 139           (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back]))
 140          cc->cc0.stencil_write_enable = 1;
 141    }
 142
 143    /* _NEW_COLOR */
 144    if (ctx->Color._LogicOpEnabled && ctx->Color.LogicOp != GL_COPY) {
 145       cc->cc2.logicop_enable = 1;
 146       cc->cc5.logicop_func = intel_translate_logic_op(ctx->Color.LogicOp);
 147    } else if (ctx->Color.BlendEnabled) {
 148       GLenum eqRGB = ctx->Color.Blend[0].EquationRGB;
 149       GLenum eqA = ctx->Color.Blend[0].EquationA;
 150       GLenum srcRGB = ctx->Color.Blend[0].SrcRGB;
 151       GLenum dstRGB = ctx->Color.Blend[0].DstRGB;
 152       GLenum srcA = ctx->Color.Blend[0].SrcA;
 153       GLenum dstA = ctx->Color.Blend[0].DstA;
 154
 155       /* If the renderbuffer is XRGB, we have to frob the blend function to
 156        * force the destination alpha to 1.0.  This means replacing GL_DST_ALPHA
 157        * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO.
 158        */
 159       if (ctx->DrawBuffer->Visual.alphaBits == 0) {
 160          srcRGB = fix_xRGB_alpha(srcRGB);
 161          srcA   = fix_xRGB_alpha(srcA);
 162          dstRGB = fix_xRGB_alpha(dstRGB);
 163          dstA   = fix_xRGB_alpha(dstA);
 164       }
 165
 166       if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 167          srcRGB = dstRGB = GL_ONE;
 168       }
 169
 170       if (eqA == GL_MIN || eqA == GL_MAX) {
 171          srcA = dstA = GL_ONE;
 172       }
 173
 174       cc->cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
 175       cc->cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
 176       cc->cc6.blend_function = brw_translate_blend_equation(eqRGB);
 177
 178       cc->cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
 179       cc->cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
 180       cc->cc5.ia_blend_function = brw_translate_blend_equation(eqA);
 181
 182       cc->cc3.blend_enable = 1;
 183       cc->cc3.ia_blend_enable = (srcA != srcRGB ||
 184                                 dstA != dstRGB ||
 185                                 eqA != eqRGB);
 186    }
 187
 188    if (ctx->Color.AlphaEnabled) {
 189       cc->cc3.alpha_test = 1;
 190       cc->cc3.alpha_test_func =
 191          intel_translate_compare_func(ctx->Color.AlphaFunc);
 192       cc->cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
 193
 194       UNCLAMPED_FLOAT_TO_UBYTE(cc->cc7.alpha_ref.ub[0], ctx->Color.AlphaRef);
 195    }
 196
 197    if (ctx->Color.DitherFlag) {
 198       cc->cc5.dither_enable = 1;
 199       cc->cc6.y_dither_offset = 0;
 200       cc->cc6.x_dither_offset = 0;
 201    }
 202
 203    /* _NEW_DEPTH */
 204    if (ctx->Depth.Test) {
 205       cc->cc2.depth_test = 1;
 206       cc->cc2.depth_test_function =
 207          intel_translate_compare_func(ctx->Depth.Func);
 208       cc->cc2.depth_write_enable = ctx->Depth.Mask;
 209    }
 210
 211    if (intel->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS))
 212       cc->cc5.statistics_enable = 1;
 213
 214    /* CACHE_NEW_CC_VP */
 215    cc->cc4.cc_viewport_state_offset = (intel->batch.bo->offset +
 216                                        brw->cc.vp_offset) >> 5; /* reloc */
 217
 218    brw->state.dirty.cache |= CACHE_NEW_CC_UNIT;
 219
 220    /* Emit CC viewport relocation */
 221    drm_intel_bo_emit_reloc(brw->intel.batch.bo,
 222                            (brw->cc.state_offset +
 223                             offsetof(struct brw_cc_unit_state, cc4)),
 224                            intel->batch.bo, brw->cc.vp_offset,
 225                            I915_GEM_DOMAIN_INSTRUCTION, 0);
 226 }
 227
 228 const struct brw_tracked_state brw_cc_unit = {
 229    .dirty = {
 230       .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH,
 231       .brw = BRW_NEW_BATCH,
 232       .cache = CACHE_NEW_CC_VP
 233    },
 234    .emit = upload_cc_unit,
 235 };
 236
 237 static void upload_blend_constant_color(struct brw_context *brw)
 238 {
 239    struct intel_context *intel = &brw->intel;
 240    struct gl_context *ctx = &intel->ctx;
 241
 242    BEGIN_BATCH(5);
 243    OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR << 16 | (5-2));
 244    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[0]);
 245    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[1]);
 246    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[2]);
 247    OUT_BATCH_F(ctx->Color.BlendColorUnclamped[3]);
 248    CACHED_BATCH();
 249 }
 250
 251 const struct brw_tracked_state brw_blend_constant_color = {
 252    .dirty = {
 253       .mesa = _NEW_COLOR,
 254       .brw = BRW_NEW_CONTEXT,
 255       .cache = 0
 256    },
 257    .emit = upload_blend_constant_color
 258 };