Merge commit 'origin/mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cc.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
36 #include "brw_util.h"
37 #include "main/macros.h"
38 #include "main/enums.h"
39
40 static void prepare_cc_vp( struct brw_context *brw )
41 {
42 GLcontext *ctx = &brw->intel.ctx;
43 struct brw_cc_viewport ccv;
44
45 memset(&ccv, 0, sizeof(ccv));
46
47 /* _NEW_TRANSOFORM */
48 if (ctx->Transform.DepthClamp) {
49 /* _NEW_VIEWPORT */
50 ccv.min_depth = MIN2(ctx->Viewport.Near, ctx->Viewport.Far);
51 ccv.max_depth = MAX2(ctx->Viewport.Near, ctx->Viewport.Far);
52 } else {
53 ccv.min_depth = 0.0;
54 ccv.max_depth = 1.0;
55 }
56
57 dri_bo_unreference(brw->cc.vp_bo);
58 brw->cc.vp_bo = brw_cache_data(&brw->cache, BRW_CC_VP, &ccv, sizeof(ccv),
59 NULL, 0);
60 }
61
62 const struct brw_tracked_state brw_cc_vp = {
63 .dirty = {
64 .mesa = _NEW_VIEWPORT | _NEW_TRANSFORM,
65 .brw = BRW_NEW_CONTEXT,
66 .cache = 0
67 },
68 .prepare = prepare_cc_vp
69 };
70
71 struct brw_cc_unit_key {
72 GLboolean stencil, stencil_two_side, color_blend, alpha_enabled;
73
74 GLenum stencil_func[2], stencil_fail_op[2];
75 GLenum stencil_pass_depth_fail_op[2], stencil_pass_depth_pass_op[2];
76 GLubyte stencil_ref[2], stencil_write_mask[2], stencil_test_mask[2];
77 GLenum logic_op;
78
79 GLenum blend_eq_rgb, blend_eq_a;
80 GLenum blend_src_rgb, blend_src_a;
81 GLenum blend_dst_rgb, blend_dst_a;
82
83 GLenum alpha_func;
84 GLclampf alpha_ref;
85
86 GLboolean dither;
87
88 GLboolean depth_test, depth_write;
89 GLenum depth_func;
90 };
91
92 static void
93 cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
94 {
95 GLcontext *ctx = &brw->intel.ctx;
96 const unsigned back = ctx->Stencil._BackFace;
97
98 memset(key, 0, sizeof(*key));
99
100 key->stencil = ctx->Stencil._Enabled;
101 key->stencil_two_side = ctx->Stencil._TestTwoSide;
102
103 if (key->stencil) {
104 key->stencil_func[0] = ctx->Stencil.Function[0];
105 key->stencil_fail_op[0] = ctx->Stencil.FailFunc[0];
106 key->stencil_pass_depth_fail_op[0] = ctx->Stencil.ZFailFunc[0];
107 key->stencil_pass_depth_pass_op[0] = ctx->Stencil.ZPassFunc[0];
108 key->stencil_ref[0] = ctx->Stencil.Ref[0];
109 key->stencil_write_mask[0] = ctx->Stencil.WriteMask[0];
110 key->stencil_test_mask[0] = ctx->Stencil.ValueMask[0];
111 }
112 if (key->stencil_two_side) {
113 key->stencil_func[1] = ctx->Stencil.Function[back];
114 key->stencil_fail_op[1] = ctx->Stencil.FailFunc[back];
115 key->stencil_pass_depth_fail_op[1] = ctx->Stencil.ZFailFunc[back];
116 key->stencil_pass_depth_pass_op[1] = ctx->Stencil.ZPassFunc[back];
117 key->stencil_ref[1] = ctx->Stencil.Ref[back];
118 key->stencil_write_mask[1] = ctx->Stencil.WriteMask[back];
119 key->stencil_test_mask[1] = ctx->Stencil.ValueMask[back];
120 }
121
122 if (ctx->Color._LogicOpEnabled)
123 key->logic_op = ctx->Color.LogicOp;
124 else
125 key->logic_op = GL_COPY;
126
127 key->color_blend = ctx->Color.BlendEnabled;
128 if (key->color_blend) {
129 key->blend_eq_rgb = ctx->Color.BlendEquationRGB;
130 key->blend_eq_a = ctx->Color.BlendEquationA;
131 key->blend_src_rgb = ctx->Color.BlendSrcRGB;
132 key->blend_dst_rgb = ctx->Color.BlendDstRGB;
133 key->blend_src_a = ctx->Color.BlendSrcA;
134 key->blend_dst_a = ctx->Color.BlendDstA;
135 }
136
137 key->alpha_enabled = ctx->Color.AlphaEnabled;
138 if (key->alpha_enabled) {
139 key->alpha_func = ctx->Color.AlphaFunc;
140 key->alpha_ref = ctx->Color.AlphaRef;
141 }
142
143 key->dither = ctx->Color.DitherFlag;
144
145 key->depth_test = ctx->Depth.Test;
146 if (key->depth_test) {
147 key->depth_func = ctx->Depth.Func;
148 key->depth_write = ctx->Depth.Mask;
149 }
150 }
151
152 /**
153 * Creates the state cache entry for the given CC unit key.
154 */
155 static dri_bo *
156 cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
157 {
158 struct brw_cc_unit_state cc;
159 dri_bo *bo;
160
161 memset(&cc, 0, sizeof(cc));
162
163 /* _NEW_STENCIL */
164 if (key->stencil) {
165 cc.cc0.stencil_enable = 1;
166 cc.cc0.stencil_func =
167 intel_translate_compare_func(key->stencil_func[0]);
168 cc.cc0.stencil_fail_op =
169 intel_translate_stencil_op(key->stencil_fail_op[0]);
170 cc.cc0.stencil_pass_depth_fail_op =
171 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[0]);
172 cc.cc0.stencil_pass_depth_pass_op =
173 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[0]);
174 cc.cc1.stencil_ref = key->stencil_ref[0];
175 cc.cc1.stencil_write_mask = key->stencil_write_mask[0];
176 cc.cc1.stencil_test_mask = key->stencil_test_mask[0];
177
178 if (key->stencil_two_side) {
179 cc.cc0.bf_stencil_enable = 1;
180 cc.cc0.bf_stencil_func =
181 intel_translate_compare_func(key->stencil_func[1]);
182 cc.cc0.bf_stencil_fail_op =
183 intel_translate_stencil_op(key->stencil_fail_op[1]);
184 cc.cc0.bf_stencil_pass_depth_fail_op =
185 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[1]);
186 cc.cc0.bf_stencil_pass_depth_pass_op =
187 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[1]);
188 cc.cc1.bf_stencil_ref = key->stencil_ref[1];
189 cc.cc2.bf_stencil_write_mask = key->stencil_write_mask[1];
190 cc.cc2.bf_stencil_test_mask = key->stencil_test_mask[1];
191 }
192
193 /* Not really sure about this:
194 */
195 if (key->stencil_write_mask[0] ||
196 (key->stencil_two_side && key->stencil_write_mask[1]))
197 cc.cc0.stencil_write_enable = 1;
198 }
199
200 /* _NEW_COLOR */
201 if (key->logic_op != GL_COPY) {
202 cc.cc2.logicop_enable = 1;
203 cc.cc5.logicop_func = intel_translate_logic_op(key->logic_op);
204 } else if (key->color_blend) {
205 GLenum eqRGB = key->blend_eq_rgb;
206 GLenum eqA = key->blend_eq_a;
207 GLenum srcRGB = key->blend_src_rgb;
208 GLenum dstRGB = key->blend_dst_rgb;
209 GLenum srcA = key->blend_src_a;
210 GLenum dstA = key->blend_dst_a;
211
212 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
213 srcRGB = dstRGB = GL_ONE;
214 }
215
216 if (eqA == GL_MIN || eqA == GL_MAX) {
217 srcA = dstA = GL_ONE;
218 }
219
220 cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
221 cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
222 cc.cc6.blend_function = brw_translate_blend_equation(eqRGB);
223
224 cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
225 cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
226 cc.cc5.ia_blend_function = brw_translate_blend_equation(eqA);
227
228 cc.cc3.blend_enable = 1;
229 cc.cc3.ia_blend_enable = (srcA != srcRGB ||
230 dstA != dstRGB ||
231 eqA != eqRGB);
232 }
233
234 if (key->alpha_enabled) {
235 cc.cc3.alpha_test = 1;
236 cc.cc3.alpha_test_func = intel_translate_compare_func(key->alpha_func);
237 cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
238
239 UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], key->alpha_ref);
240 }
241
242 if (key->dither) {
243 cc.cc5.dither_enable = 1;
244 cc.cc6.y_dither_offset = 0;
245 cc.cc6.x_dither_offset = 0;
246 }
247
248 /* _NEW_DEPTH */
249 if (key->depth_test) {
250 cc.cc2.depth_test = 1;
251 cc.cc2.depth_test_function = intel_translate_compare_func(key->depth_func);
252 cc.cc2.depth_write_enable = key->depth_write;
253 }
254
255 /* CACHE_NEW_CC_VP */
256 cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
257
258 if (INTEL_DEBUG & DEBUG_STATS)
259 cc.cc5.statistics_enable = 1;
260
261 bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
262 key, sizeof(*key),
263 &brw->cc.vp_bo, 1,
264 &cc, sizeof(cc),
265 NULL, NULL);
266
267 /* Emit CC viewport relocation */
268 dri_bo_emit_reloc(bo,
269 I915_GEM_DOMAIN_INSTRUCTION,
270 0,
271 0,
272 offsetof(struct brw_cc_unit_state, cc4),
273 brw->cc.vp_bo);
274
275 return bo;
276 }
277
278 static void prepare_cc_unit( struct brw_context *brw )
279 {
280 struct brw_cc_unit_key key;
281
282 cc_unit_populate_key(brw, &key);
283
284 dri_bo_unreference(brw->cc.state_bo);
285 brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
286 &key, sizeof(key),
287 &brw->cc.vp_bo, 1,
288 NULL);
289
290 if (brw->cc.state_bo == NULL)
291 brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
292 }
293
294 const struct brw_tracked_state brw_cc_unit = {
295 .dirty = {
296 .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH,
297 .brw = 0,
298 .cache = CACHE_NEW_CC_VP
299 },
300 .prepare = prepare_cc_unit,
301 };
302
303
304