Revert "Revert "Merge branch 'drm-gem'""
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cc.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
36 #include "brw_util.h"
37 #include "macros.h"
38 #include "enums.h"
39
40 static void prepare_cc_vp( struct brw_context *brw )
41 {
42 struct brw_cc_viewport ccv;
43
44 memset(&ccv, 0, sizeof(ccv));
45
46 ccv.min_depth = 0.0;
47 ccv.max_depth = 1.0;
48
49 dri_bo_unreference(brw->cc.vp_bo);
50 brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
51 }
52
53 const struct brw_tracked_state brw_cc_vp = {
54 .dirty = {
55 .mesa = 0,
56 .brw = BRW_NEW_CONTEXT,
57 .cache = 0
58 },
59 .prepare = prepare_cc_vp
60 };
61
62 struct brw_cc_unit_key {
63 GLboolean stencil, stencil_two_side, color_blend, alpha_enabled;
64
65 GLenum stencil_func[2], stencil_fail_op[2];
66 GLenum stencil_pass_depth_fail_op[2], stencil_pass_depth_pass_op[2];
67 GLubyte stencil_ref[2], stencil_write_mask[2], stencil_test_mask[2];
68 GLenum logic_op;
69
70 GLenum blend_eq_rgb, blend_eq_a;
71 GLenum blend_src_rgb, blend_src_a;
72 GLenum blend_dst_rgb, blend_dst_a;
73
74 GLenum alpha_func;
75 GLclampf alpha_ref;
76
77 GLboolean dither;
78
79 GLboolean depth_test, depth_write;
80 GLenum depth_func;
81 };
82
83 static void
84 cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
85 {
86 struct gl_stencil_attrib *stencil = brw->attribs.Stencil;
87
88 memset(key, 0, sizeof(*key));
89
90 key->stencil = stencil->Enabled;
91 key->stencil_two_side = stencil->_TestTwoSide;
92
93 if (key->stencil) {
94 key->stencil_func[0] = stencil->Function[0];
95 key->stencil_fail_op[0] = stencil->FailFunc[0];
96 key->stencil_pass_depth_fail_op[0] = stencil->ZFailFunc[0];
97 key->stencil_pass_depth_pass_op[0] = stencil->ZPassFunc[0];
98 key->stencil_ref[0] = stencil->Ref[0];
99 key->stencil_write_mask[0] = stencil->WriteMask[0];
100 key->stencil_test_mask[0] = stencil->ValueMask[0];
101 }
102 if (key->stencil_two_side) {
103 key->stencil_func[1] = stencil->Function[1];
104 key->stencil_fail_op[1] = stencil->FailFunc[1];
105 key->stencil_pass_depth_fail_op[1] = stencil->ZFailFunc[1];
106 key->stencil_pass_depth_pass_op[1] = stencil->ZPassFunc[1];
107 key->stencil_ref[1] = stencil->Ref[1];
108 key->stencil_write_mask[1] = stencil->WriteMask[1];
109 key->stencil_test_mask[1] = stencil->ValueMask[1];
110 }
111
112 if (brw->attribs.Color->_LogicOpEnabled)
113 key->logic_op = brw->attribs.Color->LogicOp;
114 else
115 key->logic_op = GL_COPY;
116
117 key->color_blend = brw->attribs.Color->BlendEnabled;
118 if (key->color_blend) {
119 key->blend_eq_rgb = brw->attribs.Color->BlendEquationRGB;
120 key->blend_eq_a = brw->attribs.Color->BlendEquationA;
121 key->blend_src_rgb = brw->attribs.Color->BlendSrcRGB;
122 key->blend_dst_rgb = brw->attribs.Color->BlendDstRGB;
123 key->blend_src_a = brw->attribs.Color->BlendSrcA;
124 key->blend_dst_a = brw->attribs.Color->BlendDstA;
125 }
126
127 key->alpha_enabled = brw->attribs.Color->AlphaEnabled;
128 if (key->alpha_enabled) {
129 key->alpha_func = brw->attribs.Color->AlphaFunc;
130 key->alpha_ref = brw->attribs.Color->AlphaRef;
131 }
132
133 key->dither = brw->attribs.Color->DitherFlag;
134
135 key->depth_test = brw->attribs.Depth->Test;
136 if (key->depth_test) {
137 key->depth_func = brw->attribs.Depth->Func;
138 key->depth_write = brw->attribs.Depth->Mask;
139 }
140 }
141
142 /**
143 * Creates the state cache entry for the given CC unit key.
144 */
145 static dri_bo *
146 cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
147 {
148 struct brw_cc_unit_state cc;
149 dri_bo *bo;
150
151 memset(&cc, 0, sizeof(cc));
152
153 /* _NEW_STENCIL */
154 if (key->stencil) {
155 cc.cc0.stencil_enable = 1;
156 cc.cc0.stencil_func =
157 intel_translate_compare_func(key->stencil_func[0]);
158 cc.cc0.stencil_fail_op =
159 intel_translate_stencil_op(key->stencil_fail_op[0]);
160 cc.cc0.stencil_pass_depth_fail_op =
161 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[0]);
162 cc.cc0.stencil_pass_depth_pass_op =
163 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[0]);
164 cc.cc1.stencil_ref = key->stencil_ref[0];
165 cc.cc1.stencil_write_mask = key->stencil_write_mask[0];
166 cc.cc1.stencil_test_mask = key->stencil_test_mask[0];
167
168 if (key->stencil_two_side) {
169 cc.cc0.bf_stencil_enable = 1;
170 cc.cc0.bf_stencil_func =
171 intel_translate_compare_func(key->stencil_func[1]);
172 cc.cc0.bf_stencil_fail_op =
173 intel_translate_stencil_op(key->stencil_fail_op[1]);
174 cc.cc0.bf_stencil_pass_depth_fail_op =
175 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[1]);
176 cc.cc0.bf_stencil_pass_depth_pass_op =
177 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[1]);
178 cc.cc1.bf_stencil_ref = key->stencil_ref[1];
179 cc.cc2.bf_stencil_write_mask = key->stencil_write_mask[1];
180 cc.cc2.bf_stencil_test_mask = key->stencil_test_mask[1];
181 }
182
183 /* Not really sure about this:
184 */
185 if (key->stencil_write_mask[0] ||
186 (key->stencil_two_side && key->stencil_write_mask[1]))
187 cc.cc0.stencil_write_enable = 1;
188 }
189
190 /* _NEW_COLOR */
191 if (key->logic_op != GL_COPY) {
192 cc.cc2.logicop_enable = 1;
193 cc.cc5.logicop_func = intel_translate_logic_op(key->logic_op);
194 } else if (key->color_blend) {
195 GLenum eqRGB = key->blend_eq_rgb;
196 GLenum eqA = key->blend_eq_a;
197 GLenum srcRGB = key->blend_src_rgb;
198 GLenum dstRGB = key->blend_dst_rgb;
199 GLenum srcA = key->blend_src_a;
200 GLenum dstA = key->blend_dst_a;
201
202 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
203 srcRGB = dstRGB = GL_ONE;
204 }
205
206 if (eqA == GL_MIN || eqA == GL_MAX) {
207 srcA = dstA = GL_ONE;
208 }
209
210 cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
211 cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
212 cc.cc6.blend_function = brw_translate_blend_equation(eqRGB);
213
214 cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
215 cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
216 cc.cc5.ia_blend_function = brw_translate_blend_equation(eqA);
217
218 cc.cc3.blend_enable = 1;
219 cc.cc3.ia_blend_enable = (srcA != srcRGB ||
220 dstA != dstRGB ||
221 eqA != eqRGB);
222 }
223
224 if (key->alpha_enabled) {
225 cc.cc3.alpha_test = 1;
226 cc.cc3.alpha_test_func = intel_translate_compare_func(key->alpha_func);
227 cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
228
229 UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], key->alpha_ref);
230 }
231
232 if (key->dither) {
233 cc.cc5.dither_enable = 1;
234 cc.cc6.y_dither_offset = 0;
235 cc.cc6.x_dither_offset = 0;
236 }
237
238 /* _NEW_DEPTH */
239 if (key->depth_test) {
240 cc.cc2.depth_test = 1;
241 cc.cc2.depth_test_function = intel_translate_compare_func(key->depth_func);
242 cc.cc2.depth_write_enable = key->depth_write;
243 }
244
245 /* CACHE_NEW_CC_VP */
246 cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
247
248 if (INTEL_DEBUG & DEBUG_STATS)
249 cc.cc5.statistics_enable = 1;
250
251 bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
252 key, sizeof(*key),
253 &brw->cc.vp_bo, 1,
254 &cc, sizeof(cc),
255 NULL, NULL);
256
257 /* Emit CC viewport relocation */
258 intel_bo_emit_reloc(bo,
259 I915_GEM_DOMAIN_INSTRUCTION,
260 0,
261 0,
262 offsetof(struct brw_cc_unit_state, cc4),
263 brw->cc.vp_bo);
264
265 return bo;
266 }
267
268 static void prepare_cc_unit( struct brw_context *brw )
269 {
270 struct brw_cc_unit_key key;
271
272 cc_unit_populate_key(brw, &key);
273
274 dri_bo_unreference(brw->cc.state_bo);
275 brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
276 &key, sizeof(key),
277 &brw->cc.vp_bo, 1,
278 NULL);
279
280 if (brw->cc.state_bo == NULL)
281 brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
282 }
283
284 const struct brw_tracked_state brw_cc_unit = {
285 .dirty = {
286 .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH,
287 .brw = 0,
288 .cache = CACHE_NEW_CC_VP
289 },
290 .prepare = prepare_cc_unit,
291 };
292
293
294