Merge branch 'softpipe-opt'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_cc.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
36 #include "brw_util.h"
37 #include "main/macros.h"
38 #include "main/enums.h"
39
40 static void prepare_cc_vp( struct brw_context *brw )
41 {
42 GLcontext *ctx = &brw->intel.ctx;
43 struct brw_cc_viewport ccv;
44
45 memset(&ccv, 0, sizeof(ccv));
46
47 /* _NEW_VIEWPORT */
48 ccv.min_depth = ctx->Viewport.Near;
49 ccv.max_depth = ctx->Viewport.Far;
50
51 dri_bo_unreference(brw->cc.vp_bo);
52 brw->cc.vp_bo = brw_cache_data( &brw->cache, BRW_CC_VP, &ccv, NULL, 0 );
53 }
54
55 const struct brw_tracked_state brw_cc_vp = {
56 .dirty = {
57 .mesa = _NEW_VIEWPORT,
58 .brw = BRW_NEW_CONTEXT,
59 .cache = 0
60 },
61 .prepare = prepare_cc_vp
62 };
63
64 struct brw_cc_unit_key {
65 GLboolean stencil, stencil_two_side, color_blend, alpha_enabled;
66
67 GLenum stencil_func[2], stencil_fail_op[2];
68 GLenum stencil_pass_depth_fail_op[2], stencil_pass_depth_pass_op[2];
69 GLubyte stencil_ref[2], stencil_write_mask[2], stencil_test_mask[2];
70 GLenum logic_op;
71
72 GLenum blend_eq_rgb, blend_eq_a;
73 GLenum blend_src_rgb, blend_src_a;
74 GLenum blend_dst_rgb, blend_dst_a;
75
76 GLenum alpha_func;
77 GLclampf alpha_ref;
78
79 GLboolean dither;
80
81 GLboolean depth_test, depth_write;
82 GLenum depth_func;
83 };
84
85 static void
86 cc_unit_populate_key(struct brw_context *brw, struct brw_cc_unit_key *key)
87 {
88 GLcontext *ctx = &brw->intel.ctx;
89 const unsigned back = ctx->Stencil._BackFace;
90
91 memset(key, 0, sizeof(*key));
92
93 key->stencil = ctx->Stencil._Enabled;
94 key->stencil_two_side = ctx->Stencil._TestTwoSide;
95
96 if (key->stencil) {
97 key->stencil_func[0] = ctx->Stencil.Function[0];
98 key->stencil_fail_op[0] = ctx->Stencil.FailFunc[0];
99 key->stencil_pass_depth_fail_op[0] = ctx->Stencil.ZFailFunc[0];
100 key->stencil_pass_depth_pass_op[0] = ctx->Stencil.ZPassFunc[0];
101 key->stencil_ref[0] = ctx->Stencil.Ref[0];
102 key->stencil_write_mask[0] = ctx->Stencil.WriteMask[0];
103 key->stencil_test_mask[0] = ctx->Stencil.ValueMask[0];
104 }
105 if (key->stencil_two_side) {
106 key->stencil_func[1] = ctx->Stencil.Function[back];
107 key->stencil_fail_op[1] = ctx->Stencil.FailFunc[back];
108 key->stencil_pass_depth_fail_op[1] = ctx->Stencil.ZFailFunc[back];
109 key->stencil_pass_depth_pass_op[1] = ctx->Stencil.ZPassFunc[back];
110 key->stencil_ref[1] = ctx->Stencil.Ref[back];
111 key->stencil_write_mask[1] = ctx->Stencil.WriteMask[back];
112 key->stencil_test_mask[1] = ctx->Stencil.ValueMask[back];
113 }
114
115 if (ctx->Color._LogicOpEnabled)
116 key->logic_op = ctx->Color.LogicOp;
117 else
118 key->logic_op = GL_COPY;
119
120 key->color_blend = ctx->Color.BlendEnabled;
121 if (key->color_blend) {
122 key->blend_eq_rgb = ctx->Color.BlendEquationRGB;
123 key->blend_eq_a = ctx->Color.BlendEquationA;
124 key->blend_src_rgb = ctx->Color.BlendSrcRGB;
125 key->blend_dst_rgb = ctx->Color.BlendDstRGB;
126 key->blend_src_a = ctx->Color.BlendSrcA;
127 key->blend_dst_a = ctx->Color.BlendDstA;
128 }
129
130 key->alpha_enabled = ctx->Color.AlphaEnabled;
131 if (key->alpha_enabled) {
132 key->alpha_func = ctx->Color.AlphaFunc;
133 key->alpha_ref = ctx->Color.AlphaRef;
134 }
135
136 key->dither = ctx->Color.DitherFlag;
137
138 key->depth_test = ctx->Depth.Test;
139 if (key->depth_test) {
140 key->depth_func = ctx->Depth.Func;
141 key->depth_write = ctx->Depth.Mask;
142 }
143 }
144
145 /**
146 * Creates the state cache entry for the given CC unit key.
147 */
148 static dri_bo *
149 cc_unit_create_from_key(struct brw_context *brw, struct brw_cc_unit_key *key)
150 {
151 struct brw_cc_unit_state cc;
152 dri_bo *bo;
153
154 memset(&cc, 0, sizeof(cc));
155
156 /* _NEW_STENCIL */
157 if (key->stencil) {
158 cc.cc0.stencil_enable = 1;
159 cc.cc0.stencil_func =
160 intel_translate_compare_func(key->stencil_func[0]);
161 cc.cc0.stencil_fail_op =
162 intel_translate_stencil_op(key->stencil_fail_op[0]);
163 cc.cc0.stencil_pass_depth_fail_op =
164 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[0]);
165 cc.cc0.stencil_pass_depth_pass_op =
166 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[0]);
167 cc.cc1.stencil_ref = key->stencil_ref[0];
168 cc.cc1.stencil_write_mask = key->stencil_write_mask[0];
169 cc.cc1.stencil_test_mask = key->stencil_test_mask[0];
170
171 if (key->stencil_two_side) {
172 cc.cc0.bf_stencil_enable = 1;
173 cc.cc0.bf_stencil_func =
174 intel_translate_compare_func(key->stencil_func[1]);
175 cc.cc0.bf_stencil_fail_op =
176 intel_translate_stencil_op(key->stencil_fail_op[1]);
177 cc.cc0.bf_stencil_pass_depth_fail_op =
178 intel_translate_stencil_op(key->stencil_pass_depth_fail_op[1]);
179 cc.cc0.bf_stencil_pass_depth_pass_op =
180 intel_translate_stencil_op(key->stencil_pass_depth_pass_op[1]);
181 cc.cc1.bf_stencil_ref = key->stencil_ref[1];
182 cc.cc2.bf_stencil_write_mask = key->stencil_write_mask[1];
183 cc.cc2.bf_stencil_test_mask = key->stencil_test_mask[1];
184 }
185
186 /* Not really sure about this:
187 */
188 if (key->stencil_write_mask[0] ||
189 (key->stencil_two_side && key->stencil_write_mask[1]))
190 cc.cc0.stencil_write_enable = 1;
191 }
192
193 /* _NEW_COLOR */
194 if (key->logic_op != GL_COPY) {
195 cc.cc2.logicop_enable = 1;
196 cc.cc5.logicop_func = intel_translate_logic_op(key->logic_op);
197 } else if (key->color_blend) {
198 GLenum eqRGB = key->blend_eq_rgb;
199 GLenum eqA = key->blend_eq_a;
200 GLenum srcRGB = key->blend_src_rgb;
201 GLenum dstRGB = key->blend_dst_rgb;
202 GLenum srcA = key->blend_src_a;
203 GLenum dstA = key->blend_dst_a;
204
205 if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
206 srcRGB = dstRGB = GL_ONE;
207 }
208
209 if (eqA == GL_MIN || eqA == GL_MAX) {
210 srcA = dstA = GL_ONE;
211 }
212
213 cc.cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB);
214 cc.cc6.src_blend_factor = brw_translate_blend_factor(srcRGB);
215 cc.cc6.blend_function = brw_translate_blend_equation(eqRGB);
216
217 cc.cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
218 cc.cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA);
219 cc.cc5.ia_blend_function = brw_translate_blend_equation(eqA);
220
221 cc.cc3.blend_enable = 1;
222 cc.cc3.ia_blend_enable = (srcA != srcRGB ||
223 dstA != dstRGB ||
224 eqA != eqRGB);
225 }
226
227 if (key->alpha_enabled) {
228 cc.cc3.alpha_test = 1;
229 cc.cc3.alpha_test_func = intel_translate_compare_func(key->alpha_func);
230 cc.cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
231
232 UNCLAMPED_FLOAT_TO_UBYTE(cc.cc7.alpha_ref.ub[0], key->alpha_ref);
233 }
234
235 if (key->dither) {
236 cc.cc5.dither_enable = 1;
237 cc.cc6.y_dither_offset = 0;
238 cc.cc6.x_dither_offset = 0;
239 }
240
241 /* _NEW_DEPTH */
242 if (key->depth_test) {
243 cc.cc2.depth_test = 1;
244 cc.cc2.depth_test_function = intel_translate_compare_func(key->depth_func);
245 cc.cc2.depth_write_enable = key->depth_write;
246 }
247
248 /* CACHE_NEW_CC_VP */
249 cc.cc4.cc_viewport_state_offset = brw->cc.vp_bo->offset >> 5; /* reloc */
250
251 if (INTEL_DEBUG & DEBUG_STATS)
252 cc.cc5.statistics_enable = 1;
253
254 bo = brw_upload_cache(&brw->cache, BRW_CC_UNIT,
255 key, sizeof(*key),
256 &brw->cc.vp_bo, 1,
257 &cc, sizeof(cc),
258 NULL, NULL);
259
260 /* Emit CC viewport relocation */
261 dri_bo_emit_reloc(bo,
262 I915_GEM_DOMAIN_INSTRUCTION,
263 0,
264 0,
265 offsetof(struct brw_cc_unit_state, cc4),
266 brw->cc.vp_bo);
267
268 return bo;
269 }
270
271 static void prepare_cc_unit( struct brw_context *brw )
272 {
273 struct brw_cc_unit_key key;
274
275 cc_unit_populate_key(brw, &key);
276
277 dri_bo_unreference(brw->cc.state_bo);
278 brw->cc.state_bo = brw_search_cache(&brw->cache, BRW_CC_UNIT,
279 &key, sizeof(key),
280 &brw->cc.vp_bo, 1,
281 NULL);
282
283 if (brw->cc.state_bo == NULL)
284 brw->cc.state_bo = cc_unit_create_from_key(brw, &key);
285 }
286
287 const struct brw_tracked_state brw_cc_unit = {
288 .dirty = {
289 .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH,
290 .brw = 0,
291 .cache = CACHE_NEW_CC_VP
292 },
293 .prepare = prepare_cc_unit,
294 };
295
296
297