604a68037bbf9cb376668202dcc61778d0fa21cf
1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * Copyright 2009 Intel Corporation.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
29 #include "main/glheader.h"
30 #include "main/mtypes.h"
31 #include "main/condrender.h"
32 #include "swrast/swrast.h"
33 #include "drivers/common/meta.h"
35 #include "intel_context.h"
36 #include "intel_blit.h"
37 #include "intel_clear.h"
38 #include "intel_fbo.h"
39 #include "intel_regions.h"
41 #define FILE_DEBUG_FLAG DEBUG_BLIT
43 static const char *buffer_names
[] = {
44 [BUFFER_FRONT_LEFT
] = "front",
45 [BUFFER_BACK_LEFT
] = "back",
46 [BUFFER_FRONT_RIGHT
] = "front right",
47 [BUFFER_BACK_RIGHT
] = "back right",
48 [BUFFER_DEPTH
] = "depth",
49 [BUFFER_STENCIL
] = "stencil",
50 [BUFFER_ACCUM
] = "accum",
51 [BUFFER_AUX0
] = "aux0",
52 [BUFFER_COLOR0
] = "color0",
53 [BUFFER_COLOR1
] = "color1",
54 [BUFFER_COLOR2
] = "color2",
55 [BUFFER_COLOR3
] = "color3",
56 [BUFFER_COLOR4
] = "color4",
57 [BUFFER_COLOR5
] = "color5",
58 [BUFFER_COLOR6
] = "color6",
59 [BUFFER_COLOR7
] = "color7",
63 debug_mask(const char *name
, GLbitfield mask
)
67 if (unlikely(INTEL_DEBUG
& DEBUG_BLIT
)) {
68 DBG("%s clear:", name
);
69 for (i
= 0; i
< BUFFER_COUNT
; i
++) {
71 DBG(" %s", buffer_names
[i
]);
78 * Called by ctx->Driver.Clear.
81 intelClear(struct gl_context
*ctx
, GLbitfield mask
)
83 struct intel_context
*intel
= intel_context(ctx
);
84 const GLuint colorMask
= *((GLuint
*) & ctx
->Color
.ColorMask
[0]);
85 GLbitfield tri_mask
= 0;
86 GLbitfield blit_mask
= 0;
87 GLbitfield swrast_mask
= 0;
88 struct gl_framebuffer
*fb
= ctx
->DrawBuffer
;
89 struct intel_renderbuffer
*irb
;
92 if (!_mesa_check_conditional_render(ctx
))
95 if (mask
& (BUFFER_BIT_FRONT_LEFT
| BUFFER_BIT_FRONT_RIGHT
)) {
96 intel
->front_buffer_dirty
= true;
100 fprintf(stderr
, "%s\n", __FUNCTION__
);
102 /* Get SW clears out of the way: Anything without an intel_renderbuffer */
103 for (i
= 0; i
< BUFFER_COUNT
; i
++) {
104 if (!(mask
& (1 << i
)))
107 irb
= intel_get_renderbuffer(fb
, i
);
108 if (unlikely(!irb
)) {
109 swrast_mask
|= (1 << i
);
113 if (unlikely(swrast_mask
)) {
114 debug_mask("swrast", swrast_mask
);
115 _swrast_Clear(ctx
, swrast_mask
);
118 /* HW color buffers (front, back, aux, generic FBO, etc) */
119 if (intel
->gen
< 6 && colorMask
== ~0) {
120 /* clear all R,G,B,A */
121 blit_mask
|= (mask
& BUFFER_BITS_COLOR
);
124 /* glColorMask in effect */
125 tri_mask
|= (mask
& BUFFER_BITS_COLOR
);
128 /* Make sure we have up to date buffers before we start looking at
129 * the tiling bits to determine how to clear. */
130 intel_prepare_render(intel
);
133 if (mask
& BUFFER_BIT_STENCIL
) {
134 const struct intel_region
*stencilRegion
135 = intel_get_rb_region(fb
, BUFFER_STENCIL
);
137 /* have hw stencil */
138 if (stencilRegion
->tiling
== I915_TILING_Y
||
139 (ctx
->Stencil
.WriteMask
[0] & 0xff) != 0xff) {
140 /* We have to use the 3D engine if we're clearing a partial mask
141 * of the stencil buffer, or if we're on a 965 which has a tiled
142 * depth/stencil buffer in a layout we can't blit to.
144 tri_mask
|= BUFFER_BIT_STENCIL
;
146 else if (intel
->has_separate_stencil
&&
147 stencilRegion
->tiling
== I915_TILING_NONE
) {
148 /* The stencil buffer is actually W tiled, which the hardware
150 tri_mask
|= BUFFER_BIT_STENCIL
;
153 /* clearing all stencil bits, use blitting */
154 blit_mask
|= BUFFER_BIT_STENCIL
;
160 if (mask
& BUFFER_BIT_DEPTH
) {
161 const struct intel_region
*irb
= intel_get_rb_region(fb
, BUFFER_DEPTH
);
163 /* clear depth with whatever method is used for stencil (see above) */
164 if (irb
->tiling
== I915_TILING_Y
|| tri_mask
& BUFFER_BIT_STENCIL
)
165 tri_mask
|= BUFFER_BIT_DEPTH
;
167 blit_mask
|= BUFFER_BIT_DEPTH
;
170 /* If we're doing a tri pass for depth/stencil, include a likely color
173 if (mask
& (BUFFER_BIT_DEPTH
| BUFFER_BIT_STENCIL
)) {
174 int color_bit
= ffs(mask
& BUFFER_BITS_COLOR
);
175 if (color_bit
!= 0) {
176 tri_mask
|= blit_mask
& (1 << (color_bit
- 1));
177 blit_mask
&= ~(1 << (color_bit
- 1));
181 /* Anything left, just use tris */
182 tri_mask
|= mask
& ~blit_mask
;
185 debug_mask("blit", blit_mask
);
186 tri_mask
|= intelClearWithBlit(ctx
, blit_mask
);
190 debug_mask("tri", tri_mask
);
191 _mesa_meta_glsl_Clear(&intel
->ctx
, tri_mask
);
197 intelInitClearFuncs(struct dd_function_table
*functions
)
199 functions
->Clear
= intelClear
;