src/mesa/drivers/dri/i965/brw_clear.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * Copyright 2009, 2012 Intel Corporation.
   5  * All Rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #include "main/glheader.h"
  30 #include "main/mtypes.h"
  31 #include "main/condrender.h"
  32 #include "swrast/swrast.h"
  33 #include "drivers/common/meta.h"
  34
  35 #include "intel_batchbuffer.h"
  36 #include "intel_context.h"
  37 #include "intel_blit.h"
  38 #include "intel_clear.h"
  39 #include "intel_fbo.h"
  40 #include "intel_mipmap_tree.h"
  41 #include "intel_regions.h"
  42
  43 #include "brw_context.h"
  44 #include "brw_blorp.h"
  45
  46 #define FILE_DEBUG_FLAG DEBUG_BLIT
  47
  48 static const char *buffer_names[] = {
  49    [BUFFER_FRONT_LEFT] = "front",
  50    [BUFFER_BACK_LEFT] = "back",
  51    [BUFFER_FRONT_RIGHT] = "front right",
  52    [BUFFER_BACK_RIGHT] = "back right",
  53    [BUFFER_DEPTH] = "depth",
  54    [BUFFER_STENCIL] = "stencil",
  55    [BUFFER_ACCUM] = "accum",
  56    [BUFFER_AUX0] = "aux0",
  57    [BUFFER_COLOR0] = "color0",
  58    [BUFFER_COLOR1] = "color1",
  59    [BUFFER_COLOR2] = "color2",
  60    [BUFFER_COLOR3] = "color3",
  61    [BUFFER_COLOR4] = "color4",
  62    [BUFFER_COLOR5] = "color5",
  63    [BUFFER_COLOR6] = "color6",
  64    [BUFFER_COLOR7] = "color7",
  65 };
  66
  67 static void
  68 debug_mask(const char *name, GLbitfield mask)
  69 {
  70    GLuint i;
  71
  72    if (unlikely(INTEL_DEBUG & DEBUG_BLIT)) {
  73       DBG("%s clear:", name);
  74       for (i = 0; i < BUFFER_COUNT; i++) {
  75          if (mask & (1 << i))
  76             DBG(" %s", buffer_names[i]);
  77       }
  78       DBG("\n");
  79    }
  80 }
  81
  82 /**
  83  * Returns true if the scissor is a noop (cuts out nothing).
  84  */
  85 static bool
  86 noop_scissor(struct gl_context *ctx, struct gl_framebuffer *fb)
  87 {
  88    return ctx->Scissor.X <= 0 &&
  89           ctx->Scissor.Y <= 0 &&
  90           ctx->Scissor.Width >= fb->Width &&
  91           ctx->Scissor.Height >= fb->Height;
  92 }
  93
  94 /**
  95  * Implements fast depth clears on gen6+.
  96  *
  97  * Fast clears basically work by setting a flag in each of the subspans
  98  * represented in the HiZ buffer that says "When you need the depth values for
  99  * this subspan, it's the hardware's current clear value."  Then later rendering
 100  * can just use the static clear value instead of referencing memory.
 101  *
 102  * The tricky part of the implementation is that you have to have the clear
 103  * value that was used on the depth buffer in place for all further rendering,
 104  * at least until a resolve to the real depth buffer happens.
 105  */
 106 static bool
 107 brw_fast_clear_depth(struct gl_context *ctx)
 108 {
 109    struct intel_context *intel = intel_context(ctx);
 110    struct gl_framebuffer *fb = ctx->DrawBuffer;
 111    struct intel_renderbuffer *depth_irb =
 112       intel_get_renderbuffer(fb, BUFFER_DEPTH);
 113    struct intel_mipmap_tree *mt = depth_irb->mt;
 114
 115    if (intel->gen < 6)
 116       return false;
 117
 118    if (!intel_renderbuffer_has_hiz(depth_irb))
 119       return false;
 120
 121    /* We only handle full buffer clears -- otherwise you'd have to track whether
 122     * a previous clear had happened at a different clear value and resolve it
 123     * first.
 124     */
 125    if (ctx->Scissor.Enabled && !noop_scissor(ctx, fb)) {
 126       perf_debug("Failed to fast clear depth due to scissor being enabled.  "
 127                  "Possible 5%% performance win if avoided.\n");
 128       return false;
 129    }
 130
 131    uint32_t depth_clear_value;
 132    switch (mt->format) {
 133    case MESA_FORMAT_Z32_FLOAT_X24S8:
 134    case MESA_FORMAT_S8_Z24:
 135       /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
 136        *
 137        *     "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be
 138        *      enabled (the legacy method of clearing must be performed):
 139        *
 140        *      - If the depth buffer format is D32_FLOAT_S8X24_UINT or
 141        *        D24_UNORM_S8_UINT.
 142        */
 143       return false;
 144
 145    case MESA_FORMAT_Z32_FLOAT:
 146       depth_clear_value = float_as_int(ctx->Depth.Clear);
 147       break;
 148
 149    case MESA_FORMAT_Z16:
 150       /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
 151        *
 152        *     "[DevSNB+]: Several cases exist where Depth Buffer Clear cannot be
 153        *      enabled (the legacy method of clearing must be performed):
 154        *
 155        *      - DevSNB{W/A}]: When depth buffer format is D16_UNORM and the
 156        *        width of the map (LOD0) is not multiple of 16, fast clear
 157        *        optimization must be disabled.
 158        */
 159       if (intel->gen == 6 && (mt->level[depth_irb->mt_level].width % 16) != 0)
 160          return false;
 161       /* FALLTHROUGH */
 162
 163    default:
 164       depth_clear_value = fb->_DepthMax * ctx->Depth.Clear;
 165       break;
 166    }
 167
 168    /* If we're clearing to a new clear value, then we need to resolve any clear
 169     * flags out of the HiZ buffer into the real depth buffer.
 170     */
 171    if (mt->depth_clear_value != depth_clear_value) {
 172       intel_miptree_all_slices_resolve_depth(intel, mt);
 173       mt->depth_clear_value = depth_clear_value;
 174    }
 175
 176    /* From the Sandy Bridge PRM, volume 2 part 1, page 313:
 177     *
 178     *     "If other rendering operations have preceded this clear, a
 179     *      PIPE_CONTROL with write cache flush enabled and Z-inhibit disabled
 180     *      must be issued before the rectangle primitive used for the depth
 181     *      buffer clear operation.
 182     */
 183    intel_batchbuffer_emit_mi_flush(intel);
 184
 185    intel_hiz_exec(intel, mt, depth_irb->mt_level, depth_irb->mt_layer,
 186                   GEN6_HIZ_OP_DEPTH_CLEAR);
 187
 188    if (intel->gen == 6) {
 189       /* From the Sandy Bridge PRM, volume 2 part 1, page 314:
 190        *
 191        *     "DevSNB, DevSNB-B{W/A}]: Depth buffer clear pass must be followed
 192        *      by a PIPE_CONTROL command with DEPTH_STALL bit set and Then
 193        *      followed by Depth FLUSH'
 194       */
 195       intel_batchbuffer_emit_mi_flush(intel);
 196    }
 197
 198    /* Now, the HiZ buffer contains data that needs to be resolved to the depth
 199     * buffer.
 200     */
 201    intel_renderbuffer_set_needs_depth_resolve(depth_irb);
 202
 203    return true;
 204 }
 205
 206 /**
 207  * Called by ctx->Driver.Clear.
 208  */
 209 static void
 210 brw_clear(struct gl_context *ctx, GLbitfield mask)
 211 {
 212    struct brw_context *brw = brw_context(ctx);
 213    struct intel_context *intel = &brw->intel;
 214    struct gl_framebuffer *fb = ctx->DrawBuffer;
 215    bool partial_clear = ctx->Scissor.Enabled && !noop_scissor(ctx, fb);
 216
 217    if (!_mesa_check_conditional_render(ctx))
 218       return;
 219
 220    if (mask & (BUFFER_BIT_FRONT_LEFT | BUFFER_BIT_FRONT_RIGHT)) {
 221       intel->front_buffer_dirty = true;
 222    }
 223
 224    intel_prepare_render(intel);
 225    brw_workaround_depthstencil_alignment(brw, partial_clear ? 0 : mask);
 226
 227    if (mask & BUFFER_BIT_DEPTH) {
 228       if (brw_fast_clear_depth(ctx)) {
 229          DBG("fast clear: depth\n");
 230          mask &= ~BUFFER_BIT_DEPTH;
 231       }
 232    }
 233
 234    /* BLORP is currently only supported on Gen6+. */
 235    if (intel->gen >= 6) {
 236       if (mask & BUFFER_BITS_COLOR) {
 237          if (brw_blorp_clear_color(intel, fb)) {
 238             debug_mask("blorp color", mask & BUFFER_BITS_COLOR);
 239             mask &= ~BUFFER_BITS_COLOR;
 240          }
 241       }
 242    }
 243
 244    GLbitfield tri_mask = mask & (BUFFER_BITS_COLOR |
 245                                  BUFFER_BIT_STENCIL |
 246                                  BUFFER_BIT_DEPTH);
 247
 248    if (tri_mask) {
 249       debug_mask("tri", tri_mask);
 250       mask &= ~tri_mask;
 251
 252       if (ctx->API == API_OPENGLES) {
 253          _mesa_meta_Clear(&intel->ctx, tri_mask);
 254       } else {
 255          _mesa_meta_glsl_Clear(&intel->ctx, tri_mask);
 256       }
 257    }
 258
 259    /* Any strange buffers get passed off to swrast */
 260    if (mask) {
 261       debug_mask("swrast", mask);
 262       _swrast_Clear(ctx, mask);
 263    }
 264 }
 265
 266
 267 void
 268 intelInitClearFuncs(struct dd_function_table *functions)
 269 {
 270    functions->Clear = brw_clear;
 271 }