i965/gen5+: Fix incorrect miptree layout for non-power-of-two cubemaps.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35
36 #include "intel_batchbuffer.h"
37
38 #include "brw_defines.h"
39 #include "brw_context.h"
40 #include "brw_eu.h"
41 #include "brw_util.h"
42 #include "brw_state.h"
43 #include "brw_clip.h"
44
45 #include "../glsl/ralloc.h"
46
47 #define FRONT_UNFILLED_BIT 0x1
48 #define BACK_UNFILLED_BIT 0x2
49
50
51 static void compile_clip_prog( struct brw_context *brw,
52 struct brw_clip_prog_key *key )
53 {
54 struct intel_context *intel = &brw->intel;
55 struct brw_clip_compile c;
56 const GLuint *program;
57 void *mem_ctx;
58 GLuint program_size;
59 GLuint delta;
60 GLuint i;
61 GLuint header_regs;
62
63 memset(&c, 0, sizeof(c));
64
65 mem_ctx = ralloc_context(NULL);
66
67 /* Begin the compilation:
68 */
69 brw_init_compile(brw, &c.func, mem_ctx);
70
71 c.func.single_program_flow = 1;
72
73 c.key = *key;
74
75 /* Need to locate the two positions present in vertex + header.
76 * These are currently hardcoded:
77 */
78 c.header_position_offset = ATTR_SIZE;
79
80 if (intel->gen == 5)
81 header_regs = 3;
82 else
83 header_regs = 1;
84
85 delta = header_regs * REG_SIZE;
86
87 for (i = 0; i < VERT_RESULT_MAX; i++) {
88 if (c.key.attrs & BITFIELD64_BIT(i)) {
89 c.offset[i] = delta;
90 delta += ATTR_SIZE;
91
92 c.idx_to_attr[c.nr_attrs] = i;
93 c.nr_attrs++;
94 }
95 }
96
97 /* The vertex attributes start at a URB row-aligned offset after
98 * the 8-20 dword vertex header, and continue for a URB row-aligned
99 * length. nr_regs determines the urb_read_length from the start
100 * of the header to the end of the vertex data.
101 */
102 c.nr_regs = header_regs + (c.nr_attrs + 1) / 2;
103
104 c.nr_bytes = c.nr_regs * REG_SIZE;
105
106 c.prog_data.clip_mode = c.key.clip_mode; /* XXX */
107
108 /* For some reason the thread is spawned with only 4 channels
109 * unmasked.
110 */
111 brw_set_mask_control(&c.func, BRW_MASK_DISABLE);
112
113
114 /* Would ideally have the option of producing a program which could
115 * do all three:
116 */
117 switch (key->primitive) {
118 case GL_TRIANGLES:
119 if (key->do_unfilled)
120 brw_emit_unfilled_clip( &c );
121 else
122 brw_emit_tri_clip( &c );
123 break;
124 case GL_LINES:
125 brw_emit_line_clip( &c );
126 break;
127 case GL_POINTS:
128 brw_emit_point_clip( &c );
129 break;
130 default:
131 assert(0);
132 return;
133 }
134
135
136
137 /* get the program
138 */
139 program = brw_get_program(&c.func, &program_size);
140
141 if (unlikely(INTEL_DEBUG & DEBUG_CLIP)) {
142 printf("clip:\n");
143 for (i = 0; i < program_size / sizeof(struct brw_instruction); i++)
144 brw_disasm(stdout, &((struct brw_instruction *)program)[i],
145 intel->gen);
146 printf("\n");
147 }
148
149 brw_upload_cache(&brw->cache,
150 BRW_CLIP_PROG,
151 &c.key, sizeof(c.key),
152 program, program_size,
153 &c.prog_data, sizeof(c.prog_data),
154 &brw->clip.prog_offset, &brw->clip.prog_data);
155 ralloc_free(mem_ctx);
156 }
157
158 /* Calculate interpolants for triangle and line rasterization.
159 */
160 static void upload_clip_prog(struct brw_context *brw)
161 {
162 struct intel_context *intel = &brw->intel;
163 struct gl_context *ctx = &intel->ctx;
164 struct brw_clip_prog_key key;
165
166 memset(&key, 0, sizeof(key));
167
168 /* Populate the key:
169 */
170 /* BRW_NEW_REDUCED_PRIMITIVE */
171 key.primitive = brw->intel.reduced_primitive;
172 /* CACHE_NEW_VS_PROG */
173 key.attrs = brw->vs.prog_data->outputs_written;
174 /* _NEW_LIGHT */
175 key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT);
176 key.pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION);
177 /* _NEW_TRANSFORM */
178 key.nr_userclip = brw_count_bits(ctx->Transform.ClipPlanesEnabled);
179
180 if (intel->gen == 5)
181 key.clip_mode = BRW_CLIPMODE_KERNEL_CLIP;
182 else
183 key.clip_mode = BRW_CLIPMODE_NORMAL;
184
185 /* _NEW_POLYGON */
186 if (key.primitive == GL_TRIANGLES) {
187 if (ctx->Polygon.CullFlag &&
188 ctx->Polygon.CullFaceMode == GL_FRONT_AND_BACK)
189 key.clip_mode = BRW_CLIPMODE_REJECT_ALL;
190 else {
191 GLuint fill_front = CLIP_CULL;
192 GLuint fill_back = CLIP_CULL;
193 GLuint offset_front = 0;
194 GLuint offset_back = 0;
195
196 if (!ctx->Polygon.CullFlag ||
197 ctx->Polygon.CullFaceMode != GL_FRONT) {
198 switch (ctx->Polygon.FrontMode) {
199 case GL_FILL:
200 fill_front = CLIP_FILL;
201 offset_front = 0;
202 break;
203 case GL_LINE:
204 fill_front = CLIP_LINE;
205 offset_front = ctx->Polygon.OffsetLine;
206 break;
207 case GL_POINT:
208 fill_front = CLIP_POINT;
209 offset_front = ctx->Polygon.OffsetPoint;
210 break;
211 }
212 }
213
214 if (!ctx->Polygon.CullFlag ||
215 ctx->Polygon.CullFaceMode != GL_BACK) {
216 switch (ctx->Polygon.BackMode) {
217 case GL_FILL:
218 fill_back = CLIP_FILL;
219 offset_back = 0;
220 break;
221 case GL_LINE:
222 fill_back = CLIP_LINE;
223 offset_back = ctx->Polygon.OffsetLine;
224 break;
225 case GL_POINT:
226 fill_back = CLIP_POINT;
227 offset_back = ctx->Polygon.OffsetPoint;
228 break;
229 }
230 }
231
232 if (ctx->Polygon.BackMode != GL_FILL ||
233 ctx->Polygon.FrontMode != GL_FILL) {
234 key.do_unfilled = 1;
235
236 /* Most cases the fixed function units will handle. Cases where
237 * one or more polygon faces are unfilled will require help:
238 */
239 key.clip_mode = BRW_CLIPMODE_CLIP_NON_REJECTED;
240
241 if (offset_back || offset_front) {
242 /* _NEW_POLYGON, _NEW_BUFFERS */
243 key.offset_units = ctx->Polygon.OffsetUnits * brw->intel.polygon_offset_scale;
244 key.offset_factor = ctx->Polygon.OffsetFactor * ctx->DrawBuffer->_MRD;
245 }
246
247 switch (ctx->Polygon.FrontFace) {
248 case GL_CCW:
249 key.fill_ccw = fill_front;
250 key.fill_cw = fill_back;
251 key.offset_ccw = offset_front;
252 key.offset_cw = offset_back;
253 if (ctx->Light.Model.TwoSide &&
254 key.fill_cw != CLIP_CULL)
255 key.copy_bfc_cw = 1;
256 break;
257 case GL_CW:
258 key.fill_cw = fill_front;
259 key.fill_ccw = fill_back;
260 key.offset_cw = offset_front;
261 key.offset_ccw = offset_back;
262 if (ctx->Light.Model.TwoSide &&
263 key.fill_ccw != CLIP_CULL)
264 key.copy_bfc_ccw = 1;
265 break;
266 }
267 }
268 }
269 }
270
271 if (!brw_search_cache(&brw->cache, BRW_CLIP_PROG,
272 &key, sizeof(key),
273 &brw->clip.prog_offset, &brw->clip.prog_data)) {
274 compile_clip_prog( brw, &key );
275 }
276 }
277
278
279 const struct brw_tracked_state brw_clip_prog = {
280 .dirty = {
281 .mesa = (_NEW_LIGHT |
282 _NEW_TRANSFORM |
283 _NEW_POLYGON |
284 _NEW_BUFFERS),
285 .brw = (BRW_NEW_REDUCED_PRIMITIVE),
286 .cache = CACHE_NEW_VS_PROG
287 },
288 .prepare = upload_clip_prog
289 };