glsl: Lower UBO and SSBO access in glsl linker
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_line.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "program/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_clip.h"
43
44
45
46 static void brw_clip_line_alloc_regs( struct brw_clip_compile *c )
47 {
48 const struct brw_device_info *devinfo = c->func.devinfo;
49 GLuint i = 0,j;
50
51 /* Register usage is static, precompute here:
52 */
53 c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
54
55 if (c->key.nr_userclip) {
56 c->reg.fixed_planes = brw_vec4_grf(i, 0);
57 i += (6 + c->key.nr_userclip + 1) / 2;
58
59 c->prog_data.curb_read_length = (6 + c->key.nr_userclip + 1) / 2;
60 }
61 else
62 c->prog_data.curb_read_length = 0;
63
64
65 /* Payload vertices plus space for more generated vertices:
66 */
67 for (j = 0; j < 4; j++) {
68 c->reg.vertex[j] = brw_vec4_grf(i, 0);
69 i += c->nr_regs;
70 }
71
72 c->reg.t = brw_vec1_grf(i, 0);
73 c->reg.t0 = brw_vec1_grf(i, 1);
74 c->reg.t1 = brw_vec1_grf(i, 2);
75 c->reg.planemask = retype(brw_vec1_grf(i, 3), BRW_REGISTER_TYPE_UD);
76 c->reg.plane_equation = brw_vec4_grf(i, 4);
77 i++;
78
79 c->reg.dp0 = brw_vec1_grf(i, 0); /* fixme - dp4 will clobber r.1,2,3 */
80 c->reg.dp1 = brw_vec1_grf(i, 4);
81 i++;
82
83 if (!c->key.nr_userclip) {
84 c->reg.fixed_planes = brw_vec8_grf(i, 0);
85 i++;
86 }
87
88 c->reg.vertex_src_mask = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
89 c->reg.clipdistance_offset = retype(brw_vec1_grf(i, 1), BRW_REGISTER_TYPE_W);
90 i++;
91
92 if (devinfo->gen == 5) {
93 c->reg.ff_sync = retype(brw_vec1_grf(i, 0), BRW_REGISTER_TYPE_UD);
94 i++;
95 }
96
97 c->first_tmp = i;
98 c->last_tmp = i;
99
100 c->prog_data.urb_read_length = c->nr_regs; /* ? */
101 c->prog_data.total_grf = i;
102 }
103
104
105 /* Line clipping, more or less following the following algorithm:
106 *
107 * for (p=0;p<MAX_PLANES;p++) {
108 * if (clipmask & (1 << p)) {
109 * GLfloat dp0 = DOTPROD( vtx0, plane[p] );
110 * GLfloat dp1 = DOTPROD( vtx1, plane[p] );
111 *
112 * if (dp1 < 0.0f) {
113 * GLfloat t = dp1 / (dp1 - dp0);
114 * if (t > t1) t1 = t;
115 * } else {
116 * GLfloat t = dp0 / (dp0 - dp1);
117 * if (t > t0) t0 = t;
118 * }
119 *
120 * if (t0 + t1 >= 1.0)
121 * return;
122 * }
123 * }
124 *
125 * interp( ctx, newvtx0, vtx0, vtx1, t0 );
126 * interp( ctx, newvtx1, vtx1, vtx0, t1 );
127 *
128 */
129 static void clip_and_emit_line( struct brw_clip_compile *c )
130 {
131 struct brw_codegen *p = &c->func;
132 struct brw_indirect vtx0 = brw_indirect(0, 0);
133 struct brw_indirect vtx1 = brw_indirect(1, 0);
134 struct brw_indirect newvtx0 = brw_indirect(2, 0);
135 struct brw_indirect newvtx1 = brw_indirect(3, 0);
136 struct brw_indirect plane_ptr = brw_indirect(4, 0);
137 struct brw_reg v1_null_ud = retype(vec1(brw_null_reg()), BRW_REGISTER_TYPE_UD);
138 GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
139 GLint clipdist0_offset = c->key.nr_userclip
140 ? brw_varying_to_offset(&c->vue_map, VARYING_SLOT_CLIP_DIST0)
141 : 0;
142
143 brw_MOV(p, get_addr_reg(vtx0), brw_address(c->reg.vertex[0]));
144 brw_MOV(p, get_addr_reg(vtx1), brw_address(c->reg.vertex[1]));
145 brw_MOV(p, get_addr_reg(newvtx0), brw_address(c->reg.vertex[2]));
146 brw_MOV(p, get_addr_reg(newvtx1), brw_address(c->reg.vertex[3]));
147 brw_MOV(p, get_addr_reg(plane_ptr), brw_clip_plane0_address(c));
148
149 /* Note: init t0, t1 together:
150 */
151 brw_MOV(p, vec2(c->reg.t0), brw_imm_f(0));
152
153 brw_clip_init_planes(c);
154 brw_clip_init_clipmask(c);
155
156 /* -ve rhw workaround */
157 if (p->devinfo->has_negative_rhw_bug) {
158 brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2),
159 brw_imm_ud(1<<20));
160 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
161 brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f));
162 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
163 }
164
165 /* Set the initial vertex source mask: The first 6 planes are the bounds
166 * of the view volume; the next 8 planes are the user clipping planes.
167 */
168 brw_MOV(p, c->reg.vertex_src_mask, brw_imm_ud(0x3fc0));
169
170 /* Set the initial clipdistance offset to be 6 floats before gl_ClipDistance[0].
171 * We'll increment 6 times before we start hitting actual user clipping. */
172 brw_MOV(p, c->reg.clipdistance_offset, brw_imm_d(clipdist0_offset - 6*sizeof(float)));
173
174 brw_DO(p, BRW_EXECUTE_1);
175 {
176 /* if (planemask & 1)
177 */
178 brw_AND(p, v1_null_ud, c->reg.planemask, brw_imm_ud(1));
179 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
180
181 brw_IF(p, BRW_EXECUTE_1);
182 {
183 brw_AND(p, v1_null_ud, c->reg.vertex_src_mask, brw_imm_ud(1));
184 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
185 brw_IF(p, BRW_EXECUTE_1);
186 {
187 /* user clip distance: just fetch the correct float from each vertex */
188 struct brw_indirect temp_ptr = brw_indirect(7, 0);
189 brw_ADD(p, get_addr_reg(temp_ptr), get_addr_reg(vtx0), c->reg.clipdistance_offset);
190 brw_MOV(p, c->reg.dp0, deref_1f(temp_ptr, 0));
191 brw_ADD(p, get_addr_reg(temp_ptr), get_addr_reg(vtx1), c->reg.clipdistance_offset);
192 brw_MOV(p, c->reg.dp1, deref_1f(temp_ptr, 0));
193 }
194 brw_ELSE(p);
195 {
196 /* fixed plane: fetch the hpos, dp4 against the plane. */
197 if (c->key.nr_userclip)
198 brw_MOV(p, c->reg.plane_equation, deref_4f(plane_ptr, 0));
199 else
200 brw_MOV(p, c->reg.plane_equation, deref_4b(plane_ptr, 0));
201
202 brw_DP4(p, vec4(c->reg.dp0), deref_4f(vtx0, hpos_offset), c->reg.plane_equation);
203 brw_DP4(p, vec4(c->reg.dp1), deref_4f(vtx1, hpos_offset), c->reg.plane_equation);
204 }
205 brw_ENDIF(p);
206
207 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, vec1(c->reg.dp1), brw_imm_f(0.0f));
208
209 brw_IF(p, BRW_EXECUTE_1);
210 {
211 /*
212 * Both can be negative on GM965/G965 due to RHW workaround
213 * if so, this object should be rejected.
214 */
215 if (p->devinfo->has_negative_rhw_bug) {
216 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_LE, c->reg.dp0, brw_imm_f(0.0));
217 brw_IF(p, BRW_EXECUTE_1);
218 {
219 brw_clip_kill_thread(c);
220 }
221 brw_ENDIF(p);
222 }
223
224 brw_ADD(p, c->reg.t, c->reg.dp1, negate(c->reg.dp0));
225 brw_math_invert(p, c->reg.t, c->reg.t);
226 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp1);
227
228 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t1 );
229 brw_MOV(p, c->reg.t1, c->reg.t);
230 brw_inst_set_pred_control(p->devinfo, brw_last_inst,
231 BRW_PREDICATE_NORMAL);
232 }
233 brw_ELSE(p);
234 {
235 /* Coming back in. We know that both cannot be negative
236 * because the line would have been culled in that case.
237 */
238
239 /* If both are positive, do nothing */
240 /* Only on GM965/G965 */
241 if (p->devinfo->has_negative_rhw_bug) {
242 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.dp0, brw_imm_f(0.0));
243 brw_IF(p, BRW_EXECUTE_1);
244 }
245
246 {
247 brw_ADD(p, c->reg.t, c->reg.dp0, negate(c->reg.dp1));
248 brw_math_invert(p, c->reg.t, c->reg.t);
249 brw_MUL(p, c->reg.t, c->reg.t, c->reg.dp0);
250
251 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_G, c->reg.t, c->reg.t0 );
252 brw_MOV(p, c->reg.t0, c->reg.t);
253 brw_inst_set_pred_control(p->devinfo, brw_last_inst,
254 BRW_PREDICATE_NORMAL);
255 }
256
257 if (p->devinfo->has_negative_rhw_bug) {
258 brw_ENDIF(p);
259 }
260 }
261 brw_ENDIF(p);
262 }
263 brw_ENDIF(p);
264
265 /* plane_ptr++;
266 */
267 brw_ADD(p, get_addr_reg(plane_ptr), get_addr_reg(plane_ptr), brw_clip_plane_stride(c));
268
269 /* while (planemask>>=1) != 0
270 */
271 brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1));
272 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
273 brw_SHR(p, c->reg.vertex_src_mask, c->reg.vertex_src_mask, brw_imm_ud(1));
274 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
275 brw_ADD(p, c->reg.clipdistance_offset, c->reg.clipdistance_offset, brw_imm_w(sizeof(float)));
276 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
277 }
278 brw_WHILE(p);
279 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
280
281 brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1);
282 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0));
283 brw_IF(p, BRW_EXECUTE_1);
284 {
285 brw_clip_interp_vertex(c, newvtx0, vtx0, vtx1, c->reg.t0, false);
286 brw_clip_interp_vertex(c, newvtx1, vtx1, vtx0, c->reg.t1, false);
287
288 brw_clip_emit_vue(c, newvtx0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
289 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
290 | URB_WRITE_PRIM_START);
291 brw_clip_emit_vue(c, newvtx1, BRW_URB_WRITE_EOT_COMPLETE,
292 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
293 | URB_WRITE_PRIM_END);
294 }
295 brw_ENDIF(p);
296 brw_clip_kill_thread(c);
297 }
298
299
300
301 void brw_emit_line_clip( struct brw_clip_compile *c )
302 {
303 brw_clip_line_alloc_regs(c);
304 brw_clip_init_ff_sync(c);
305
306 if (c->has_flat_shading) {
307 if (c->key.pv_first)
308 brw_clip_copy_flatshaded_attributes(c, 1, 0);
309 else
310 brw_clip_copy_flatshaded_attributes(c, 0, 1);
311 }
312
313 clip_and_emit_line(c);
314 }