i965: fix fetching constants from constant buffer in glsl path
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "brw_context.h"
33 #include "brw_state.h"
34 #include "brw_defines.h"
35 #include "main/macros.h"
36
37 struct brw_clip_unit_key {
38 unsigned int total_grf;
39 unsigned int urb_entry_read_length;
40 unsigned int curb_entry_read_length;
41 unsigned int clip_mode;
42
43 unsigned int curbe_offset;
44
45 unsigned int nr_urb_entries, urb_size;
46 };
47
48 static void
49 clip_unit_populate_key(struct brw_context *brw, struct brw_clip_unit_key *key)
50 {
51 memset(key, 0, sizeof(*key));
52
53 /* CACHE_NEW_CLIP_PROG */
54 key->total_grf = brw->clip.prog_data->total_grf;
55 key->urb_entry_read_length = brw->clip.prog_data->urb_read_length;
56 key->curb_entry_read_length = brw->clip.prog_data->curb_read_length;
57 key->clip_mode = brw->clip.prog_data->clip_mode;
58
59 /* BRW_NEW_CURBE_OFFSETS */
60 key->curbe_offset = brw->curbe.clip_start;
61
62 /* BRW_NEW_URB_FENCE */
63 key->nr_urb_entries = brw->urb.nr_clip_entries;
64 key->urb_size = brw->urb.vsize;
65 }
66
67 static dri_bo *
68 clip_unit_create_from_key(struct brw_context *brw,
69 struct brw_clip_unit_key *key)
70 {
71 struct brw_clip_unit_state clip;
72 dri_bo *bo;
73
74 memset(&clip, 0, sizeof(clip));
75
76 clip.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
77 /* reloc */
78 clip.thread0.kernel_start_pointer = brw->clip.prog_bo->offset >> 6;
79
80 clip.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
81 clip.thread1.single_program_flow = 1;
82
83 clip.thread3.urb_entry_read_length = key->urb_entry_read_length;
84 clip.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
85 clip.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
86 clip.thread3.dispatch_grf_start_reg = 1;
87 clip.thread3.urb_entry_read_offset = 0;
88
89 clip.thread4.nr_urb_entries = key->nr_urb_entries;
90 clip.thread4.urb_entry_allocation_size = key->urb_size - 1;
91 /* If we have enough clip URB entries to run two threads, do so.
92 */
93 if (key->nr_urb_entries >= 10) {
94 /* Half of the URB entries go to each thread, and it has to be an
95 * even number.
96 */
97 assert(key->nr_urb_entries % 2 == 0);
98 clip.thread4.max_threads = 2 - 1;
99 } else {
100 assert(key->nr_urb_entries >= 5);
101 clip.thread4.max_threads = 1 - 1;
102 }
103
104 if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
105 clip.thread4.max_threads = 0;
106
107 if (INTEL_DEBUG & DEBUG_STATS)
108 clip.thread4.stats_enable = 1;
109
110 clip.clip5.userclip_enable_flags = 0x7f;
111 clip.clip5.userclip_must_clip = 1;
112 clip.clip5.guard_band_enable = 0;
113 clip.clip5.viewport_z_clip_enable = 1;
114 clip.clip5.viewport_xy_clip_enable = 1;
115 clip.clip5.vertex_position_space = BRW_CLIP_NDCSPACE;
116 clip.clip5.api_mode = BRW_CLIP_API_OGL;
117 clip.clip5.clip_mode = key->clip_mode;
118
119 if (BRW_IS_G4X(brw))
120 clip.clip5.negative_w_clip_test = 1;
121
122 clip.clip6.clipper_viewport_state_ptr = 0;
123 clip.viewport_xmin = -1;
124 clip.viewport_xmax = 1;
125 clip.viewport_ymin = -1;
126 clip.viewport_ymax = 1;
127
128 bo = brw_upload_cache(&brw->cache, BRW_CLIP_UNIT,
129 key, sizeof(*key),
130 &brw->clip.prog_bo, 1,
131 &clip, sizeof(clip),
132 NULL, NULL);
133
134 /* Emit clip program relocation */
135 assert(brw->clip.prog_bo);
136 dri_bo_emit_reloc(bo,
137 I915_GEM_DOMAIN_INSTRUCTION,
138 0,
139 clip.thread0.grf_reg_count << 1,
140 offsetof(struct brw_clip_unit_state, thread0),
141 brw->clip.prog_bo);
142
143 return bo;
144 }
145
146 static void upload_clip_unit( struct brw_context *brw )
147 {
148 struct brw_clip_unit_key key;
149
150 clip_unit_populate_key(brw, &key);
151
152 dri_bo_unreference(brw->clip.state_bo);
153 brw->clip.state_bo = brw_search_cache(&brw->cache, BRW_CLIP_UNIT,
154 &key, sizeof(key),
155 &brw->clip.prog_bo, 1,
156 NULL);
157 if (brw->clip.state_bo == NULL) {
158 brw->clip.state_bo = clip_unit_create_from_key(brw, &key);
159 }
160 }
161
162 const struct brw_tracked_state brw_clip_unit = {
163 .dirty = {
164 .mesa = 0,
165 .brw = (BRW_NEW_CURBE_OFFSETS |
166 BRW_NEW_URB_FENCE),
167 .cache = CACHE_NEW_CLIP_PROG
168 },
169 .prepare = upload_clip_unit,
170 };