Merge remote-tracking branch 'origin/master' into vulkan
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "main/macros.h"
33 #include "main/enums.h"
34 #include "program/program.h"
35
36 #include "intel_batchbuffer.h"
37
38 #include "brw_defines.h"
39 #include "brw_context.h"
40 #include "brw_eu.h"
41 #include "brw_clip.h"
42
43
44
45 /* This is performed against the original triangles, so no indirection
46 * required:
47 BZZZT!
48 */
49 static void compute_tri_direction( struct brw_clip_compile *c )
50 {
51 struct brw_codegen *p = &c->func;
52 struct brw_reg e = c->reg.tmp0;
53 struct brw_reg f = c->reg.tmp1;
54 GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
55 struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
56 struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
57 struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
58
59
60 struct brw_reg v0n = get_tmp(c);
61 struct brw_reg v1n = get_tmp(c);
62 struct brw_reg v2n = get_tmp(c);
63
64 /* Convert to NDC.
65 * NOTE: We can't modify the original vertex coordinates,
66 * as it may impact further operations.
67 * So, we have to keep normalized coordinates in temp registers.
68 *
69 * TBD-KC
70 * Try to optimize unnecessary MOV's.
71 */
72 brw_MOV(p, v0n, v0);
73 brw_MOV(p, v1n, v1);
74 brw_MOV(p, v2n, v2);
75
76 brw_clip_project_position(c, v0n);
77 brw_clip_project_position(c, v1n);
78 brw_clip_project_position(c, v2n);
79
80 /* Calculate the vectors of two edges of the triangle:
81 */
82 brw_ADD(p, e, v0n, negate(v2n));
83 brw_ADD(p, f, v1n, negate(v2n));
84
85 /* Take their crossproduct:
86 */
87 brw_set_default_access_mode(p, BRW_ALIGN_16);
88 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
89 brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
90 brw_set_default_access_mode(p, BRW_ALIGN_1);
91
92 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
93 }
94
95
96 static void cull_direction( struct brw_clip_compile *c )
97 {
98 struct brw_codegen *p = &c->func;
99 GLuint conditional;
100
101 assert (!(c->key.fill_ccw == CLIP_CULL &&
102 c->key.fill_cw == CLIP_CULL));
103
104 if (c->key.fill_ccw == CLIP_CULL)
105 conditional = BRW_CONDITIONAL_GE;
106 else
107 conditional = BRW_CONDITIONAL_L;
108
109 brw_CMP(p,
110 vec1(brw_null_reg()),
111 conditional,
112 get_element(c->reg.dir, 2),
113 brw_imm_f(0));
114
115 brw_IF(p, BRW_EXECUTE_1);
116 {
117 brw_clip_kill_thread(c);
118 }
119 brw_ENDIF(p);
120 }
121
122
123
124 static void copy_bfc( struct brw_clip_compile *c )
125 {
126 struct brw_codegen *p = &c->func;
127 GLuint conditional;
128
129 /* Do we have any colors to copy?
130 */
131 if (!(brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
132 brw_clip_have_varying(c, VARYING_SLOT_BFC0)) &&
133 !(brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
134 brw_clip_have_varying(c, VARYING_SLOT_BFC1)))
135 return;
136
137 /* In some weird degenerate cases we can end up testing the
138 * direction twice, once for culling and once for bfc copying. Oh
139 * well, that's what you get for setting weird GL state.
140 */
141 if (c->key.copy_bfc_ccw)
142 conditional = BRW_CONDITIONAL_GE;
143 else
144 conditional = BRW_CONDITIONAL_L;
145
146 brw_CMP(p,
147 vec1(brw_null_reg()),
148 conditional,
149 get_element(c->reg.dir, 2),
150 brw_imm_f(0));
151
152 brw_IF(p, BRW_EXECUTE_1);
153 {
154 GLuint i;
155
156 for (i = 0; i < 3; i++) {
157 if (brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
158 brw_clip_have_varying(c, VARYING_SLOT_BFC0))
159 brw_MOV(p,
160 byte_offset(c->reg.vertex[i],
161 brw_varying_to_offset(&c->vue_map,
162 VARYING_SLOT_COL0)),
163 byte_offset(c->reg.vertex[i],
164 brw_varying_to_offset(&c->vue_map,
165 VARYING_SLOT_BFC0)));
166
167 if (brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
168 brw_clip_have_varying(c, VARYING_SLOT_BFC1))
169 brw_MOV(p,
170 byte_offset(c->reg.vertex[i],
171 brw_varying_to_offset(&c->vue_map,
172 VARYING_SLOT_COL1)),
173 byte_offset(c->reg.vertex[i],
174 brw_varying_to_offset(&c->vue_map,
175 VARYING_SLOT_BFC1)));
176 }
177 }
178 brw_ENDIF(p);
179 }
180
181
182
183
184 /*
185 GLfloat iz = 1.0 / dir.z;
186 GLfloat ac = dir.x * iz;
187 GLfloat bc = dir.y * iz;
188 offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
189 offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
190 if (ctx->Polygon.OffsetClamp && isfinite(ctx->Polygon.OffsetClamp)) {
191 if (ctx->Polygon.OffsetClamp < 0)
192 offset = MAX2( offset, ctx->Polygon.OffsetClamp );
193 else
194 offset = MIN2( offset, ctx->Polygon.OffsetClamp );
195 }
196 offset *= MRD;
197 */
198 static void compute_offset( struct brw_clip_compile *c )
199 {
200 struct brw_codegen *p = &c->func;
201 struct brw_reg off = c->reg.offset;
202 struct brw_reg dir = c->reg.dir;
203
204 brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
205 brw_MUL(p, vec2(off), vec2(dir), get_element(off, 2));
206
207 brw_CMP(p,
208 vec1(brw_null_reg()),
209 BRW_CONDITIONAL_GE,
210 brw_abs(get_element(off, 0)),
211 brw_abs(get_element(off, 1)));
212
213 brw_SEL(p, vec1(off),
214 brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
215 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
216
217 brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
218 brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
219 if (c->key.offset_clamp && isfinite(c->key.offset_clamp)) {
220 brw_CMP(p,
221 vec1(brw_null_reg()),
222 c->key.offset_clamp < 0 ? BRW_CONDITIONAL_GE : BRW_CONDITIONAL_L,
223 vec1(off),
224 brw_imm_f(c->key.offset_clamp));
225 brw_SEL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_clamp));
226 }
227 }
228
229
230 static void merge_edgeflags( struct brw_clip_compile *c )
231 {
232 struct brw_codegen *p = &c->func;
233 struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
234
235 brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
236 brw_CMP(p,
237 vec1(brw_null_reg()),
238 BRW_CONDITIONAL_EQ,
239 tmp0,
240 brw_imm_ud(_3DPRIM_POLYGON));
241
242 /* Get away with using reg.vertex because we know that this is not
243 * a _3DPRIM_TRISTRIP_REVERSE:
244 */
245 brw_IF(p, BRW_EXECUTE_1);
246 {
247 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
248 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
249 brw_MOV(p, byte_offset(c->reg.vertex[0],
250 brw_varying_to_offset(&c->vue_map,
251 VARYING_SLOT_EDGE)),
252 brw_imm_f(0));
253 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
254
255 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
256 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
257 brw_MOV(p, byte_offset(c->reg.vertex[2],
258 brw_varying_to_offset(&c->vue_map,
259 VARYING_SLOT_EDGE)),
260 brw_imm_f(0));
261 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
262 }
263 brw_ENDIF(p);
264 }
265
266
267
268 static void apply_one_offset( struct brw_clip_compile *c,
269 struct brw_indirect vert )
270 {
271 struct brw_codegen *p = &c->func;
272 GLuint ndc_offset = brw_varying_to_offset(&c->vue_map,
273 BRW_VARYING_SLOT_NDC);
274 struct brw_reg z = deref_1f(vert, ndc_offset +
275 2 * type_sz(BRW_REGISTER_TYPE_F));
276
277 brw_ADD(p, z, z, vec1(c->reg.offset));
278 }
279
280
281
282 /***********************************************************************
283 * Output clipped polygon as an unfilled primitive:
284 */
285 static void emit_lines(struct brw_clip_compile *c,
286 bool do_offset)
287 {
288 struct brw_codegen *p = &c->func;
289 struct brw_indirect v0 = brw_indirect(0, 0);
290 struct brw_indirect v1 = brw_indirect(1, 0);
291 struct brw_indirect v0ptr = brw_indirect(2, 0);
292 struct brw_indirect v1ptr = brw_indirect(3, 0);
293
294 /* Need a separate loop for offset:
295 */
296 if (do_offset) {
297 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
298 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
299
300 brw_DO(p, BRW_EXECUTE_1);
301 {
302 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
303 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
304
305 apply_one_offset(c, v0);
306
307 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
308 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
309 }
310 brw_WHILE(p);
311 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
312 }
313
314 /* v1ptr = &inlist[nr_verts]
315 * *v1ptr = v0
316 */
317 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
318 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
319 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v0ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
320 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
321 brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0));
322
323 brw_DO(p, BRW_EXECUTE_1);
324 {
325 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
326 brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2));
327 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
328
329 /* draw edge if edgeflag != 0 */
330 brw_CMP(p,
331 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
332 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
333 VARYING_SLOT_EDGE)),
334 brw_imm_f(0));
335 brw_IF(p, BRW_EXECUTE_1);
336 {
337 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
338 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
339 | URB_WRITE_PRIM_START);
340 brw_clip_emit_vue(c, v1, BRW_URB_WRITE_ALLOCATE_COMPLETE,
341 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
342 | URB_WRITE_PRIM_END);
343 }
344 brw_ENDIF(p);
345
346 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
347 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
348 }
349 brw_WHILE(p);
350 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
351 }
352
353
354
355 static void emit_points(struct brw_clip_compile *c,
356 bool do_offset )
357 {
358 struct brw_codegen *p = &c->func;
359
360 struct brw_indirect v0 = brw_indirect(0, 0);
361 struct brw_indirect v0ptr = brw_indirect(2, 0);
362
363 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
364 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
365
366 brw_DO(p, BRW_EXECUTE_1);
367 {
368 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
369 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
370
371 /* draw if edgeflag != 0
372 */
373 brw_CMP(p,
374 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
375 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
376 VARYING_SLOT_EDGE)),
377 brw_imm_f(0));
378 brw_IF(p, BRW_EXECUTE_1);
379 {
380 if (do_offset)
381 apply_one_offset(c, v0);
382
383 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
384 (_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT)
385 | URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
386 }
387 brw_ENDIF(p);
388
389 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
390 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
391 }
392 brw_WHILE(p);
393 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
394 }
395
396
397
398
399
400
401
402 static void emit_primitives( struct brw_clip_compile *c,
403 GLuint mode,
404 bool do_offset )
405 {
406 switch (mode) {
407 case CLIP_FILL:
408 brw_clip_tri_emit_polygon(c);
409 break;
410
411 case CLIP_LINE:
412 emit_lines(c, do_offset);
413 break;
414
415 case CLIP_POINT:
416 emit_points(c, do_offset);
417 break;
418
419 case CLIP_CULL:
420 unreachable("not reached");
421 }
422 }
423
424
425
426 static void emit_unfilled_primitives( struct brw_clip_compile *c )
427 {
428 struct brw_codegen *p = &c->func;
429
430 /* Direction culling has already been done.
431 */
432 if (c->key.fill_ccw != c->key.fill_cw &&
433 c->key.fill_ccw != CLIP_CULL &&
434 c->key.fill_cw != CLIP_CULL)
435 {
436 brw_CMP(p,
437 vec1(brw_null_reg()),
438 BRW_CONDITIONAL_GE,
439 get_element(c->reg.dir, 2),
440 brw_imm_f(0));
441
442 brw_IF(p, BRW_EXECUTE_1);
443 {
444 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
445 }
446 brw_ELSE(p);
447 {
448 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
449 }
450 brw_ENDIF(p);
451 }
452 else if (c->key.fill_cw != CLIP_CULL) {
453 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
454 }
455 else if (c->key.fill_ccw != CLIP_CULL) {
456 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
457 }
458 }
459
460
461
462
463 static void check_nr_verts( struct brw_clip_compile *c )
464 {
465 struct brw_codegen *p = &c->func;
466
467 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
468 brw_IF(p, BRW_EXECUTE_1);
469 {
470 brw_clip_kill_thread(c);
471 }
472 brw_ENDIF(p);
473 }
474
475
476 void brw_emit_unfilled_clip( struct brw_clip_compile *c )
477 {
478 struct brw_codegen *p = &c->func;
479
480 c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
481 (c->key.fill_ccw != c->key.fill_cw) ||
482 c->key.fill_ccw == CLIP_CULL ||
483 c->key.fill_cw == CLIP_CULL ||
484 c->key.copy_bfc_cw ||
485 c->key.copy_bfc_ccw);
486
487 brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
488 brw_clip_tri_init_vertices(c);
489 brw_clip_init_ff_sync(c);
490
491 assert(brw_clip_have_varying(c, VARYING_SLOT_EDGE));
492
493 if (c->key.fill_ccw == CLIP_CULL &&
494 c->key.fill_cw == CLIP_CULL) {
495 brw_clip_kill_thread(c);
496 return;
497 }
498
499 merge_edgeflags(c);
500
501 /* Need to use the inlist indirection here:
502 */
503 if (c->need_direction)
504 compute_tri_direction(c);
505
506 if (c->key.fill_ccw == CLIP_CULL ||
507 c->key.fill_cw == CLIP_CULL)
508 cull_direction(c);
509
510 if (c->key.offset_ccw ||
511 c->key.offset_cw)
512 compute_offset(c);
513
514 if (c->key.copy_bfc_ccw ||
515 c->key.copy_bfc_cw)
516 copy_bfc(c);
517
518 /* Need to do this whether we clip or not:
519 */
520 if (c->has_flat_shading)
521 brw_clip_tri_flat_shade(c);
522
523 brw_clip_init_clipmask(c);
524 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
525 brw_IF(p, BRW_EXECUTE_1);
526 {
527 brw_clip_init_planes(c);
528 brw_clip_tri(c);
529 check_nr_verts(c);
530 }
531 brw_ENDIF(p);
532
533 emit_unfilled_primitives(c);
534 brw_clip_kill_thread(c);
535 }