glsl: Lower UBO and SSBO access in glsl linker
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "program/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_clip.h"
43
44
45
46 /* This is performed against the original triangles, so no indirection
47 * required:
48 BZZZT!
49 */
50 static void compute_tri_direction( struct brw_clip_compile *c )
51 {
52 struct brw_codegen *p = &c->func;
53 struct brw_reg e = c->reg.tmp0;
54 struct brw_reg f = c->reg.tmp1;
55 GLuint hpos_offset = brw_varying_to_offset(&c->vue_map, VARYING_SLOT_POS);
56 struct brw_reg v0 = byte_offset(c->reg.vertex[0], hpos_offset);
57 struct brw_reg v1 = byte_offset(c->reg.vertex[1], hpos_offset);
58 struct brw_reg v2 = byte_offset(c->reg.vertex[2], hpos_offset);
59
60
61 struct brw_reg v0n = get_tmp(c);
62 struct brw_reg v1n = get_tmp(c);
63 struct brw_reg v2n = get_tmp(c);
64
65 /* Convert to NDC.
66 * NOTE: We can't modify the original vertex coordinates,
67 * as it may impact further operations.
68 * So, we have to keep normalized coordinates in temp registers.
69 *
70 * TBD-KC
71 * Try to optimize unnecessary MOV's.
72 */
73 brw_MOV(p, v0n, v0);
74 brw_MOV(p, v1n, v1);
75 brw_MOV(p, v2n, v2);
76
77 brw_clip_project_position(c, v0n);
78 brw_clip_project_position(c, v1n);
79 brw_clip_project_position(c, v2n);
80
81 /* Calculate the vectors of two edges of the triangle:
82 */
83 brw_ADD(p, e, v0n, negate(v2n));
84 brw_ADD(p, f, v1n, negate(v2n));
85
86 /* Take their crossproduct:
87 */
88 brw_set_default_access_mode(p, BRW_ALIGN_16);
89 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
90 brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
91 brw_set_default_access_mode(p, BRW_ALIGN_1);
92
93 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
94 }
95
96
97 static void cull_direction( struct brw_clip_compile *c )
98 {
99 struct brw_codegen *p = &c->func;
100 GLuint conditional;
101
102 assert (!(c->key.fill_ccw == CLIP_CULL &&
103 c->key.fill_cw == CLIP_CULL));
104
105 if (c->key.fill_ccw == CLIP_CULL)
106 conditional = BRW_CONDITIONAL_GE;
107 else
108 conditional = BRW_CONDITIONAL_L;
109
110 brw_CMP(p,
111 vec1(brw_null_reg()),
112 conditional,
113 get_element(c->reg.dir, 2),
114 brw_imm_f(0));
115
116 brw_IF(p, BRW_EXECUTE_1);
117 {
118 brw_clip_kill_thread(c);
119 }
120 brw_ENDIF(p);
121 }
122
123
124
125 static void copy_bfc( struct brw_clip_compile *c )
126 {
127 struct brw_codegen *p = &c->func;
128 GLuint conditional;
129
130 /* Do we have any colors to copy?
131 */
132 if (!(brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
133 brw_clip_have_varying(c, VARYING_SLOT_BFC0)) &&
134 !(brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
135 brw_clip_have_varying(c, VARYING_SLOT_BFC1)))
136 return;
137
138 /* In some weird degenerate cases we can end up testing the
139 * direction twice, once for culling and once for bfc copying. Oh
140 * well, that's what you get for setting weird GL state.
141 */
142 if (c->key.copy_bfc_ccw)
143 conditional = BRW_CONDITIONAL_GE;
144 else
145 conditional = BRW_CONDITIONAL_L;
146
147 brw_CMP(p,
148 vec1(brw_null_reg()),
149 conditional,
150 get_element(c->reg.dir, 2),
151 brw_imm_f(0));
152
153 brw_IF(p, BRW_EXECUTE_1);
154 {
155 GLuint i;
156
157 for (i = 0; i < 3; i++) {
158 if (brw_clip_have_varying(c, VARYING_SLOT_COL0) &&
159 brw_clip_have_varying(c, VARYING_SLOT_BFC0))
160 brw_MOV(p,
161 byte_offset(c->reg.vertex[i],
162 brw_varying_to_offset(&c->vue_map,
163 VARYING_SLOT_COL0)),
164 byte_offset(c->reg.vertex[i],
165 brw_varying_to_offset(&c->vue_map,
166 VARYING_SLOT_BFC0)));
167
168 if (brw_clip_have_varying(c, VARYING_SLOT_COL1) &&
169 brw_clip_have_varying(c, VARYING_SLOT_BFC1))
170 brw_MOV(p,
171 byte_offset(c->reg.vertex[i],
172 brw_varying_to_offset(&c->vue_map,
173 VARYING_SLOT_COL1)),
174 byte_offset(c->reg.vertex[i],
175 brw_varying_to_offset(&c->vue_map,
176 VARYING_SLOT_BFC1)));
177 }
178 }
179 brw_ENDIF(p);
180 }
181
182
183
184
185 /*
186 GLfloat iz = 1.0 / dir.z;
187 GLfloat ac = dir.x * iz;
188 GLfloat bc = dir.y * iz;
189 offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
190 offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
191 if (ctx->Polygon.OffsetClamp && isfinite(ctx->Polygon.OffsetClamp)) {
192 if (ctx->Polygon.OffsetClamp < 0)
193 offset = MAX2( offset, ctx->Polygon.OffsetClamp );
194 else
195 offset = MIN2( offset, ctx->Polygon.OffsetClamp );
196 }
197 offset *= MRD;
198 */
199 static void compute_offset( struct brw_clip_compile *c )
200 {
201 struct brw_codegen *p = &c->func;
202 struct brw_reg off = c->reg.offset;
203 struct brw_reg dir = c->reg.dir;
204
205 brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
206 brw_MUL(p, vec2(off), vec2(dir), get_element(off, 2));
207
208 brw_CMP(p,
209 vec1(brw_null_reg()),
210 BRW_CONDITIONAL_GE,
211 brw_abs(get_element(off, 0)),
212 brw_abs(get_element(off, 1)));
213
214 brw_SEL(p, vec1(off),
215 brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
216 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
217
218 brw_MUL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_factor));
219 brw_ADD(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_units));
220 if (c->key.offset_clamp && isfinite(c->key.offset_clamp)) {
221 brw_CMP(p,
222 vec1(brw_null_reg()),
223 c->key.offset_clamp < 0 ? BRW_CONDITIONAL_GE : BRW_CONDITIONAL_L,
224 vec1(off),
225 brw_imm_f(c->key.offset_clamp));
226 brw_SEL(p, vec1(off), vec1(off), brw_imm_f(c->key.offset_clamp));
227 }
228 }
229
230
231 static void merge_edgeflags( struct brw_clip_compile *c )
232 {
233 struct brw_codegen *p = &c->func;
234 struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
235
236 brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
237 brw_CMP(p,
238 vec1(brw_null_reg()),
239 BRW_CONDITIONAL_EQ,
240 tmp0,
241 brw_imm_ud(_3DPRIM_POLYGON));
242
243 /* Get away with using reg.vertex because we know that this is not
244 * a _3DPRIM_TRISTRIP_REVERSE:
245 */
246 brw_IF(p, BRW_EXECUTE_1);
247 {
248 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
249 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
250 brw_MOV(p, byte_offset(c->reg.vertex[0],
251 brw_varying_to_offset(&c->vue_map,
252 VARYING_SLOT_EDGE)),
253 brw_imm_f(0));
254 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
255
256 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
257 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_EQ);
258 brw_MOV(p, byte_offset(c->reg.vertex[2],
259 brw_varying_to_offset(&c->vue_map,
260 VARYING_SLOT_EDGE)),
261 brw_imm_f(0));
262 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
263 }
264 brw_ENDIF(p);
265 }
266
267
268
269 static void apply_one_offset( struct brw_clip_compile *c,
270 struct brw_indirect vert )
271 {
272 struct brw_codegen *p = &c->func;
273 GLuint ndc_offset = brw_varying_to_offset(&c->vue_map,
274 BRW_VARYING_SLOT_NDC);
275 struct brw_reg z = deref_1f(vert, ndc_offset +
276 2 * type_sz(BRW_REGISTER_TYPE_F));
277
278 brw_ADD(p, z, z, vec1(c->reg.offset));
279 }
280
281
282
283 /***********************************************************************
284 * Output clipped polygon as an unfilled primitive:
285 */
286 static void emit_lines(struct brw_clip_compile *c,
287 bool do_offset)
288 {
289 struct brw_codegen *p = &c->func;
290 struct brw_indirect v0 = brw_indirect(0, 0);
291 struct brw_indirect v1 = brw_indirect(1, 0);
292 struct brw_indirect v0ptr = brw_indirect(2, 0);
293 struct brw_indirect v1ptr = brw_indirect(3, 0);
294
295 /* Need a separate loop for offset:
296 */
297 if (do_offset) {
298 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
299 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
300
301 brw_DO(p, BRW_EXECUTE_1);
302 {
303 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
304 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
305
306 apply_one_offset(c, v0);
307
308 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
309 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_G);
310 }
311 brw_WHILE(p);
312 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
313 }
314
315 /* v1ptr = &inlist[nr_verts]
316 * *v1ptr = v0
317 */
318 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
319 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
320 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v0ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
321 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
322 brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0));
323
324 brw_DO(p, BRW_EXECUTE_1);
325 {
326 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
327 brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2));
328 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
329
330 /* draw edge if edgeflag != 0 */
331 brw_CMP(p,
332 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
333 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
334 VARYING_SLOT_EDGE)),
335 brw_imm_f(0));
336 brw_IF(p, BRW_EXECUTE_1);
337 {
338 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
339 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
340 | URB_WRITE_PRIM_START);
341 brw_clip_emit_vue(c, v1, BRW_URB_WRITE_ALLOCATE_COMPLETE,
342 (_3DPRIM_LINESTRIP << URB_WRITE_PRIM_TYPE_SHIFT)
343 | URB_WRITE_PRIM_END);
344 }
345 brw_ENDIF(p);
346
347 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
348 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
349 }
350 brw_WHILE(p);
351 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
352 }
353
354
355
356 static void emit_points(struct brw_clip_compile *c,
357 bool do_offset )
358 {
359 struct brw_codegen *p = &c->func;
360
361 struct brw_indirect v0 = brw_indirect(0, 0);
362 struct brw_indirect v0ptr = brw_indirect(2, 0);
363
364 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
365 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
366
367 brw_DO(p, BRW_EXECUTE_1);
368 {
369 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
370 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
371
372 /* draw if edgeflag != 0
373 */
374 brw_CMP(p,
375 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
376 deref_1f(v0, brw_varying_to_offset(&c->vue_map,
377 VARYING_SLOT_EDGE)),
378 brw_imm_f(0));
379 brw_IF(p, BRW_EXECUTE_1);
380 {
381 if (do_offset)
382 apply_one_offset(c, v0);
383
384 brw_clip_emit_vue(c, v0, BRW_URB_WRITE_ALLOCATE_COMPLETE,
385 (_3DPRIM_POINTLIST << URB_WRITE_PRIM_TYPE_SHIFT)
386 | URB_WRITE_PRIM_START | URB_WRITE_PRIM_END);
387 }
388 brw_ENDIF(p);
389
390 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
391 brw_inst_set_cond_modifier(p->devinfo, brw_last_inst, BRW_CONDITIONAL_NZ);
392 }
393 brw_WHILE(p);
394 brw_inst_set_pred_control(p->devinfo, brw_last_inst, BRW_PREDICATE_NORMAL);
395 }
396
397
398
399
400
401
402
403 static void emit_primitives( struct brw_clip_compile *c,
404 GLuint mode,
405 bool do_offset )
406 {
407 switch (mode) {
408 case CLIP_FILL:
409 brw_clip_tri_emit_polygon(c);
410 break;
411
412 case CLIP_LINE:
413 emit_lines(c, do_offset);
414 break;
415
416 case CLIP_POINT:
417 emit_points(c, do_offset);
418 break;
419
420 case CLIP_CULL:
421 unreachable("not reached");
422 }
423 }
424
425
426
427 static void emit_unfilled_primitives( struct brw_clip_compile *c )
428 {
429 struct brw_codegen *p = &c->func;
430
431 /* Direction culling has already been done.
432 */
433 if (c->key.fill_ccw != c->key.fill_cw &&
434 c->key.fill_ccw != CLIP_CULL &&
435 c->key.fill_cw != CLIP_CULL)
436 {
437 brw_CMP(p,
438 vec1(brw_null_reg()),
439 BRW_CONDITIONAL_GE,
440 get_element(c->reg.dir, 2),
441 brw_imm_f(0));
442
443 brw_IF(p, BRW_EXECUTE_1);
444 {
445 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
446 }
447 brw_ELSE(p);
448 {
449 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
450 }
451 brw_ENDIF(p);
452 }
453 else if (c->key.fill_cw != CLIP_CULL) {
454 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
455 }
456 else if (c->key.fill_ccw != CLIP_CULL) {
457 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
458 }
459 }
460
461
462
463
464 static void check_nr_verts( struct brw_clip_compile *c )
465 {
466 struct brw_codegen *p = &c->func;
467
468 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
469 brw_IF(p, BRW_EXECUTE_1);
470 {
471 brw_clip_kill_thread(c);
472 }
473 brw_ENDIF(p);
474 }
475
476
477 void brw_emit_unfilled_clip( struct brw_clip_compile *c )
478 {
479 struct brw_codegen *p = &c->func;
480
481 c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
482 (c->key.fill_ccw != c->key.fill_cw) ||
483 c->key.fill_ccw == CLIP_CULL ||
484 c->key.fill_cw == CLIP_CULL ||
485 c->key.copy_bfc_cw ||
486 c->key.copy_bfc_ccw);
487
488 brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
489 brw_clip_tri_init_vertices(c);
490 brw_clip_init_ff_sync(c);
491
492 assert(brw_clip_have_varying(c, VARYING_SLOT_EDGE));
493
494 if (c->key.fill_ccw == CLIP_CULL &&
495 c->key.fill_cw == CLIP_CULL) {
496 brw_clip_kill_thread(c);
497 return;
498 }
499
500 merge_edgeflags(c);
501
502 /* Need to use the inlist indirection here:
503 */
504 if (c->need_direction)
505 compute_tri_direction(c);
506
507 if (c->key.fill_ccw == CLIP_CULL ||
508 c->key.fill_cw == CLIP_CULL)
509 cull_direction(c);
510
511 if (c->key.offset_ccw ||
512 c->key.offset_cw)
513 compute_offset(c);
514
515 if (c->key.copy_bfc_ccw ||
516 c->key.copy_bfc_cw)
517 copy_bfc(c);
518
519 /* Need to do this whether we clip or not:
520 */
521 if (c->has_flat_shading)
522 brw_clip_tri_flat_shade(c);
523
524 brw_clip_init_clipmask(c);
525 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
526 brw_IF(p, BRW_EXECUTE_1);
527 {
528 brw_clip_init_planes(c);
529 brw_clip_tri(c);
530 check_nr_verts(c);
531 }
532 brw_ENDIF(p);
533
534 emit_unfilled_primitives(c);
535 brw_clip_kill_thread(c);
536 }
537
538
539