Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / mesa / drivers / dri / i965 / brw_clip_unfilled.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/glheader.h"
33 #include "main/macros.h"
34 #include "main/enums.h"
35 #include "shader/program.h"
36
37 #include "intel_batchbuffer.h"
38
39 #include "brw_defines.h"
40 #include "brw_context.h"
41 #include "brw_eu.h"
42 #include "brw_util.h"
43 #include "brw_clip.h"
44
45
46
47 /* This is performed against the original triangles, so no indirection
48 * required:
49 BZZZT!
50 */
51 static void compute_tri_direction( struct brw_clip_compile *c )
52 {
53 struct brw_compile *p = &c->func;
54 struct brw_reg e = c->reg.tmp0;
55 struct brw_reg f = c->reg.tmp1;
56 struct brw_reg v0 = byte_offset(c->reg.vertex[0], c->offset[VERT_RESULT_HPOS]);
57 struct brw_reg v1 = byte_offset(c->reg.vertex[1], c->offset[VERT_RESULT_HPOS]);
58 struct brw_reg v2 = byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_HPOS]);
59
60
61 struct brw_reg v0n = get_tmp(c);
62 struct brw_reg v1n = get_tmp(c);
63 struct brw_reg v2n = get_tmp(c);
64
65 /* Convert to NDC.
66 * NOTE: We can't modify the original vertex coordinates,
67 * as it may impact further operations.
68 * So, we have to keep normalized coordinates in temp registers.
69 *
70 * TBD-KC
71 * Try to optimize unnecessary MOV's.
72 */
73 brw_MOV(p, v0n, v0);
74 brw_MOV(p, v1n, v1);
75 brw_MOV(p, v2n, v2);
76
77 brw_clip_project_position(c, v0n);
78 brw_clip_project_position(c, v1n);
79 brw_clip_project_position(c, v2n);
80
81 /* Calculate the vectors of two edges of the triangle:
82 */
83 brw_ADD(p, e, v0n, negate(v2n));
84 brw_ADD(p, f, v1n, negate(v2n));
85
86 /* Take their crossproduct:
87 */
88 brw_set_access_mode(p, BRW_ALIGN_16);
89 brw_MUL(p, vec4(brw_null_reg()), brw_swizzle(e, 1,2,0,3), brw_swizzle(f,2,0,1,3));
90 brw_MAC(p, vec4(e), negate(brw_swizzle(e, 2,0,1,3)), brw_swizzle(f,1,2,0,3));
91 brw_set_access_mode(p, BRW_ALIGN_1);
92
93 brw_MUL(p, c->reg.dir, c->reg.dir, vec4(e));
94 }
95
96
97 static void cull_direction( struct brw_clip_compile *c )
98 {
99 struct brw_compile *p = &c->func;
100 struct brw_instruction *ccw;
101 GLuint conditional;
102
103 assert (!(c->key.fill_ccw == CLIP_CULL &&
104 c->key.fill_cw == CLIP_CULL));
105
106 if (c->key.fill_ccw == CLIP_CULL)
107 conditional = BRW_CONDITIONAL_GE;
108 else
109 conditional = BRW_CONDITIONAL_L;
110
111 brw_CMP(p,
112 vec1(brw_null_reg()),
113 conditional,
114 get_element(c->reg.dir, 2),
115 brw_imm_f(0));
116
117 ccw = brw_IF(p, BRW_EXECUTE_1);
118 {
119 brw_clip_kill_thread(c);
120 }
121 brw_ENDIF(p, ccw);
122 }
123
124
125
126 static void copy_bfc( struct brw_clip_compile *c )
127 {
128 struct brw_compile *p = &c->func;
129 struct brw_instruction *ccw;
130 GLuint conditional;
131
132 /* Do we have any colors to copy?
133 */
134 if (!(c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0]) &&
135 !(c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1]))
136 return;
137
138 /* In some wierd degnerate cases we can end up testing the
139 * direction twice, once for culling and once for bfc copying. Oh
140 * well, that's what you get for setting wierd GL state.
141 */
142 if (c->key.copy_bfc_ccw)
143 conditional = BRW_CONDITIONAL_GE;
144 else
145 conditional = BRW_CONDITIONAL_L;
146
147 brw_CMP(p,
148 vec1(brw_null_reg()),
149 conditional,
150 get_element(c->reg.dir, 2),
151 brw_imm_f(0));
152
153 ccw = brw_IF(p, BRW_EXECUTE_1);
154 {
155 GLuint i;
156
157 for (i = 0; i < 3; i++) {
158 if (c->offset[VERT_RESULT_COL0] && c->offset[VERT_RESULT_BFC0])
159 brw_MOV(p,
160 byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL0]),
161 byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC0]));
162
163 if (c->offset[VERT_RESULT_COL1] && c->offset[VERT_RESULT_BFC1])
164 brw_MOV(p,
165 byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_COL1]),
166 byte_offset(c->reg.vertex[i], c->offset[VERT_RESULT_BFC1]));
167 }
168 }
169 brw_ENDIF(p, ccw);
170 }
171
172
173
174
175 /*
176 GLfloat iz = 1.0 / dir.z;
177 GLfloat ac = dir.x * iz;
178 GLfloat bc = dir.y * iz;
179 offset = ctx->Polygon.OffsetUnits * DEPTH_SCALE;
180 offset += MAX2( abs(ac), abs(bc) ) * ctx->Polygon.OffsetFactor;
181 offset *= MRD;
182 */
183 static void compute_offset( struct brw_clip_compile *c )
184 {
185 struct brw_compile *p = &c->func;
186 struct brw_reg off = c->reg.offset;
187 struct brw_reg dir = c->reg.dir;
188
189 brw_math_invert(p, get_element(off, 2), get_element(dir, 2));
190 brw_MUL(p, vec2(off), dir, get_element(off, 2));
191
192 brw_CMP(p,
193 vec1(brw_null_reg()),
194 BRW_CONDITIONAL_GE,
195 brw_abs(get_element(off, 0)),
196 brw_abs(get_element(off, 1)));
197
198 brw_SEL(p, vec1(off), brw_abs(get_element(off, 0)), brw_abs(get_element(off, 1)));
199 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
200
201 brw_MUL(p, vec1(off), off, brw_imm_f(c->key.offset_factor));
202 brw_ADD(p, vec1(off), off, brw_imm_f(c->key.offset_units));
203 }
204
205
206 static void merge_edgeflags( struct brw_clip_compile *c )
207 {
208 struct brw_compile *p = &c->func;
209 struct brw_instruction *is_poly;
210 struct brw_reg tmp0 = get_element_ud(c->reg.tmp0, 0);
211
212 brw_AND(p, tmp0, get_element_ud(c->reg.R0, 2), brw_imm_ud(PRIM_MASK));
213 brw_CMP(p,
214 vec1(brw_null_reg()),
215 BRW_CONDITIONAL_EQ,
216 tmp0,
217 brw_imm_ud(_3DPRIM_POLYGON));
218
219 /* Get away with using reg.vertex because we know that this is not
220 * a _3DPRIM_TRISTRIP_REVERSE:
221 */
222 is_poly = brw_IF(p, BRW_EXECUTE_1);
223 {
224 brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
225 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<8));
226 brw_MOV(p, byte_offset(c->reg.vertex[0], c->offset[VERT_RESULT_EDGE]), brw_imm_f(0));
227 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
228
229 brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ);
230 brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9));
231 brw_MOV(p, byte_offset(c->reg.vertex[2], c->offset[VERT_RESULT_EDGE]), brw_imm_f(0));
232 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
233 }
234 brw_ENDIF(p, is_poly);
235 }
236
237
238
239 static void apply_one_offset( struct brw_clip_compile *c,
240 struct brw_indirect vert )
241 {
242 struct brw_compile *p = &c->func;
243 struct brw_reg z = deref_1f(vert, c->header_position_offset +
244 2 * type_sz(BRW_REGISTER_TYPE_F));
245
246 brw_ADD(p, z, z, vec1(c->reg.offset));
247 }
248
249
250
251 /***********************************************************************
252 * Output clipped polygon as an unfilled primitive:
253 */
254 static void emit_lines(struct brw_clip_compile *c,
255 GLboolean do_offset)
256 {
257 struct brw_compile *p = &c->func;
258 struct brw_instruction *loop;
259 struct brw_instruction *draw_edge;
260 struct brw_indirect v0 = brw_indirect(0, 0);
261 struct brw_indirect v1 = brw_indirect(1, 0);
262 struct brw_indirect v0ptr = brw_indirect(2, 0);
263 struct brw_indirect v1ptr = brw_indirect(3, 0);
264
265 /* Need a seperate loop for offset:
266 */
267 if (do_offset) {
268 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
269 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
270
271 loop = brw_DO(p, BRW_EXECUTE_1);
272 {
273 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
274 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
275
276 apply_one_offset(c, v0);
277
278 brw_set_conditionalmod(p, BRW_CONDITIONAL_G);
279 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
280 }
281 brw_WHILE(p, loop);
282 }
283
284 /* v1ptr = &inlist[nr_verts]
285 * *v1ptr = v0
286 */
287 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
288 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
289 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v0ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
290 brw_ADD(p, get_addr_reg(v1ptr), get_addr_reg(v1ptr), retype(c->reg.nr_verts, BRW_REGISTER_TYPE_UW));
291 brw_MOV(p, deref_1uw(v1ptr, 0), deref_1uw(v0ptr, 0));
292
293 loop = brw_DO(p, BRW_EXECUTE_1);
294 {
295 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
296 brw_MOV(p, get_addr_reg(v1), deref_1uw(v0ptr, 2));
297 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
298
299 /* draw edge if edgeflag != 0 */
300 brw_CMP(p,
301 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
302 deref_1f(v0, c->offset[VERT_RESULT_EDGE]),
303 brw_imm_f(0));
304 draw_edge = brw_IF(p, BRW_EXECUTE_1);
305 {
306 brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_START);
307 brw_clip_emit_vue(c, v1, 1, 0, (_3DPRIM_LINESTRIP << 2) | R02_PRIM_END);
308 }
309 brw_ENDIF(p, draw_edge);
310
311 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
312 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
313 }
314 brw_WHILE(p, loop);
315 }
316
317
318
319 static void emit_points(struct brw_clip_compile *c,
320 GLboolean do_offset )
321 {
322 struct brw_compile *p = &c->func;
323 struct brw_instruction *loop;
324 struct brw_instruction *draw_point;
325
326 struct brw_indirect v0 = brw_indirect(0, 0);
327 struct brw_indirect v0ptr = brw_indirect(2, 0);
328
329 brw_MOV(p, c->reg.loopcount, c->reg.nr_verts);
330 brw_MOV(p, get_addr_reg(v0ptr), brw_address(c->reg.inlist));
331
332 loop = brw_DO(p, BRW_EXECUTE_1);
333 {
334 brw_MOV(p, get_addr_reg(v0), deref_1uw(v0ptr, 0));
335 brw_ADD(p, get_addr_reg(v0ptr), get_addr_reg(v0ptr), brw_imm_uw(2));
336
337 /* draw if edgeflag != 0
338 */
339 brw_CMP(p,
340 vec1(brw_null_reg()), BRW_CONDITIONAL_NZ,
341 deref_1f(v0, c->offset[VERT_RESULT_EDGE]),
342 brw_imm_f(0));
343 draw_point = brw_IF(p, BRW_EXECUTE_1);
344 {
345 if (do_offset)
346 apply_one_offset(c, v0);
347
348 brw_clip_emit_vue(c, v0, 1, 0, (_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END);
349 }
350 brw_ENDIF(p, draw_point);
351
352 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
353 brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1));
354 }
355 brw_WHILE(p, loop);
356 }
357
358
359
360
361
362
363
364 static void emit_primitives( struct brw_clip_compile *c,
365 GLuint mode,
366 GLboolean do_offset )
367 {
368 switch (mode) {
369 case CLIP_FILL:
370 brw_clip_tri_emit_polygon(c);
371 break;
372
373 case CLIP_LINE:
374 emit_lines(c, do_offset);
375 break;
376
377 case CLIP_POINT:
378 emit_points(c, do_offset);
379 break;
380
381 case CLIP_CULL:
382 assert(0);
383 break;
384 }
385 }
386
387
388
389 static void emit_unfilled_primitives( struct brw_clip_compile *c )
390 {
391 struct brw_compile *p = &c->func;
392 struct brw_instruction *ccw;
393
394 /* Direction culling has already been done.
395 */
396 if (c->key.fill_ccw != c->key.fill_cw &&
397 c->key.fill_ccw != CLIP_CULL &&
398 c->key.fill_cw != CLIP_CULL)
399 {
400 brw_CMP(p,
401 vec1(brw_null_reg()),
402 BRW_CONDITIONAL_GE,
403 get_element(c->reg.dir, 2),
404 brw_imm_f(0));
405
406 ccw = brw_IF(p, BRW_EXECUTE_1);
407 {
408 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
409 }
410 ccw = brw_ELSE(p, ccw);
411 {
412 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
413 }
414 brw_ENDIF(p, ccw);
415 }
416 else if (c->key.fill_cw != CLIP_CULL) {
417 emit_primitives(c, c->key.fill_cw, c->key.offset_cw);
418 }
419 else if (c->key.fill_ccw != CLIP_CULL) {
420 emit_primitives(c, c->key.fill_ccw, c->key.offset_ccw);
421 }
422 }
423
424
425
426
427 static void check_nr_verts( struct brw_clip_compile *c )
428 {
429 struct brw_compile *p = &c->func;
430 struct brw_instruction *if_insn;
431
432 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.nr_verts, brw_imm_d(3));
433 if_insn = brw_IF(p, BRW_EXECUTE_1);
434 {
435 brw_clip_kill_thread(c);
436 }
437 brw_ENDIF(p, if_insn);
438 }
439
440
441 void brw_emit_unfilled_clip( struct brw_clip_compile *c )
442 {
443 struct brw_compile *p = &c->func;
444 struct brw_instruction *do_clip;
445
446
447 c->need_direction = ((c->key.offset_ccw || c->key.offset_cw) ||
448 (c->key.fill_ccw != c->key.fill_cw) ||
449 c->key.fill_ccw == CLIP_CULL ||
450 c->key.fill_cw == CLIP_CULL ||
451 c->key.copy_bfc_cw ||
452 c->key.copy_bfc_ccw);
453
454 brw_clip_tri_alloc_regs(c, 3 + c->key.nr_userclip + 6);
455 brw_clip_tri_init_vertices(c);
456 brw_clip_init_ff_sync(c);
457
458 assert(c->offset[VERT_RESULT_EDGE]);
459
460 if (c->key.fill_ccw == CLIP_CULL &&
461 c->key.fill_cw == CLIP_CULL) {
462 brw_clip_kill_thread(c);
463 return;
464 }
465
466 merge_edgeflags(c);
467
468 /* Need to use the inlist indirection here:
469 */
470 if (c->need_direction)
471 compute_tri_direction(c);
472
473 if (c->key.fill_ccw == CLIP_CULL ||
474 c->key.fill_cw == CLIP_CULL)
475 cull_direction(c);
476
477 if (c->key.offset_ccw ||
478 c->key.offset_cw)
479 compute_offset(c);
480
481 if (c->key.copy_bfc_ccw ||
482 c->key.copy_bfc_cw)
483 copy_bfc(c);
484
485 /* Need to do this whether we clip or not:
486 */
487 if (c->key.do_flat_shading)
488 brw_clip_tri_flat_shade(c);
489
490 brw_clip_init_clipmask(c);
491 brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_NZ, c->reg.planemask, brw_imm_ud(0));
492 do_clip = brw_IF(p, BRW_EXECUTE_1);
493 {
494 brw_clip_init_planes(c);
495 brw_clip_tri(c);
496 check_nr_verts(c);
497 }
498 brw_ENDIF(p, do_clip);
499
500 emit_unfilled_primitives(c);
501 brw_clip_kill_thread(c);
502 }
503
504
505