2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/glheader.h"
34 #include "main/macros.h"
35 #include "main/enums.h"
36 #include "shader/program.h"
38 #include "intel_batchbuffer.h"
40 #include "brw_defines.h"
41 #include "brw_context.h"
49 struct brw_reg
get_tmp( struct brw_clip_compile
*c
)
51 struct brw_reg tmp
= brw_vec4_grf(c
->last_tmp
, 0);
53 if (++c
->last_tmp
> c
->prog_data
.total_grf
)
54 c
->prog_data
.total_grf
= c
->last_tmp
;
59 static void release_tmp( struct brw_clip_compile
*c
, struct brw_reg tmp
)
61 if (tmp
.nr
== c
->last_tmp
-1)
66 static struct brw_reg
make_plane_ud(GLuint x
, GLuint y
, GLuint z
, GLuint w
)
68 return brw_imm_ud((w
<<24) | (z
<<16) | (y
<<8) | x
);
72 void brw_clip_init_planes( struct brw_clip_compile
*c
)
74 struct brw_compile
*p
= &c
->func
;
76 if (!c
->key
.nr_userclip
) {
77 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 0), make_plane_ud( 0, 0, 0xff, 1));
78 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 1), make_plane_ud( 0, 0, 1, 1));
79 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 2), make_plane_ud( 0, 0xff, 0, 1));
80 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 3), make_plane_ud( 0, 1, 0, 1));
81 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 4), make_plane_ud(0xff, 0, 0, 1));
82 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 5), make_plane_ud( 1, 0, 0, 1));
90 /* Project 'pos' to screen space (or back again), overwrite with results:
92 void brw_clip_project_position(struct brw_clip_compile
*c
, struct brw_reg pos
)
94 struct brw_compile
*p
= &c
->func
;
98 brw_math_invert(p
, get_element(pos
, W
), get_element(pos
, W
));
100 /* value.xyz *= value.rhw
102 brw_set_access_mode(p
, BRW_ALIGN_16
);
103 brw_MUL(p
, brw_writemask(pos
, WRITEMASK_XYZ
), pos
, brw_swizzle1(pos
, W
));
104 brw_set_access_mode(p
, BRW_ALIGN_1
);
108 static void brw_clip_project_vertex( struct brw_clip_compile
*c
,
109 struct brw_indirect vert_addr
)
111 struct brw_compile
*p
= &c
->func
;
112 struct brw_reg tmp
= get_tmp(c
);
114 /* Fixup position. Extract from the original vertex and re-project
117 brw_MOV(p
, tmp
, deref_4f(vert_addr
, c
->offset
[VERT_RESULT_HPOS
]));
118 brw_clip_project_position(c
, tmp
);
119 brw_MOV(p
, deref_4f(vert_addr
, c
->header_position_offset
), tmp
);
127 /* Interpolate between two vertices and put the result into a0.0.
128 * Increment a0.0 accordingly.
130 void brw_clip_interp_vertex( struct brw_clip_compile
*c
,
131 struct brw_indirect dest_ptr
,
132 struct brw_indirect v0_ptr
, /* from */
133 struct brw_indirect v1_ptr
, /* to */
135 GLboolean force_edgeflag
)
137 struct brw_compile
*p
= &c
->func
;
138 struct intel_context
*intel
= &p
->brw
->intel
;
139 struct brw_reg tmp
= get_tmp(c
);
142 /* Just copy the vertex header:
145 * After CLIP stage, only first 256 bits of the VUE are read
146 * back on Ironlake, so needn't change it
148 brw_copy_indirect_to_indirect(p
, dest_ptr
, v0_ptr
, 1);
150 /* Iterate over each attribute (could be done in pairs?)
152 for (i
= 0; i
< c
->nr_attrs
; i
++) {
153 GLuint delta
= i
*16 + 32;
155 if (intel
->is_ironlake
)
156 delta
= i
* 16 + 32 * 3;
158 if (delta
== c
->offset
[VERT_RESULT_EDGE
]) {
160 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(1));
162 brw_MOV(p
, deref_4f(dest_ptr
, delta
), deref_4f(v0_ptr
, delta
));
167 * New = attr0 + t*attr1 - t*attr0
170 vec4(brw_null_reg()),
171 deref_4f(v1_ptr
, delta
),
176 negate(deref_4f(v0_ptr
, delta
)),
180 deref_4f(dest_ptr
, delta
),
181 deref_4f(v0_ptr
, delta
),
187 GLuint delta
= i
*16 + 32;
189 if (intel
->is_ironlake
)
190 delta
= i
* 16 + 32 * 3;
192 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(0));
197 /* Recreate the projected (NDC) coordinate in the new vertex
200 brw_clip_project_vertex(c
, dest_ptr
);
208 void brw_clip_emit_vue(struct brw_clip_compile
*c
,
209 struct brw_indirect vert
,
214 struct brw_compile
*p
= &c
->func
;
215 GLuint start
= c
->last_mrf
;
219 assert(!(allocate
&& eot
));
221 /* Cycle through mrf regs - probably futile as we have to wait for
222 * the allocation response anyway. Also, the order this function
223 * is invoked doesn't correspond to the order the instructions will
224 * be executed, so it won't have any effect in many cases.
227 if (start
+ c
->nr_regs
+ 1 >= MAX_MRF
)
230 c
->last_mrf
= start
+ c
->nr_regs
+ 1;
233 /* Copy the vertex from vertn into m1..mN+1:
235 brw_copy_from_indirect(p
, brw_message_reg(start
+1), vert
, c
->nr_regs
);
237 /* Overwrite PrimType and PrimStart in the message header, for
238 * each vertex in turn:
240 brw_MOV(p
, get_element_ud(c
->reg
.R0
, 2), brw_imm_ud(header
));
243 /* Send each vertex as a seperate write to the urb. This
244 * is different to the concept in brw_sf_emit.c, where
245 * subsequent writes are used to build up a single urb
246 * entry. Each of these writes instantiates a seperate
247 * urb entry - (I think... what about 'allocate'?)
250 allocate
? c
->reg
.R0
: retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
255 c
->nr_regs
+ 1, /* msg length */
256 allocate
? 1 : 0, /* response_length */
258 1, /* writes_complete */
260 BRW_URB_SWIZZLE_NONE
);
265 void brw_clip_kill_thread(struct brw_clip_compile
*c
)
267 struct brw_compile
*p
= &c
->func
;
270 /* Send an empty message to kill the thread and release any
271 * allocated urb entry:
274 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
280 0, /* response len */
282 1, /* writes complete */
284 BRW_URB_SWIZZLE_NONE
);
290 struct brw_reg
brw_clip_plane0_address( struct brw_clip_compile
*c
)
292 return brw_address(c
->reg
.fixed_planes
);
296 struct brw_reg
brw_clip_plane_stride( struct brw_clip_compile
*c
)
298 if (c
->key
.nr_userclip
) {
299 return brw_imm_uw(16);
302 return brw_imm_uw(4);
307 /* If flatshading, distribute color from provoking vertex prior to
310 void brw_clip_copy_colors( struct brw_clip_compile
*c
,
311 GLuint to
, GLuint from
)
313 struct brw_compile
*p
= &c
->func
;
315 if (c
->offset
[VERT_RESULT_COL0
])
317 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL0
]),
318 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL0
]));
320 if (c
->offset
[VERT_RESULT_COL1
])
322 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL1
]),
323 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL1
]));
325 if (c
->offset
[VERT_RESULT_BFC0
])
327 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC0
]),
328 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC0
]));
330 if (c
->offset
[VERT_RESULT_BFC1
])
332 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC1
]),
333 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC1
]));
338 void brw_clip_init_clipmask( struct brw_clip_compile
*c
)
340 struct brw_compile
*p
= &c
->func
;
341 struct brw_reg incoming
= get_element_ud(c
->reg
.R0
, 2);
343 /* Shift so that lowest outcode bit is rightmost:
345 brw_SHR(p
, c
->reg
.planemask
, incoming
, brw_imm_ud(26));
347 if (c
->key
.nr_userclip
) {
348 struct brw_reg tmp
= retype(vec1(get_tmp(c
)), BRW_REGISTER_TYPE_UD
);
350 /* Rearrange userclip outcodes so that they come directly after
351 * the fixed plane bits.
353 brw_AND(p
, tmp
, incoming
, brw_imm_ud(0x3f<<14));
354 brw_SHR(p
, tmp
, tmp
, brw_imm_ud(8));
355 brw_OR(p
, c
->reg
.planemask
, c
->reg
.planemask
, tmp
);
361 void brw_clip_ff_sync(struct brw_clip_compile
*c
)
363 struct intel_context
*intel
= &c
->func
.brw
->intel
;
365 if (intel
->needs_ff_sync
) {
366 struct brw_compile
*p
= &c
->func
;
367 struct brw_instruction
*need_ff_sync
;
369 brw_set_conditionalmod(p
, BRW_CONDITIONAL_Z
);
370 brw_AND(p
, brw_null_reg(), c
->reg
.ff_sync
, brw_imm_ud(0x1));
371 need_ff_sync
= brw_IF(p
, BRW_EXECUTE_1
);
373 brw_OR(p
, c
->reg
.ff_sync
, c
->reg
.ff_sync
, brw_imm_ud(0x1));
381 1, /* response length */
383 1, /* write compelete */
385 BRW_URB_SWIZZLE_NONE
);
387 brw_ENDIF(p
, need_ff_sync
);
388 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
392 void brw_clip_init_ff_sync(struct brw_clip_compile
*c
)
394 struct intel_context
*intel
= &c
->func
.brw
->intel
;
396 if (intel
->needs_ff_sync
) {
397 struct brw_compile
*p
= &c
->func
;
399 brw_MOV(p
, c
->reg
.ff_sync
, brw_imm_ud(0));