2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/glheader.h"
34 #include "main/macros.h"
35 #include "main/enums.h"
36 #include "program/program.h"
38 #include "intel_batchbuffer.h"
40 #include "brw_defines.h"
41 #include "brw_context.h"
48 struct brw_reg
get_tmp( struct brw_clip_compile
*c
)
50 struct brw_reg tmp
= brw_vec4_grf(c
->last_tmp
, 0);
52 if (++c
->last_tmp
> c
->prog_data
.total_grf
)
53 c
->prog_data
.total_grf
= c
->last_tmp
;
58 static void release_tmp( struct brw_clip_compile
*c
, struct brw_reg tmp
)
60 if (tmp
.nr
== c
->last_tmp
-1)
65 static struct brw_reg
make_plane_ud(GLuint x
, GLuint y
, GLuint z
, GLuint w
)
67 return brw_imm_ud((w
<<24) | (z
<<16) | (y
<<8) | x
);
71 void brw_clip_init_planes( struct brw_clip_compile
*c
)
73 struct brw_compile
*p
= &c
->func
;
75 if (!c
->key
.nr_userclip
) {
76 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 0), make_plane_ud( 0, 0, 0xff, 1));
77 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 1), make_plane_ud( 0, 0, 1, 1));
78 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 2), make_plane_ud( 0, 0xff, 0, 1));
79 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 3), make_plane_ud( 0, 1, 0, 1));
80 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 4), make_plane_ud(0xff, 0, 0, 1));
81 brw_MOV(p
, get_element_ud(c
->reg
.fixed_planes
, 5), make_plane_ud( 1, 0, 0, 1));
89 /* Project 'pos' to screen space (or back again), overwrite with results:
91 void brw_clip_project_position(struct brw_clip_compile
*c
, struct brw_reg pos
)
93 struct brw_compile
*p
= &c
->func
;
97 brw_math_invert(p
, get_element(pos
, W
), get_element(pos
, W
));
99 /* value.xyz *= value.rhw
101 brw_set_access_mode(p
, BRW_ALIGN_16
);
102 brw_MUL(p
, brw_writemask(pos
, WRITEMASK_XYZ
), pos
, brw_swizzle1(pos
, W
));
103 brw_set_access_mode(p
, BRW_ALIGN_1
);
107 static void brw_clip_project_vertex( struct brw_clip_compile
*c
,
108 struct brw_indirect vert_addr
)
110 struct brw_compile
*p
= &c
->func
;
111 struct brw_reg tmp
= get_tmp(c
);
113 /* Fixup position. Extract from the original vertex and re-project
116 brw_MOV(p
, tmp
, deref_4f(vert_addr
, c
->offset
[VERT_RESULT_HPOS
]));
117 brw_clip_project_position(c
, tmp
);
118 brw_MOV(p
, deref_4f(vert_addr
, c
->header_position_offset
), tmp
);
126 /* Interpolate between two vertices and put the result into a0.0.
127 * Increment a0.0 accordingly.
129 void brw_clip_interp_vertex( struct brw_clip_compile
*c
,
130 struct brw_indirect dest_ptr
,
131 struct brw_indirect v0_ptr
, /* from */
132 struct brw_indirect v1_ptr
, /* to */
134 GLboolean force_edgeflag
)
136 struct brw_compile
*p
= &c
->func
;
137 struct brw_reg tmp
= get_tmp(c
);
140 /* Just copy the vertex header:
143 * After CLIP stage, only first 256 bits of the VUE are read
144 * back on Ironlake, so needn't change it
146 brw_copy_indirect_to_indirect(p
, dest_ptr
, v0_ptr
, 1);
148 /* Iterate over each attribute (could be done in pairs?)
150 for (i
= 0; i
< c
->nr_attrs
; i
++) {
151 GLuint delta
= c
->offset
[c
->idx_to_attr
[i
]];
153 if (c
->idx_to_attr
[i
] == VERT_RESULT_EDGE
) {
155 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(1));
157 brw_MOV(p
, deref_4f(dest_ptr
, delta
), deref_4f(v0_ptr
, delta
));
162 * New = attr0 + t*attr1 - t*attr0
165 vec4(brw_null_reg()),
166 deref_4f(v1_ptr
, delta
),
171 negate(deref_4f(v0_ptr
, delta
)),
175 deref_4f(dest_ptr
, delta
),
176 deref_4f(v0_ptr
, delta
),
182 GLuint delta
= c
->offset
[c
->idx_to_attr
[c
->nr_attrs
- 1]] + ATTR_SIZE
;
184 brw_MOV(p
, deref_4f(dest_ptr
, delta
), brw_imm_f(0));
189 /* Recreate the projected (NDC) coordinate in the new vertex
192 brw_clip_project_vertex(c
, dest_ptr
);
200 void brw_clip_emit_vue(struct brw_clip_compile
*c
,
201 struct brw_indirect vert
,
206 struct brw_compile
*p
= &c
->func
;
210 assert(!(allocate
&& eot
));
212 /* Copy the vertex from vertn into m1..mN+1:
214 brw_copy_from_indirect(p
, brw_message_reg(1), vert
, c
->nr_regs
);
216 /* Overwrite PrimType and PrimStart in the message header, for
217 * each vertex in turn:
219 brw_MOV(p
, get_element_ud(c
->reg
.R0
, 2), brw_imm_ud(header
));
222 /* Send each vertex as a seperate write to the urb. This
223 * is different to the concept in brw_sf_emit.c, where
224 * subsequent writes are used to build up a single urb
225 * entry. Each of these writes instantiates a seperate
226 * urb entry - (I think... what about 'allocate'?)
229 allocate
? c
->reg
.R0
: retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
234 c
->nr_regs
+ 1, /* msg length */
235 allocate
? 1 : 0, /* response_length */
237 1, /* writes_complete */
239 BRW_URB_SWIZZLE_NONE
);
244 void brw_clip_kill_thread(struct brw_clip_compile
*c
)
246 struct brw_compile
*p
= &c
->func
;
249 /* Send an empty message to kill the thread and release any
250 * allocated urb entry:
253 retype(brw_null_reg(), BRW_REGISTER_TYPE_UD
),
259 0, /* response len */
261 1, /* writes complete */
263 BRW_URB_SWIZZLE_NONE
);
269 struct brw_reg
brw_clip_plane0_address( struct brw_clip_compile
*c
)
271 return brw_address(c
->reg
.fixed_planes
);
275 struct brw_reg
brw_clip_plane_stride( struct brw_clip_compile
*c
)
277 if (c
->key
.nr_userclip
) {
278 return brw_imm_uw(16);
281 return brw_imm_uw(4);
286 /* If flatshading, distribute color from provoking vertex prior to
289 void brw_clip_copy_colors( struct brw_clip_compile
*c
,
290 GLuint to
, GLuint from
)
292 struct brw_compile
*p
= &c
->func
;
294 if (c
->offset
[VERT_RESULT_COL0
])
296 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL0
]),
297 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL0
]));
299 if (c
->offset
[VERT_RESULT_COL1
])
301 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_COL1
]),
302 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_COL1
]));
304 if (c
->offset
[VERT_RESULT_BFC0
])
306 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC0
]),
307 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC0
]));
309 if (c
->offset
[VERT_RESULT_BFC1
])
311 byte_offset(c
->reg
.vertex
[to
], c
->offset
[VERT_RESULT_BFC1
]),
312 byte_offset(c
->reg
.vertex
[from
], c
->offset
[VERT_RESULT_BFC1
]));
317 void brw_clip_init_clipmask( struct brw_clip_compile
*c
)
319 struct brw_compile
*p
= &c
->func
;
320 struct brw_reg incoming
= get_element_ud(c
->reg
.R0
, 2);
322 /* Shift so that lowest outcode bit is rightmost:
324 brw_SHR(p
, c
->reg
.planemask
, incoming
, brw_imm_ud(26));
326 if (c
->key
.nr_userclip
) {
327 struct brw_reg tmp
= retype(vec1(get_tmp(c
)), BRW_REGISTER_TYPE_UD
);
329 /* Rearrange userclip outcodes so that they come directly after
330 * the fixed plane bits.
332 brw_AND(p
, tmp
, incoming
, brw_imm_ud(0x3f<<14));
333 brw_SHR(p
, tmp
, tmp
, brw_imm_ud(8));
334 brw_OR(p
, c
->reg
.planemask
, c
->reg
.planemask
, tmp
);
340 void brw_clip_ff_sync(struct brw_clip_compile
*c
)
342 struct intel_context
*intel
= &c
->func
.brw
->intel
;
344 if (intel
->needs_ff_sync
) {
345 struct brw_compile
*p
= &c
->func
;
346 struct brw_instruction
*need_ff_sync
;
348 brw_set_conditionalmod(p
, BRW_CONDITIONAL_Z
);
349 brw_AND(p
, brw_null_reg(), c
->reg
.ff_sync
, brw_imm_ud(0x1));
350 need_ff_sync
= brw_IF(p
, BRW_EXECUTE_1
);
352 brw_OR(p
, c
->reg
.ff_sync
, c
->reg
.ff_sync
, brw_imm_ud(0x1));
358 1, /* response length */
361 brw_ENDIF(p
, need_ff_sync
);
362 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
366 void brw_clip_init_ff_sync(struct brw_clip_compile
*c
)
368 struct intel_context
*intel
= &c
->func
.brw
->intel
;
370 if (intel
->needs_ff_sync
) {
371 struct brw_compile
*p
= &c
->func
;
373 brw_MOV(p
, c
->reg
.ff_sync
, brw_imm_ud(0));